[vbox-dev] ICH9 BAR5 access

[Ananth Pallapothu]

Hi Klaus,

    Thanks for the response.

    In the PCIe config space I set all BAR's to 0, using PCIDevSetDWord
.... no address mapping from myside.
    I first register the region using PDMDevHlpPCIIORegionRegister with
respective size.
               BAR0 = 0x800,0000 128 M
               BAR5 =     0x4,0000 256K
    Then I register memory call backs using PDMDevHlpMMIORegister for the
size.

     While experimenting, I played with different base address in
DevPciIch9.cpp "pGlobals->uPciBiosMmio = UINT32_C(0xB8000000);" which moved
BAR's accordingly.

     While experimenting, I have tried setting start address for BAR's in
PCIe config space, I saw that this address eventually gets overwritten by
FakeBIOS and then OS.

     When I ran lspci on the guest I did not see conflict in address
mapping. Attached lspci output. My pass through device shows up under VGA.
     I have added lspci output of fully functional PIIX3 chipset for
comparison.

    At the end of the attachment, please note the VM debugger output in
ICH9 chip set which apparently doesn't see the VGA device.

    Just to keep my message crisp, with the same device code, in PIIX3 I am
able to see memory access to the addresses specified in BAR0, BAR5 while in
ICH9, I only see access coming through in BAR0 and NOT BAR5.

Thanks.



On Tue, Aug 18, 2015 at 2:25 PM, Klaus Espenlaub <klaus.espenlaub at oracle.com
> wrote:

> Hi Ananth,
>
> On 18.08.2015 20:04, Ananth Pallapothu wrote:
>
> Hello Experts,
>
>    I have added new pass through device to the VirtualBox setup .
> Registered all 6 BAR's with appropriate sizes, none exceeding 256M. All
> BAR's were set to reflect hardware functionality (assigned 0), eventually
> OS programmed base address regions with the sizes I have registered them
> with.
>
> Can you provide more details (how you map the regions initially and on
> remap)? Hard to say what's happening otherwise.
>
> My fundamental problem is, I have been able to access BAR0 and NOT BAR5. I
> tried playing with BIOSmmio address setting in DevPciIch9, that made
> difference in relocating BAR's but functionality remained the same (Not
> able to access BAR5)
>
> Interesting part is, PIIX3 chipset is fully functional ie., can access
> BAR5 in PIIX3 but NOT in ICH9.
>
> Could be that with PIIX3 there's no remap and with ICH9 there's a remap...
> really difficult to say anything with the sparse information.
>
> Klaus
>
>
> PS: There seems to be some problem with my email ID, so not sure whether
> my last email came through. Sorry if you have already received it.
>
>
> Thanks.
>
>
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>
>
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