Changeset 8965 in vbox for trunk/src/VBox/VMM/VMMR0/PGMR0.cpp

Timestamp:

May 20, 2008 3:41:55 PM (17 years ago)

Author:

vboxsync

svn:sync-xref-src-repo-rev:

31036

Message:

Nested paging updates

File:

• trunk/src/VBox/VMM/VMMR0/PGMR0.cpp (modified) (2 diffs)

trunk/src/VBox/VMM/VMMR0/PGMR0.cpp

@@ -30 +30 @@
 #include <iprt/assert.h>
 
+__BEGIN_DECLS
+#define PGM_BTH_NAME(name)          PGM_BTH_NAME_32BIT_PROT(name)
+#include "PGMR0Bth.h"
+
+#define PGM_BTH_NAME(name)          PGM_BTH_NAME_PAE_PROT(name)
+#include "PGMR0Bth.h"
+/*
+#define PGM_BTH_NAME(name)          PGM_BTH_NAME_AMD64_PROT(name)
+#include "PGMR0Bth.h"
+*/
+__END_DECLS
 
 
@@ -45 +56 @@
 PGMR0DECL(int) PGMR0PhysAllocateHandyPages(PVM pVM)
 {
-
     return VERR_NOT_IMPLEMENTED;
 }
 
 
+/**
+ * #PF Handler for nested paging.
+ *
+ * @returns VBox status code (appropriate for trap handling and GC return).
+ * @param   pVM                 VM Handle.
+ * @param   enmShwPagingMode    Paging mode for the nested page tables
+ * @param   uErr                The trap error code.
+ * @param   pRegFrame           Trap register frame.
+ * @param   pvFault             The fault address.
+ */
+PGMR0DECL(int) PGMR0Trap0eHandlerNestedPaging(PVM pVM, PGMMODE enmShwPagingMode, RTGCUINT uErr, PCPUMCTXCORE pRegFrame, RTGCPHYS pvFault)
+{
+    int rc;
+
+    LogFlow(("PGMTrap0eHandler: uErr=%#x pvFault=%VGp eip=%VGv\n", uErr, pvFault, pRegFrame->eip));
+    STAM_PROFILE_START(&pVM->pgm.s.StatGCTrap0e, a);
+    STAM_STATS({ pVM->pgm.s.CTXSUFF(pStatTrap0eAttribution) = NULL; } );
+
+    /* AMD uses the host's paging mode; Intel's version is on the todo list */
+    Assert(enmShwPagingMode == PGMMODE_32_BIT || enmShwPagingMode == PGMMODE_PAE); // || enmShwPagingMode == PGMMODE_AMD64);
+
+#ifdef VBOX_WITH_STATISTICS
+    /*
+     * Error code stats.
+     */
+    if (uErr & X86_TRAP_PF_US)
+    {
+        if (!(uErr & X86_TRAP_PF_P))
+        {
+            if (uErr & X86_TRAP_PF_RW)
+                STAM_COUNTER_INC(&pVM->pgm.s.StatGCTrap0eUSNotPresentWrite);
+            else
+                STAM_COUNTER_INC(&pVM->pgm.s.StatGCTrap0eUSNotPresentRead);
+        }
+        else if (uErr & X86_TRAP_PF_RW)
+            STAM_COUNTER_INC(&pVM->pgm.s.StatGCTrap0eUSWrite);
+        else if (uErr & X86_TRAP_PF_RSVD)
+            STAM_COUNTER_INC(&pVM->pgm.s.StatGCTrap0eUSReserved);
+        else if (uErr & X86_TRAP_PF_ID)
+            STAM_COUNTER_INC(&pVM->pgm.s.StatGCTrap0eUSNXE);
+        else
+            STAM_COUNTER_INC(&pVM->pgm.s.StatGCTrap0eUSRead);
+    }
+    else
+    {   /* Supervisor */
+        if (!(uErr & X86_TRAP_PF_P))
+        {
+            if (uErr & X86_TRAP_PF_RW)
+                STAM_COUNTER_INC(&pVM->pgm.s.StatGCTrap0eSVNotPresentWrite);
+            else
+                STAM_COUNTER_INC(&pVM->pgm.s.StatGCTrap0eSVNotPresentRead);
+        }
+        else if (uErr & X86_TRAP_PF_RW)
+            STAM_COUNTER_INC(&pVM->pgm.s.StatGCTrap0eSVWrite);
+        else if (uErr & X86_TRAP_PF_ID)
+            STAM_COUNTER_INC(&pVM->pgm.s.StatGCTrap0eSNXE);
+        else if (uErr & X86_TRAP_PF_RSVD)
+            STAM_COUNTER_INC(&pVM->pgm.s.StatGCTrap0eSVReserved);
+    }
+#endif
+
+    /*
+     * Call the worker.
+     */
+    switch(enmShwPagingMode)
+    {
+    case PGMMODE_32_BIT:
+        rc = PGM_BTH_NAME_32BIT_PROT(Trap0eHandler)(pVM, uErr, pRegFrame, pvFault);
+        break;
+    case PGMMODE_PAE:
+        rc = PGM_BTH_NAME_PAE_PROT(Trap0eHandler)(pVM, uErr, pRegFrame, pvFault);
+        break;
+        /*
+    case PGMMODE_AMD64:
+        rc = PGM_BTH_NAME_AMD64_PROT(Trap0eHandler)(pVM, uErr, pRegFrame, pvFault);
+        break;
+        */
+    }
+    if (rc == VINF_PGM_SYNCPAGE_MODIFIED_PDE)
+        rc = VINF_SUCCESS;
+    STAM_STATS({ if (!pVM->pgm.s.CTXSUFF(pStatTrap0eAttribution))
+                    pVM->pgm.s.CTXSUFF(pStatTrap0eAttribution) = &pVM->pgm.s.StatTrap0eMisc; });
+    STAM_PROFILE_STOP_EX(&pVM->pgm.s.StatGCTrap0e, pVM->pgm.s.CTXSUFF(pStatTrap0eAttribution), a);
+    return rc;
+}