[21222] | 1 | /* $Id: EMHM.cpp 82968 2020-02-04 10:35:17Z vboxsync $ */
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| 2 | /** @file
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| 3 | * EM - Execution Monitor / Manager - hardware virtualization
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| 4 | */
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| 5 |
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| 6 | /*
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[82968] | 7 | * Copyright (C) 2006-2020 Oracle Corporation
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[21222] | 8 | *
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| 9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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| 10 | * available from http://www.virtualbox.org. This file is free software;
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| 11 | * you can redistribute it and/or modify it under the terms of the GNU
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| 12 | * General Public License (GPL) as published by the Free Software
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| 13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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| 14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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| 15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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| 16 | */
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| 17 |
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[57358] | 18 |
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| 19 | /*********************************************************************************************************************************
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| 20 | * Header Files *
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| 21 | *********************************************************************************************************************************/
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[21222] | 22 | #define LOG_GROUP LOG_GROUP_EM
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[72488] | 23 | #define VMCPU_INCL_CPUM_GST_CTX
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[35346] | 24 | #include <VBox/vmm/em.h>
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| 25 | #include <VBox/vmm/vmm.h>
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| 26 | #include <VBox/vmm/selm.h>
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| 27 | #include <VBox/vmm/trpm.h>
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[40274] | 28 | #include <VBox/vmm/iem.h>
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[35346] | 29 | #include <VBox/vmm/iom.h>
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| 30 | #include <VBox/vmm/dbgf.h>
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| 31 | #include <VBox/vmm/pgm.h>
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| 32 | #include <VBox/vmm/tm.h>
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| 33 | #include <VBox/vmm/mm.h>
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| 34 | #include <VBox/vmm/ssm.h>
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| 35 | #include <VBox/vmm/pdmapi.h>
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| 36 | #include <VBox/vmm/pdmcritsect.h>
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| 37 | #include <VBox/vmm/pdmqueue.h>
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[43387] | 38 | #include <VBox/vmm/hm.h>
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[21222] | 39 | #include "EMInternal.h"
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[35346] | 40 | #include <VBox/vmm/vm.h>
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[57989] | 41 | #include <VBox/vmm/gim.h>
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[35346] | 42 | #include <VBox/vmm/cpumdis.h>
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[21222] | 43 | #include <VBox/dis.h>
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| 44 | #include <VBox/disopcode.h>
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[76397] | 45 | #include <VBox/err.h>
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[35346] | 46 | #include <VBox/vmm/dbgf.h>
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[40375] | 47 | #include "VMMTracing.h"
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[21222] | 48 |
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[29250] | 49 | #include <iprt/asm.h>
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[21222] | 50 |
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[29250] | 51 |
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[57358] | 52 | /*********************************************************************************************************************************
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| 53 | * Internal Functions *
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| 54 | *********************************************************************************************************************************/
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[72634] | 55 | static int emR3HmHandleRC(PVM pVM, PVMCPU pVCpu, int rc);
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[47788] | 56 | DECLINLINE(int) emR3HmExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC = VINF_SUCCESS);
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| 57 | static int emR3HmExecuteIOInstruction(PVM pVM, PVMCPU pVCpu);
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[72634] | 58 | static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu);
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[21222] | 59 |
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[43387] | 60 | #define EMHANDLERC_WITH_HM
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[47788] | 61 | #define emR3ExecuteInstruction emR3HmExecuteInstruction
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| 62 | #define emR3ExecuteIOInstruction emR3HmExecuteIOInstruction
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[21222] | 63 | #include "EMHandleRCTmpl.h"
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| 64 |
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| 65 |
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| 66 | /**
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[47619] | 67 | * Executes instruction in HM mode if we can.
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| 68 | *
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| 69 | * This is somewhat comparable to REMR3EmulateInstruction.
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| 70 | *
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| 71 | * @returns VBox strict status code.
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| 72 | * @retval VINF_EM_DBG_STEPPED on success.
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| 73 | * @retval VERR_EM_CANNOT_EXEC_GUEST if we cannot execute guest instructions in
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| 74 | * HM right now.
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| 75 | *
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[58123] | 76 | * @param pVM The cross context VM structure.
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| 77 | * @param pVCpu The cross context virtual CPU structure for the calling EMT.
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| 78 | * @param fFlags Combinations of EM_ONE_INS_FLAGS_XXX.
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[47619] | 79 | * @thread EMT.
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| 80 | */
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[47671] | 81 | VMMR3_INT_DECL(VBOXSTRICTRC) EMR3HmSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
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[47619] | 82 | {
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[47671] | 83 | Assert(!(fFlags & ~EM_ONE_INS_FLAGS_MASK));
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| 84 |
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[80281] | 85 | if (!HMCanExecuteGuest(pVM, pVCpu, &pVCpu->cpum.GstCtx))
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[47619] | 86 | return VINF_EM_RESCHEDULE;
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| 87 |
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[72634] | 88 | uint64_t const uOldRip = pVCpu->cpum.GstCtx.rip;
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[47671] | 89 | for (;;)
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[47619] | 90 | {
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[47671] | 91 | /*
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| 92 | * Service necessary FFs before going into HM.
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| 93 | */
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[74791] | 94 | if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
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[74789] | 95 | || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
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[47619] | 96 | {
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[72634] | 97 | VBOXSTRICTRC rcStrict = emR3HmForcedActions(pVM, pVCpu);
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[47671] | 98 | if (rcStrict != VINF_SUCCESS)
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| 99 | {
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| 100 | Log(("EMR3HmSingleInstruction: FFs before -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
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| 101 | return rcStrict;
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| 102 | }
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[47619] | 103 | }
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| 104 |
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[47671] | 105 | /*
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| 106 | * Go execute it.
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| 107 | */
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[58998] | 108 | bool fOld = HMSetSingleInstruction(pVM, pVCpu, true);
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[47671] | 109 | VBOXSTRICTRC rcStrict = VMMR3HmRunGC(pVM, pVCpu);
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[58998] | 110 | HMSetSingleInstruction(pVM, pVCpu, fOld);
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[47671] | 111 | LogFlow(("EMR3HmSingleInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
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[47619] | 112 |
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[47671] | 113 | /*
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| 114 | * Handle high priority FFs and informational status codes. We don't do
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| 115 | * normal FF processing the caller or the next call can deal with them.
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| 116 | */
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[74795] | 117 | VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
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[74791] | 118 | if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
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[74789] | 119 | || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
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[47671] | 120 | {
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[72488] | 121 | rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict);
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[47671] | 122 | LogFlow(("EMR3HmSingleInstruction: FFs after -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
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| 123 | }
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[47619] | 124 |
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[47671] | 125 | if (rcStrict != VINF_SUCCESS && (rcStrict < VINF_EM_FIRST || rcStrict > VINF_EM_LAST))
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| 126 | {
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[72634] | 127 | rcStrict = emR3HmHandleRC(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
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[47671] | 128 | Log(("EMR3HmSingleInstruction: emR3HmHandleRC -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
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| 129 | }
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| 130 |
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| 131 | /*
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| 132 | * Done?
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| 133 | */
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| 134 | if ( (rcStrict != VINF_SUCCESS && rcStrict != VINF_EM_DBG_STEPPED)
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| 135 | || !(fFlags & EM_ONE_INS_FLAGS_RIP_CHANGE)
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[72634] | 136 | || pVCpu->cpum.GstCtx.rip != uOldRip)
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[47671] | 137 | {
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[72634] | 138 | if (rcStrict == VINF_SUCCESS && pVCpu->cpum.GstCtx.rip != uOldRip)
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[47671] | 139 | rcStrict = VINF_EM_DBG_STEPPED;
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[72634] | 140 | Log(("EMR3HmSingleInstruction: returns %Rrc (rip %llx -> %llx)\n", VBOXSTRICTRC_VAL(rcStrict), uOldRip, pVCpu->cpum.GstCtx.rip));
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[72598] | 141 | CPUM_IMPORT_EXTRN_RET(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK);
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[47671] | 142 | return rcStrict;
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| 143 | }
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[47619] | 144 | }
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| 145 | }
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| 146 |
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| 147 |
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| 148 | /**
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[21222] | 149 | * Executes one (or perhaps a few more) instruction(s).
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| 150 | *
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| 151 | * @returns VBox status code suitable for EM.
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| 152 | *
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[58122] | 153 | * @param pVM The cross context VM structure.
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[58123] | 154 | * @param pVCpu The cross context virtual CPU structure.
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[39078] | 155 | * @param rcRC Return code from RC.
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[21222] | 156 | * @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
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| 157 | * instruction and prefix the log output with this text.
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| 158 | */
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[58126] | 159 | #if defined(LOG_ENABLED) || defined(DOXYGEN_RUNNING)
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[47788] | 160 | static int emR3HmExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC, const char *pszPrefix)
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[21222] | 161 | #else
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[47788] | 162 | static int emR3HmExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC)
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[21222] | 163 | #endif
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| 164 | {
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[81157] | 165 | RT_NOREF(rcRC, pVM);
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[21222] | 166 |
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| 167 | #ifdef LOG_ENABLED
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| 168 | /*
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[47788] | 169 | * Log it.
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[21222] | 170 | */
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[72634] | 171 | Log(("EMINS: %04x:%RGv RSP=%RGv\n", pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, (RTGCPTR)pVCpu->cpum.GstCtx.rsp));
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[21222] | 172 | if (pszPrefix)
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| 173 | {
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[61634] | 174 | DBGFR3_INFO_LOG(pVM, pVCpu, "cpumguest", pszPrefix);
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[44399] | 175 | DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, pszPrefix);
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[21222] | 176 | }
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[47788] | 177 | #endif
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[21222] | 178 |
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[47788] | 179 | /*
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| 180 | * Use IEM and fallback on REM if the functionality is missing.
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| 181 | * Once IEM gets mature enough, nothing should ever fall back.
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| 182 | */
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| 183 | STAM_PROFILE_START(&pVCpu->em.s.StatIEMEmu, a);
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[72598] | 184 | VBOXSTRICTRC rcStrict;
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| 185 | uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
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| 186 | RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
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| 187 | if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
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| 188 | {
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| 189 | CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
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| 190 | rcStrict = VBOXSTRICTRC_TODO(IEMExecOne(pVCpu));
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| 191 | }
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| 192 | else
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| 193 | {
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| 194 | RT_UNTRUSTED_VALIDATED_FENCE();
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| 195 | rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
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| 196 | LogFlow(("emR3HmExecuteInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
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| 197 | }
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[47788] | 198 | STAM_PROFILE_STOP(&pVCpu->em.s.StatIEMEmu, a);
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| 199 |
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[72598] | 200 | return VBOXSTRICTRC_TODO(rcStrict);
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[21222] | 201 | }
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| 202 |
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| 203 |
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| 204 | /**
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| 205 | * Executes one (or perhaps a few more) instruction(s).
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| 206 | * This is just a wrapper for discarding pszPrefix in non-logging builds.
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| 207 | *
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| 208 | * @returns VBox status code suitable for EM.
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[58122] | 209 | * @param pVM The cross context VM structure.
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[58123] | 210 | * @param pVCpu The cross context virtual CPU structure.
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[21222] | 211 | * @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
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| 212 | * instruction and prefix the log output with this text.
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| 213 | * @param rcGC GC return code
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| 214 | */
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[47788] | 215 | DECLINLINE(int) emR3HmExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC)
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[21222] | 216 | {
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| 217 | #ifdef LOG_ENABLED
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[47788] | 218 | return emR3HmExecuteInstructionWorker(pVM, pVCpu, rcGC, pszPrefix);
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[21222] | 219 | #else
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[62637] | 220 | RT_NOREF_PV(pszPrefix);
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[47788] | 221 | return emR3HmExecuteInstructionWorker(pVM, pVCpu, rcGC);
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[21222] | 222 | #endif
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| 223 | }
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| 224 |
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[73224] | 225 |
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[21222] | 226 | /**
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| 227 | * Executes one (or perhaps a few more) IO instruction(s).
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| 228 | *
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| 229 | * @returns VBox status code suitable for EM.
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[58122] | 230 | * @param pVM The cross context VM structure.
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[58123] | 231 | * @param pVCpu The cross context virtual CPU structure.
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[21222] | 232 | */
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[47788] | 233 | static int emR3HmExecuteIOInstruction(PVM pVM, PVMCPU pVCpu)
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[21222] | 234 | {
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[73203] | 235 | RT_NOREF(pVM);
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[21222] | 236 | STAM_PROFILE_START(&pVCpu->em.s.StatIOEmu, a);
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| 237 |
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[72598] | 238 | VBOXSTRICTRC rcStrict;
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| 239 | uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
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| 240 | RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
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| 241 | if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
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[21222] | 242 | {
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[72598] | 243 | /*
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| 244 | * Hand it over to the interpreter.
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| 245 | */
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| 246 | CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
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| 247 | rcStrict = IEMExecOne(pVCpu);
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| 248 | LogFlow(("emR3HmExecuteIOInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
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| 249 | }
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| 250 | else
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| 251 | {
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| 252 | RT_UNTRUSTED_VALIDATED_FENCE();
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| 253 | CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
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| 254 | rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
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| 255 | LogFlow(("emR3HmExecuteIOInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
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[21222] | 256 | STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIoRestarted);
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| 257 | }
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| 258 |
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[47421] | 259 | STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIoIem);
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| 260 | STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
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| 261 | return VBOXSTRICTRC_TODO(rcStrict);
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[21222] | 262 | }
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| 263 |
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| 264 |
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| 265 | /**
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[70979] | 266 | * Process HM specific forced actions.
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[21222] | 267 | *
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[70979] | 268 | * This function is called when any FFs in the VM_FF_HIGH_PRIORITY_PRE_RAW_MASK
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| 269 | * or/and VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK are pending.
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[21222] | 270 | *
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| 271 | * @returns VBox status code. May return VINF_EM_NO_MEMORY but none of the other
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| 272 | * EM statuses.
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[58122] | 273 | * @param pVM The cross context VM structure.
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[58123] | 274 | * @param pVCpu The cross context virtual CPU structure.
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[21222] | 275 | */
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[72634] | 276 | static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu)
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[21222] | 277 | {
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| 278 | /*
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| 279 | * Sync page directory.
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| 280 | */
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[74789] | 281 | if (VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL))
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[21222] | 282 | {
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[72598] | 283 | CPUM_IMPORT_EXTRN_RET(pVCpu, CPUMCTX_EXTRN_CR0 | CPUMCTX_EXTRN_CR3 | CPUMCTX_EXTRN_CR4);
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[21222] | 284 | Assert(pVCpu->em.s.enmState != EMSTATE_WAIT_SIPI);
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[72634] | 285 | int rc = PGMSyncCR3(pVCpu, pVCpu->cpum.GstCtx.cr0, pVCpu->cpum.GstCtx.cr3, pVCpu->cpum.GstCtx.cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
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[21222] | 286 | if (RT_FAILURE(rc))
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| 287 | return rc;
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| 288 |
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| 289 | /* Prefetch pages for EIP and ESP. */
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| 290 | /** @todo This is rather expensive. Should investigate if it really helps at all. */
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[72598] | 291 | /** @todo this should be skipped! */
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| 292 | CPUM_IMPORT_EXTRN_RET(pVCpu, CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_SS);
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[72634] | 293 | rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVM, DISSELREG_CS, CPUMCTX2CORE(&pVCpu->cpum.GstCtx), pVCpu->cpum.GstCtx.rip));
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[21222] | 294 | if (rc == VINF_SUCCESS)
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[72634] | 295 | rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVM, DISSELREG_SS, CPUMCTX2CORE(&pVCpu->cpum.GstCtx), pVCpu->cpum.GstCtx.rsp));
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[21222] | 296 | if (rc != VINF_SUCCESS)
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| 297 | {
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| 298 | if (rc != VINF_PGM_SYNC_CR3)
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| 299 | {
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| 300 | AssertLogRelMsgReturn(RT_FAILURE(rc), ("%Rrc\n", rc), VERR_IPE_UNEXPECTED_INFO_STATUS);
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| 301 | return rc;
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| 302 | }
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[72634] | 303 | rc = PGMSyncCR3(pVCpu, pVCpu->cpum.GstCtx.cr0, pVCpu->cpum.GstCtx.cr3, pVCpu->cpum.GstCtx.cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
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[21222] | 304 | if (RT_FAILURE(rc))
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| 305 | return rc;
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| 306 | }
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| 307 | /** @todo maybe prefetch the supervisor stack page as well */
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| 308 | }
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| 309 |
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| 310 | /*
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| 311 | * Allocate handy pages (just in case the above actions have consumed some pages).
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| 312 | */
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| 313 | if (VM_FF_IS_PENDING_EXCEPT(pVM, VM_FF_PGM_NEED_HANDY_PAGES, VM_FF_PGM_NO_MEMORY))
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| 314 | {
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| 315 | int rc = PGMR3PhysAllocateHandyPages(pVM);
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| 316 | if (RT_FAILURE(rc))
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| 317 | return rc;
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| 318 | }
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| 319 |
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| 320 | /*
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| 321 | * Check whether we're out of memory now.
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| 322 | *
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| 323 | * This may stem from some of the above actions or operations that has been executed
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| 324 | * since we ran FFs. The allocate handy pages must for instance always be followed by
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| 325 | * this check.
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| 326 | */
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[74790] | 327 | if (VM_FF_IS_SET(pVM, VM_FF_PGM_NO_MEMORY))
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[21222] | 328 | return VINF_EM_NO_MEMORY;
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| 329 |
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| 330 | return VINF_SUCCESS;
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| 331 | }
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| 332 |
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| 333 |
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| 334 | /**
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| 335 | * Executes hardware accelerated raw code. (Intel VT-x & AMD-V)
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| 336 | *
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| 337 | * This function contains the raw-mode version of the inner
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| 338 | * execution loop (the outer loop being in EMR3ExecuteVM()).
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| 339 | *
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| 340 | * @returns VBox status code. The most important ones are: VINF_EM_RESCHEDULE, VINF_EM_RESCHEDULE_RAW,
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| 341 | * VINF_EM_RESCHEDULE_REM, VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
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| 342 | *
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[58122] | 343 | * @param pVM The cross context VM structure.
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[58123] | 344 | * @param pVCpu The cross context virtual CPU structure.
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[21222] | 345 | * @param pfFFDone Where to store an indicator telling whether or not
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| 346 | * FFs were done before returning.
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| 347 | */
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[43392] | 348 | int emR3HmExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone)
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[21222] | 349 | {
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[39405] | 350 | int rc = VERR_IPE_UNINITIALIZED_STATUS;
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[21222] | 351 |
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[72634] | 352 | LogFlow(("emR3HmExecute%d: (cs:eip=%04x:%RGv)\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
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[21222] | 353 | *pfFFDone = false;
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| 354 |
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[70979] | 355 | STAM_COUNTER_INC(&pVCpu->em.s.StatHMExecuteCalled);
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[21222] | 356 |
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| 357 | /*
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| 358 | * Spin till we get a forced action which returns anything but VINF_SUCCESS.
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| 359 | */
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| 360 | for (;;)
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| 361 | {
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[70979] | 362 | STAM_PROFILE_ADV_START(&pVCpu->em.s.StatHMEntry, a);
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[21222] | 363 |
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[26146] | 364 | /* Check if a forced reschedule is pending. */
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[72634] | 365 | if (HMR3IsRescheduleRequired(pVM, &pVCpu->cpum.GstCtx))
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[26146] | 366 | {
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| 367 | rc = VINF_EM_RESCHEDULE;
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| 368 | break;
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| 369 | }
|
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| 370 |
|
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[21222] | 371 | /*
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| 372 | * Process high priority pre-execution raw-mode FFs.
|
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| 373 | */
|
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[74791] | 374 | if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
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[74789] | 375 | || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
|
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[21222] | 376 | {
|
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[72634] | 377 | rc = emR3HmForcedActions(pVM, pVCpu);
|
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[21222] | 378 | if (rc != VINF_SUCCESS)
|
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| 379 | break;
|
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| 380 | }
|
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| 381 |
|
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| 382 | #ifdef LOG_ENABLED
|
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| 383 | /*
|
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| 384 | * Log important stuff before entering GC.
|
---|
| 385 | */
|
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| 386 | if (TRPMHasTrap(pVCpu))
|
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[72634] | 387 | Log(("CPU%d: Pending hardware interrupt=0x%x cs:rip=%04X:%RGv\n", pVCpu->idCpu, TRPMGetTrapNo(pVCpu), pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
|
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[21222] | 388 |
|
---|
[41939] | 389 | uint32_t cpl = CPUMGetGuestCPL(pVCpu);
|
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[22890] | 390 | if (pVM->cCpus == 1)
|
---|
[21222] | 391 | {
|
---|
[72634] | 392 | if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
|
---|
| 393 | Log(("HWV86: %08X IF=%d\n", pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
|
---|
| 394 | else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
|
---|
| 395 | Log(("HWR%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
|
---|
[21222] | 396 | else
|
---|
[72634] | 397 | Log(("HWR%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
|
---|
[21222] | 398 | }
|
---|
| 399 | else
|
---|
| 400 | {
|
---|
[72634] | 401 | if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
|
---|
| 402 | Log(("HWV86-CPU%d: %08X IF=%d\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
|
---|
| 403 | else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
|
---|
| 404 | Log(("HWR%d-CPU%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
|
---|
[21222] | 405 | else
|
---|
[72634] | 406 | Log(("HWR%d-CPU%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
|
---|
[21222] | 407 | }
|
---|
| 408 | #endif /* LOG_ENABLED */
|
---|
| 409 |
|
---|
| 410 | /*
|
---|
| 411 | * Execute the code.
|
---|
| 412 | */
|
---|
[70979] | 413 | STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatHMEntry, a);
|
---|
[21222] | 414 |
|
---|
[46423] | 415 | if (RT_LIKELY(emR3IsExecutionAllowed(pVM, pVCpu)))
|
---|
[32953] | 416 | {
|
---|
[70979] | 417 | STAM_PROFILE_START(&pVCpu->em.s.StatHMExec, x);
|
---|
[43392] | 418 | rc = VMMR3HmRunGC(pVM, pVCpu);
|
---|
[70979] | 419 | STAM_PROFILE_STOP(&pVCpu->em.s.StatHMExec, x);
|
---|
[32953] | 420 | }
|
---|
| 421 | else
|
---|
| 422 | {
|
---|
| 423 | /* Give up this time slice; virtual time continues */
|
---|
| 424 | STAM_REL_PROFILE_ADV_START(&pVCpu->em.s.StatCapped, u);
|
---|
[32956] | 425 | RTThreadSleep(5);
|
---|
[32953] | 426 | STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatCapped, u);
|
---|
[32954] | 427 | rc = VINF_SUCCESS;
|
---|
[32953] | 428 | }
|
---|
| 429 |
|
---|
[33676] | 430 |
|
---|
[21222] | 431 | /*
|
---|
| 432 | * Deal with high priority post execution FFs before doing anything else.
|
---|
| 433 | */
|
---|
[74795] | 434 | VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
|
---|
[74791] | 435 | if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
|
---|
[74789] | 436 | || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
|
---|
[72488] | 437 | rc = VBOXSTRICTRC_TODO(emR3HighPriorityPostForcedActions(pVM, pVCpu, rc));
|
---|
[21222] | 438 |
|
---|
| 439 | /*
|
---|
| 440 | * Process the returned status code.
|
---|
| 441 | */
|
---|
| 442 | if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
|
---|
| 443 | break;
|
---|
| 444 |
|
---|
[72634] | 445 | rc = emR3HmHandleRC(pVM, pVCpu, rc);
|
---|
[21222] | 446 | if (rc != VINF_SUCCESS)
|
---|
| 447 | break;
|
---|
| 448 |
|
---|
| 449 | /*
|
---|
| 450 | * Check and execute forced actions.
|
---|
| 451 | */
|
---|
| 452 | #ifdef VBOX_HIGH_RES_TIMERS_HACK
|
---|
| 453 | TMTimerPollVoid(pVM, pVCpu);
|
---|
| 454 | #endif
|
---|
[74791] | 455 | if ( VM_FF_IS_ANY_SET(pVM, VM_FF_ALL_MASK)
|
---|
[74789] | 456 | || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_ALL_MASK))
|
---|
[21222] | 457 | {
|
---|
| 458 | rc = emR3ForcedActions(pVM, pVCpu, rc);
|
---|
[40377] | 459 | VBOXVMM_EM_FF_ALL_RET(pVCpu, rc);
|
---|
[21222] | 460 | if ( rc != VINF_SUCCESS
|
---|
[43394] | 461 | && rc != VINF_EM_RESCHEDULE_HM)
|
---|
[21222] | 462 | {
|
---|
| 463 | *pfFFDone = true;
|
---|
| 464 | break;
|
---|
| 465 | }
|
---|
| 466 | }
|
---|
| 467 | }
|
---|
| 468 |
|
---|
| 469 | /*
|
---|
| 470 | * Return to outer loop.
|
---|
| 471 | */
|
---|
| 472 | #if defined(LOG_ENABLED) && defined(DEBUG)
|
---|
| 473 | RTLogFlush(NULL);
|
---|
| 474 | #endif
|
---|
| 475 | return rc;
|
---|
| 476 | }
|
---|
| 477 |
|
---|