VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/EMHM.cpp@ 84044

Last change on this file since 84044 was 82968, checked in by vboxsync, 4 years ago

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1/* $Id: EMHM.cpp 82968 2020-02-04 10:35:17Z vboxsync $ */
2/** @file
3 * EM - Execution Monitor / Manager - hardware virtualization
4 */
5
6/*
7 * Copyright (C) 2006-2020 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_EM
23#define VMCPU_INCL_CPUM_GST_CTX
24#include <VBox/vmm/em.h>
25#include <VBox/vmm/vmm.h>
26#include <VBox/vmm/selm.h>
27#include <VBox/vmm/trpm.h>
28#include <VBox/vmm/iem.h>
29#include <VBox/vmm/iom.h>
30#include <VBox/vmm/dbgf.h>
31#include <VBox/vmm/pgm.h>
32#include <VBox/vmm/tm.h>
33#include <VBox/vmm/mm.h>
34#include <VBox/vmm/ssm.h>
35#include <VBox/vmm/pdmapi.h>
36#include <VBox/vmm/pdmcritsect.h>
37#include <VBox/vmm/pdmqueue.h>
38#include <VBox/vmm/hm.h>
39#include "EMInternal.h"
40#include <VBox/vmm/vm.h>
41#include <VBox/vmm/gim.h>
42#include <VBox/vmm/cpumdis.h>
43#include <VBox/dis.h>
44#include <VBox/disopcode.h>
45#include <VBox/err.h>
46#include <VBox/vmm/dbgf.h>
47#include "VMMTracing.h"
48
49#include <iprt/asm.h>
50
51
52/*********************************************************************************************************************************
53* Internal Functions *
54*********************************************************************************************************************************/
55static int emR3HmHandleRC(PVM pVM, PVMCPU pVCpu, int rc);
56DECLINLINE(int) emR3HmExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC = VINF_SUCCESS);
57static int emR3HmExecuteIOInstruction(PVM pVM, PVMCPU pVCpu);
58static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu);
59
60#define EMHANDLERC_WITH_HM
61#define emR3ExecuteInstruction emR3HmExecuteInstruction
62#define emR3ExecuteIOInstruction emR3HmExecuteIOInstruction
63#include "EMHandleRCTmpl.h"
64
65
66/**
67 * Executes instruction in HM mode if we can.
68 *
69 * This is somewhat comparable to REMR3EmulateInstruction.
70 *
71 * @returns VBox strict status code.
72 * @retval VINF_EM_DBG_STEPPED on success.
73 * @retval VERR_EM_CANNOT_EXEC_GUEST if we cannot execute guest instructions in
74 * HM right now.
75 *
76 * @param pVM The cross context VM structure.
77 * @param pVCpu The cross context virtual CPU structure for the calling EMT.
78 * @param fFlags Combinations of EM_ONE_INS_FLAGS_XXX.
79 * @thread EMT.
80 */
81VMMR3_INT_DECL(VBOXSTRICTRC) EMR3HmSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
82{
83 Assert(!(fFlags & ~EM_ONE_INS_FLAGS_MASK));
84
85 if (!HMCanExecuteGuest(pVM, pVCpu, &pVCpu->cpum.GstCtx))
86 return VINF_EM_RESCHEDULE;
87
88 uint64_t const uOldRip = pVCpu->cpum.GstCtx.rip;
89 for (;;)
90 {
91 /*
92 * Service necessary FFs before going into HM.
93 */
94 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
95 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
96 {
97 VBOXSTRICTRC rcStrict = emR3HmForcedActions(pVM, pVCpu);
98 if (rcStrict != VINF_SUCCESS)
99 {
100 Log(("EMR3HmSingleInstruction: FFs before -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
101 return rcStrict;
102 }
103 }
104
105 /*
106 * Go execute it.
107 */
108 bool fOld = HMSetSingleInstruction(pVM, pVCpu, true);
109 VBOXSTRICTRC rcStrict = VMMR3HmRunGC(pVM, pVCpu);
110 HMSetSingleInstruction(pVM, pVCpu, fOld);
111 LogFlow(("EMR3HmSingleInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
112
113 /*
114 * Handle high priority FFs and informational status codes. We don't do
115 * normal FF processing the caller or the next call can deal with them.
116 */
117 VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
118 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
119 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
120 {
121 rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict);
122 LogFlow(("EMR3HmSingleInstruction: FFs after -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
123 }
124
125 if (rcStrict != VINF_SUCCESS && (rcStrict < VINF_EM_FIRST || rcStrict > VINF_EM_LAST))
126 {
127 rcStrict = emR3HmHandleRC(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
128 Log(("EMR3HmSingleInstruction: emR3HmHandleRC -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
129 }
130
131 /*
132 * Done?
133 */
134 if ( (rcStrict != VINF_SUCCESS && rcStrict != VINF_EM_DBG_STEPPED)
135 || !(fFlags & EM_ONE_INS_FLAGS_RIP_CHANGE)
136 || pVCpu->cpum.GstCtx.rip != uOldRip)
137 {
138 if (rcStrict == VINF_SUCCESS && pVCpu->cpum.GstCtx.rip != uOldRip)
139 rcStrict = VINF_EM_DBG_STEPPED;
140 Log(("EMR3HmSingleInstruction: returns %Rrc (rip %llx -> %llx)\n", VBOXSTRICTRC_VAL(rcStrict), uOldRip, pVCpu->cpum.GstCtx.rip));
141 CPUM_IMPORT_EXTRN_RET(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK);
142 return rcStrict;
143 }
144 }
145}
146
147
148/**
149 * Executes one (or perhaps a few more) instruction(s).
150 *
151 * @returns VBox status code suitable for EM.
152 *
153 * @param pVM The cross context VM structure.
154 * @param pVCpu The cross context virtual CPU structure.
155 * @param rcRC Return code from RC.
156 * @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
157 * instruction and prefix the log output with this text.
158 */
159#if defined(LOG_ENABLED) || defined(DOXYGEN_RUNNING)
160static int emR3HmExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC, const char *pszPrefix)
161#else
162static int emR3HmExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC)
163#endif
164{
165 RT_NOREF(rcRC, pVM);
166
167#ifdef LOG_ENABLED
168 /*
169 * Log it.
170 */
171 Log(("EMINS: %04x:%RGv RSP=%RGv\n", pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, (RTGCPTR)pVCpu->cpum.GstCtx.rsp));
172 if (pszPrefix)
173 {
174 DBGFR3_INFO_LOG(pVM, pVCpu, "cpumguest", pszPrefix);
175 DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, pszPrefix);
176 }
177#endif
178
179 /*
180 * Use IEM and fallback on REM if the functionality is missing.
181 * Once IEM gets mature enough, nothing should ever fall back.
182 */
183 STAM_PROFILE_START(&pVCpu->em.s.StatIEMEmu, a);
184 VBOXSTRICTRC rcStrict;
185 uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
186 RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
187 if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
188 {
189 CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
190 rcStrict = VBOXSTRICTRC_TODO(IEMExecOne(pVCpu));
191 }
192 else
193 {
194 RT_UNTRUSTED_VALIDATED_FENCE();
195 rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
196 LogFlow(("emR3HmExecuteInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
197 }
198 STAM_PROFILE_STOP(&pVCpu->em.s.StatIEMEmu, a);
199
200 return VBOXSTRICTRC_TODO(rcStrict);
201}
202
203
204/**
205 * Executes one (or perhaps a few more) instruction(s).
206 * This is just a wrapper for discarding pszPrefix in non-logging builds.
207 *
208 * @returns VBox status code suitable for EM.
209 * @param pVM The cross context VM structure.
210 * @param pVCpu The cross context virtual CPU structure.
211 * @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
212 * instruction and prefix the log output with this text.
213 * @param rcGC GC return code
214 */
215DECLINLINE(int) emR3HmExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC)
216{
217#ifdef LOG_ENABLED
218 return emR3HmExecuteInstructionWorker(pVM, pVCpu, rcGC, pszPrefix);
219#else
220 RT_NOREF_PV(pszPrefix);
221 return emR3HmExecuteInstructionWorker(pVM, pVCpu, rcGC);
222#endif
223}
224
225
226/**
227 * Executes one (or perhaps a few more) IO instruction(s).
228 *
229 * @returns VBox status code suitable for EM.
230 * @param pVM The cross context VM structure.
231 * @param pVCpu The cross context virtual CPU structure.
232 */
233static int emR3HmExecuteIOInstruction(PVM pVM, PVMCPU pVCpu)
234{
235 RT_NOREF(pVM);
236 STAM_PROFILE_START(&pVCpu->em.s.StatIOEmu, a);
237
238 VBOXSTRICTRC rcStrict;
239 uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
240 RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
241 if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
242 {
243 /*
244 * Hand it over to the interpreter.
245 */
246 CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
247 rcStrict = IEMExecOne(pVCpu);
248 LogFlow(("emR3HmExecuteIOInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
249 }
250 else
251 {
252 RT_UNTRUSTED_VALIDATED_FENCE();
253 CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
254 rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
255 LogFlow(("emR3HmExecuteIOInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
256 STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIoRestarted);
257 }
258
259 STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIoIem);
260 STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
261 return VBOXSTRICTRC_TODO(rcStrict);
262}
263
264
265/**
266 * Process HM specific forced actions.
267 *
268 * This function is called when any FFs in the VM_FF_HIGH_PRIORITY_PRE_RAW_MASK
269 * or/and VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK are pending.
270 *
271 * @returns VBox status code. May return VINF_EM_NO_MEMORY but none of the other
272 * EM statuses.
273 * @param pVM The cross context VM structure.
274 * @param pVCpu The cross context virtual CPU structure.
275 */
276static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu)
277{
278 /*
279 * Sync page directory.
280 */
281 if (VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL))
282 {
283 CPUM_IMPORT_EXTRN_RET(pVCpu, CPUMCTX_EXTRN_CR0 | CPUMCTX_EXTRN_CR3 | CPUMCTX_EXTRN_CR4);
284 Assert(pVCpu->em.s.enmState != EMSTATE_WAIT_SIPI);
285 int rc = PGMSyncCR3(pVCpu, pVCpu->cpum.GstCtx.cr0, pVCpu->cpum.GstCtx.cr3, pVCpu->cpum.GstCtx.cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
286 if (RT_FAILURE(rc))
287 return rc;
288
289 /* Prefetch pages for EIP and ESP. */
290 /** @todo This is rather expensive. Should investigate if it really helps at all. */
291 /** @todo this should be skipped! */
292 CPUM_IMPORT_EXTRN_RET(pVCpu, CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_SS);
293 rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVM, DISSELREG_CS, CPUMCTX2CORE(&pVCpu->cpum.GstCtx), pVCpu->cpum.GstCtx.rip));
294 if (rc == VINF_SUCCESS)
295 rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVM, DISSELREG_SS, CPUMCTX2CORE(&pVCpu->cpum.GstCtx), pVCpu->cpum.GstCtx.rsp));
296 if (rc != VINF_SUCCESS)
297 {
298 if (rc != VINF_PGM_SYNC_CR3)
299 {
300 AssertLogRelMsgReturn(RT_FAILURE(rc), ("%Rrc\n", rc), VERR_IPE_UNEXPECTED_INFO_STATUS);
301 return rc;
302 }
303 rc = PGMSyncCR3(pVCpu, pVCpu->cpum.GstCtx.cr0, pVCpu->cpum.GstCtx.cr3, pVCpu->cpum.GstCtx.cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
304 if (RT_FAILURE(rc))
305 return rc;
306 }
307 /** @todo maybe prefetch the supervisor stack page as well */
308 }
309
310 /*
311 * Allocate handy pages (just in case the above actions have consumed some pages).
312 */
313 if (VM_FF_IS_PENDING_EXCEPT(pVM, VM_FF_PGM_NEED_HANDY_PAGES, VM_FF_PGM_NO_MEMORY))
314 {
315 int rc = PGMR3PhysAllocateHandyPages(pVM);
316 if (RT_FAILURE(rc))
317 return rc;
318 }
319
320 /*
321 * Check whether we're out of memory now.
322 *
323 * This may stem from some of the above actions or operations that has been executed
324 * since we ran FFs. The allocate handy pages must for instance always be followed by
325 * this check.
326 */
327 if (VM_FF_IS_SET(pVM, VM_FF_PGM_NO_MEMORY))
328 return VINF_EM_NO_MEMORY;
329
330 return VINF_SUCCESS;
331}
332
333
334/**
335 * Executes hardware accelerated raw code. (Intel VT-x & AMD-V)
336 *
337 * This function contains the raw-mode version of the inner
338 * execution loop (the outer loop being in EMR3ExecuteVM()).
339 *
340 * @returns VBox status code. The most important ones are: VINF_EM_RESCHEDULE, VINF_EM_RESCHEDULE_RAW,
341 * VINF_EM_RESCHEDULE_REM, VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
342 *
343 * @param pVM The cross context VM structure.
344 * @param pVCpu The cross context virtual CPU structure.
345 * @param pfFFDone Where to store an indicator telling whether or not
346 * FFs were done before returning.
347 */
348int emR3HmExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone)
349{
350 int rc = VERR_IPE_UNINITIALIZED_STATUS;
351
352 LogFlow(("emR3HmExecute%d: (cs:eip=%04x:%RGv)\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
353 *pfFFDone = false;
354
355 STAM_COUNTER_INC(&pVCpu->em.s.StatHMExecuteCalled);
356
357 /*
358 * Spin till we get a forced action which returns anything but VINF_SUCCESS.
359 */
360 for (;;)
361 {
362 STAM_PROFILE_ADV_START(&pVCpu->em.s.StatHMEntry, a);
363
364 /* Check if a forced reschedule is pending. */
365 if (HMR3IsRescheduleRequired(pVM, &pVCpu->cpum.GstCtx))
366 {
367 rc = VINF_EM_RESCHEDULE;
368 break;
369 }
370
371 /*
372 * Process high priority pre-execution raw-mode FFs.
373 */
374 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
375 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
376 {
377 rc = emR3HmForcedActions(pVM, pVCpu);
378 if (rc != VINF_SUCCESS)
379 break;
380 }
381
382#ifdef LOG_ENABLED
383 /*
384 * Log important stuff before entering GC.
385 */
386 if (TRPMHasTrap(pVCpu))
387 Log(("CPU%d: Pending hardware interrupt=0x%x cs:rip=%04X:%RGv\n", pVCpu->idCpu, TRPMGetTrapNo(pVCpu), pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
388
389 uint32_t cpl = CPUMGetGuestCPL(pVCpu);
390 if (pVM->cCpus == 1)
391 {
392 if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
393 Log(("HWV86: %08X IF=%d\n", pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
394 else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
395 Log(("HWR%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
396 else
397 Log(("HWR%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
398 }
399 else
400 {
401 if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
402 Log(("HWV86-CPU%d: %08X IF=%d\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
403 else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
404 Log(("HWR%d-CPU%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
405 else
406 Log(("HWR%d-CPU%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
407 }
408#endif /* LOG_ENABLED */
409
410 /*
411 * Execute the code.
412 */
413 STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatHMEntry, a);
414
415 if (RT_LIKELY(emR3IsExecutionAllowed(pVM, pVCpu)))
416 {
417 STAM_PROFILE_START(&pVCpu->em.s.StatHMExec, x);
418 rc = VMMR3HmRunGC(pVM, pVCpu);
419 STAM_PROFILE_STOP(&pVCpu->em.s.StatHMExec, x);
420 }
421 else
422 {
423 /* Give up this time slice; virtual time continues */
424 STAM_REL_PROFILE_ADV_START(&pVCpu->em.s.StatCapped, u);
425 RTThreadSleep(5);
426 STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatCapped, u);
427 rc = VINF_SUCCESS;
428 }
429
430
431 /*
432 * Deal with high priority post execution FFs before doing anything else.
433 */
434 VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
435 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
436 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
437 rc = VBOXSTRICTRC_TODO(emR3HighPriorityPostForcedActions(pVM, pVCpu, rc));
438
439 /*
440 * Process the returned status code.
441 */
442 if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
443 break;
444
445 rc = emR3HmHandleRC(pVM, pVCpu, rc);
446 if (rc != VINF_SUCCESS)
447 break;
448
449 /*
450 * Check and execute forced actions.
451 */
452#ifdef VBOX_HIGH_RES_TIMERS_HACK
453 TMTimerPollVoid(pVM, pVCpu);
454#endif
455 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_ALL_MASK)
456 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_ALL_MASK))
457 {
458 rc = emR3ForcedActions(pVM, pVCpu, rc);
459 VBOXVMM_EM_FF_ALL_RET(pVCpu, rc);
460 if ( rc != VINF_SUCCESS
461 && rc != VINF_EM_RESCHEDULE_HM)
462 {
463 *pfFFDone = true;
464 break;
465 }
466 }
467 }
468
469 /*
470 * Return to outer loop.
471 */
472#if defined(LOG_ENABLED) && defined(DEBUG)
473 RTLogFlush(NULL);
474#endif
475 return rc;
476}
477
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