[21222] | 1 | /* $Id: EMHM.cpp 74795 2018-10-12 11:24:11Z vboxsync $ */
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| 2 | /** @file
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| 3 | * EM - Execution Monitor / Manager - hardware virtualization
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| 4 | */
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| 5 |
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| 6 | /*
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[69111] | 7 | * Copyright (C) 2006-2017 Oracle Corporation
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[21222] | 8 | *
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| 9 | * This file is part of VirtualBox Open Source Edition (OSE), as
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| 10 | * available from http://www.virtualbox.org. This file is free software;
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| 11 | * you can redistribute it and/or modify it under the terms of the GNU
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| 12 | * General Public License (GPL) as published by the Free Software
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| 13 | * Foundation, in version 2 as it comes in the "COPYING" file of the
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| 14 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
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| 15 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
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| 16 | */
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| 17 |
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[57358] | 18 |
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| 19 | /*********************************************************************************************************************************
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| 20 | * Header Files *
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| 21 | *********************************************************************************************************************************/
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[21222] | 22 | #define LOG_GROUP LOG_GROUP_EM
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[72488] | 23 | #define VMCPU_INCL_CPUM_GST_CTX
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[35346] | 24 | #include <VBox/vmm/em.h>
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| 25 | #include <VBox/vmm/vmm.h>
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| 26 | #include <VBox/vmm/csam.h>
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| 27 | #include <VBox/vmm/selm.h>
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| 28 | #include <VBox/vmm/trpm.h>
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[40274] | 29 | #include <VBox/vmm/iem.h>
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[35346] | 30 | #include <VBox/vmm/iom.h>
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| 31 | #include <VBox/vmm/dbgf.h>
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| 32 | #include <VBox/vmm/pgm.h>
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[40274] | 33 | #ifdef VBOX_WITH_REM
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| 34 | # include <VBox/vmm/rem.h>
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| 35 | #endif
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[35346] | 36 | #include <VBox/vmm/tm.h>
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| 37 | #include <VBox/vmm/mm.h>
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| 38 | #include <VBox/vmm/ssm.h>
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| 39 | #include <VBox/vmm/pdmapi.h>
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| 40 | #include <VBox/vmm/pdmcritsect.h>
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| 41 | #include <VBox/vmm/pdmqueue.h>
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[43387] | 42 | #include <VBox/vmm/hm.h>
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[21222] | 43 | #include "EMInternal.h"
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[35346] | 44 | #include <VBox/vmm/vm.h>
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[57989] | 45 | #include <VBox/vmm/gim.h>
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[35346] | 46 | #include <VBox/vmm/cpumdis.h>
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[21222] | 47 | #include <VBox/dis.h>
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| 48 | #include <VBox/disopcode.h>
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[35346] | 49 | #include <VBox/vmm/dbgf.h>
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[40375] | 50 | #include "VMMTracing.h"
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[21222] | 51 |
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[29250] | 52 | #include <iprt/asm.h>
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[21222] | 53 |
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[29250] | 54 |
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[57358] | 55 | /*********************************************************************************************************************************
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| 56 | * Internal Functions *
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| 57 | *********************************************************************************************************************************/
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[72634] | 58 | static int emR3HmHandleRC(PVM pVM, PVMCPU pVCpu, int rc);
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[47788] | 59 | DECLINLINE(int) emR3HmExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC = VINF_SUCCESS);
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| 60 | static int emR3HmExecuteIOInstruction(PVM pVM, PVMCPU pVCpu);
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[72634] | 61 | static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu);
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[21222] | 62 |
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[43387] | 63 | #define EMHANDLERC_WITH_HM
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[47788] | 64 | #define emR3ExecuteInstruction emR3HmExecuteInstruction
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| 65 | #define emR3ExecuteIOInstruction emR3HmExecuteIOInstruction
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[21222] | 66 | #include "EMHandleRCTmpl.h"
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| 67 |
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| 68 |
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| 69 | /**
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[47619] | 70 | * Executes instruction in HM mode if we can.
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| 71 | *
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| 72 | * This is somewhat comparable to REMR3EmulateInstruction.
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| 73 | *
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| 74 | * @returns VBox strict status code.
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| 75 | * @retval VINF_EM_DBG_STEPPED on success.
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| 76 | * @retval VERR_EM_CANNOT_EXEC_GUEST if we cannot execute guest instructions in
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| 77 | * HM right now.
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| 78 | *
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[58123] | 79 | * @param pVM The cross context VM structure.
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| 80 | * @param pVCpu The cross context virtual CPU structure for the calling EMT.
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| 81 | * @param fFlags Combinations of EM_ONE_INS_FLAGS_XXX.
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[47619] | 82 | * @thread EMT.
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| 83 | */
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[47671] | 84 | VMMR3_INT_DECL(VBOXSTRICTRC) EMR3HmSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
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[47619] | 85 | {
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[47671] | 86 | Assert(!(fFlags & ~EM_ONE_INS_FLAGS_MASK));
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| 87 |
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[73617] | 88 | if (!HMCanExecuteGuest(pVCpu, &pVCpu->cpum.GstCtx))
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[47619] | 89 | return VINF_EM_RESCHEDULE;
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| 90 |
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[72634] | 91 | uint64_t const uOldRip = pVCpu->cpum.GstCtx.rip;
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[47671] | 92 | for (;;)
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[47619] | 93 | {
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[47671] | 94 | /*
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| 95 | * Service necessary FFs before going into HM.
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| 96 | */
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[74791] | 97 | if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
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[74789] | 98 | || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
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[47619] | 99 | {
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[72634] | 100 | VBOXSTRICTRC rcStrict = emR3HmForcedActions(pVM, pVCpu);
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[47671] | 101 | if (rcStrict != VINF_SUCCESS)
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| 102 | {
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| 103 | Log(("EMR3HmSingleInstruction: FFs before -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
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| 104 | return rcStrict;
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| 105 | }
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[47619] | 106 | }
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| 107 |
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[47671] | 108 | /*
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| 109 | * Go execute it.
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| 110 | */
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[58998] | 111 | bool fOld = HMSetSingleInstruction(pVM, pVCpu, true);
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[47671] | 112 | VBOXSTRICTRC rcStrict = VMMR3HmRunGC(pVM, pVCpu);
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[58998] | 113 | HMSetSingleInstruction(pVM, pVCpu, fOld);
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[47671] | 114 | LogFlow(("EMR3HmSingleInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
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[47619] | 115 |
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[47671] | 116 | /*
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| 117 | * Handle high priority FFs and informational status codes. We don't do
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| 118 | * normal FF processing the caller or the next call can deal with them.
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| 119 | */
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[74795] | 120 | VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
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[74791] | 121 | if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
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[74789] | 122 | || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
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[47671] | 123 | {
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[72488] | 124 | rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict);
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[47671] | 125 | LogFlow(("EMR3HmSingleInstruction: FFs after -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
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| 126 | }
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[47619] | 127 |
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[47671] | 128 | if (rcStrict != VINF_SUCCESS && (rcStrict < VINF_EM_FIRST || rcStrict > VINF_EM_LAST))
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| 129 | {
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[72634] | 130 | rcStrict = emR3HmHandleRC(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
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[47671] | 131 | Log(("EMR3HmSingleInstruction: emR3HmHandleRC -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
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| 132 | }
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| 133 |
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| 134 | /*
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| 135 | * Done?
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| 136 | */
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| 137 | if ( (rcStrict != VINF_SUCCESS && rcStrict != VINF_EM_DBG_STEPPED)
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| 138 | || !(fFlags & EM_ONE_INS_FLAGS_RIP_CHANGE)
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[72634] | 139 | || pVCpu->cpum.GstCtx.rip != uOldRip)
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[47671] | 140 | {
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[72634] | 141 | if (rcStrict == VINF_SUCCESS && pVCpu->cpum.GstCtx.rip != uOldRip)
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[47671] | 142 | rcStrict = VINF_EM_DBG_STEPPED;
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[72634] | 143 | Log(("EMR3HmSingleInstruction: returns %Rrc (rip %llx -> %llx)\n", VBOXSTRICTRC_VAL(rcStrict), uOldRip, pVCpu->cpum.GstCtx.rip));
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[72598] | 144 | CPUM_IMPORT_EXTRN_RET(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK);
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[47671] | 145 | return rcStrict;
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| 146 | }
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[47619] | 147 | }
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| 148 | }
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| 149 |
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| 150 |
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| 151 | /**
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[21222] | 152 | * Executes one (or perhaps a few more) instruction(s).
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| 153 | *
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| 154 | * @returns VBox status code suitable for EM.
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| 155 | *
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[58122] | 156 | * @param pVM The cross context VM structure.
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[58123] | 157 | * @param pVCpu The cross context virtual CPU structure.
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[39078] | 158 | * @param rcRC Return code from RC.
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[21222] | 159 | * @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
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| 160 | * instruction and prefix the log output with this text.
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| 161 | */
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[58126] | 162 | #if defined(LOG_ENABLED) || defined(DOXYGEN_RUNNING)
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[47788] | 163 | static int emR3HmExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC, const char *pszPrefix)
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[21222] | 164 | #else
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[47788] | 165 | static int emR3HmExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC)
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[21222] | 166 | #endif
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| 167 | {
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[39078] | 168 | NOREF(rcRC);
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[21222] | 169 |
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| 170 | #ifdef LOG_ENABLED
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| 171 | /*
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[47788] | 172 | * Log it.
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[21222] | 173 | */
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[72634] | 174 | Log(("EMINS: %04x:%RGv RSP=%RGv\n", pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, (RTGCPTR)pVCpu->cpum.GstCtx.rsp));
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[21222] | 175 | if (pszPrefix)
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| 176 | {
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[61634] | 177 | DBGFR3_INFO_LOG(pVM, pVCpu, "cpumguest", pszPrefix);
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[44399] | 178 | DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, pszPrefix);
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[21222] | 179 | }
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[47788] | 180 | #endif
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[21222] | 181 |
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[47788] | 182 | /*
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| 183 | * Use IEM and fallback on REM if the functionality is missing.
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| 184 | * Once IEM gets mature enough, nothing should ever fall back.
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| 185 | */
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| 186 | STAM_PROFILE_START(&pVCpu->em.s.StatIEMEmu, a);
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[72598] | 187 | VBOXSTRICTRC rcStrict;
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| 188 | uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
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| 189 | RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
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| 190 | if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
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| 191 | {
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| 192 | CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
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| 193 | rcStrict = VBOXSTRICTRC_TODO(IEMExecOne(pVCpu));
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| 194 | }
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| 195 | else
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| 196 | {
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| 197 | RT_UNTRUSTED_VALIDATED_FENCE();
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| 198 | rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
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| 199 | LogFlow(("emR3HmExecuteInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
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| 200 | }
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[47788] | 201 | STAM_PROFILE_STOP(&pVCpu->em.s.StatIEMEmu, a);
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| 202 |
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[72598] | 203 | if ( rcStrict == VERR_IEM_ASPECT_NOT_IMPLEMENTED
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| 204 | || rcStrict == VERR_IEM_INSTR_NOT_IMPLEMENTED)
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[21222] | 205 | {
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[40274] | 206 | #ifdef VBOX_WITH_REM
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[47790] | 207 | STAM_PROFILE_START(&pVCpu->em.s.StatREMEmu, b);
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[47788] | 208 | EMRemLock(pVM);
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| 209 | /* Flush the recompiler TLB if the VCPU has changed. */
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| 210 | if (pVM->em.s.idLastRemCpu != pVCpu->idCpu)
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| 211 | CPUMSetChangedFlags(pVCpu, CPUM_CHANGED_ALL);
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| 212 | pVM->em.s.idLastRemCpu = pVCpu->idCpu;
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[21222] | 213 |
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[72598] | 214 | rcStrict = REMR3EmulateInstruction(pVM, pVCpu);
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[47788] | 215 | EMRemUnlock(pVM);
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[47790] | 216 | STAM_PROFILE_STOP(&pVCpu->em.s.StatREMEmu, b);
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[47788] | 217 | #else /* !VBOX_WITH_REM */
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| 218 | NOREF(pVM);
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| 219 | #endif /* !VBOX_WITH_REM */
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| 220 | }
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[21222] | 221 |
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[72598] | 222 | return VBOXSTRICTRC_TODO(rcStrict);
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[21222] | 223 | }
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| 224 |
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| 225 |
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| 226 | /**
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| 227 | * Executes one (or perhaps a few more) instruction(s).
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| 228 | * This is just a wrapper for discarding pszPrefix in non-logging builds.
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| 229 | *
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| 230 | * @returns VBox status code suitable for EM.
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[58122] | 231 | * @param pVM The cross context VM structure.
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[58123] | 232 | * @param pVCpu The cross context virtual CPU structure.
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[21222] | 233 | * @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
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| 234 | * instruction and prefix the log output with this text.
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| 235 | * @param rcGC GC return code
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| 236 | */
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[47788] | 237 | DECLINLINE(int) emR3HmExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC)
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[21222] | 238 | {
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| 239 | #ifdef LOG_ENABLED
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[47788] | 240 | return emR3HmExecuteInstructionWorker(pVM, pVCpu, rcGC, pszPrefix);
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[21222] | 241 | #else
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[62637] | 242 | RT_NOREF_PV(pszPrefix);
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[47788] | 243 | return emR3HmExecuteInstructionWorker(pVM, pVCpu, rcGC);
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[21222] | 244 | #endif
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| 245 | }
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| 246 |
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[73224] | 247 |
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[21222] | 248 | /**
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| 249 | * Executes one (or perhaps a few more) IO instruction(s).
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| 250 | *
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| 251 | * @returns VBox status code suitable for EM.
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[58122] | 252 | * @param pVM The cross context VM structure.
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[58123] | 253 | * @param pVCpu The cross context virtual CPU structure.
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[21222] | 254 | */
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[47788] | 255 | static int emR3HmExecuteIOInstruction(PVM pVM, PVMCPU pVCpu)
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[21222] | 256 | {
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[73203] | 257 | RT_NOREF(pVM);
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[21222] | 258 | STAM_PROFILE_START(&pVCpu->em.s.StatIOEmu, a);
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| 259 |
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[72598] | 260 | VBOXSTRICTRC rcStrict;
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| 261 | uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
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| 262 | RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
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| 263 | if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
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[21222] | 264 | {
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[72598] | 265 | /*
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| 266 | * Hand it over to the interpreter.
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| 267 | */
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| 268 | CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
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| 269 | rcStrict = IEMExecOne(pVCpu);
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| 270 | LogFlow(("emR3HmExecuteIOInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
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| 271 | }
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| 272 | else
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| 273 | {
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| 274 | RT_UNTRUSTED_VALIDATED_FENCE();
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| 275 | CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
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| 276 | rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
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| 277 | LogFlow(("emR3HmExecuteIOInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
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[21222] | 278 | STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIoRestarted);
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| 279 | }
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| 280 |
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[47421] | 281 | STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIoIem);
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| 282 | STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
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| 283 | return VBOXSTRICTRC_TODO(rcStrict);
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[21222] | 284 | }
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| 285 |
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| 286 |
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| 287 | /**
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[70979] | 288 | * Process HM specific forced actions.
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[21222] | 289 | *
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[70979] | 290 | * This function is called when any FFs in the VM_FF_HIGH_PRIORITY_PRE_RAW_MASK
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| 291 | * or/and VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK are pending.
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[21222] | 292 | *
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| 293 | * @returns VBox status code. May return VINF_EM_NO_MEMORY but none of the other
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| 294 | * EM statuses.
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[58122] | 295 | * @param pVM The cross context VM structure.
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[58123] | 296 | * @param pVCpu The cross context virtual CPU structure.
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[21222] | 297 | */
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[72634] | 298 | static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu)
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[21222] | 299 | {
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| 300 | /*
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| 301 | * Sync page directory.
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| 302 | */
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[74789] | 303 | if (VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL))
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[21222] | 304 | {
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[72598] | 305 | CPUM_IMPORT_EXTRN_RET(pVCpu, CPUMCTX_EXTRN_CR0 | CPUMCTX_EXTRN_CR3 | CPUMCTX_EXTRN_CR4);
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[21222] | 306 | Assert(pVCpu->em.s.enmState != EMSTATE_WAIT_SIPI);
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[72634] | 307 | int rc = PGMSyncCR3(pVCpu, pVCpu->cpum.GstCtx.cr0, pVCpu->cpum.GstCtx.cr3, pVCpu->cpum.GstCtx.cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
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[21222] | 308 | if (RT_FAILURE(rc))
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| 309 | return rc;
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| 310 |
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[45533] | 311 | #ifdef VBOX_WITH_RAW_MODE
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[74789] | 312 | Assert(!VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT));
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[45533] | 313 | #endif
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[21222] | 314 |
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| 315 | /* Prefetch pages for EIP and ESP. */
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| 316 | /** @todo This is rather expensive. Should investigate if it really helps at all. */
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[72598] | 317 | /** @todo this should be skipped! */
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| 318 | CPUM_IMPORT_EXTRN_RET(pVCpu, CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_SS);
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[72634] | 319 | rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVM, DISSELREG_CS, CPUMCTX2CORE(&pVCpu->cpum.GstCtx), pVCpu->cpum.GstCtx.rip));
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[21222] | 320 | if (rc == VINF_SUCCESS)
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[72634] | 321 | rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVM, DISSELREG_SS, CPUMCTX2CORE(&pVCpu->cpum.GstCtx), pVCpu->cpum.GstCtx.rsp));
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[21222] | 322 | if (rc != VINF_SUCCESS)
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| 323 | {
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---|
| 324 | if (rc != VINF_PGM_SYNC_CR3)
|
---|
| 325 | {
|
---|
| 326 | AssertLogRelMsgReturn(RT_FAILURE(rc), ("%Rrc\n", rc), VERR_IPE_UNEXPECTED_INFO_STATUS);
|
---|
| 327 | return rc;
|
---|
| 328 | }
|
---|
[72634] | 329 | rc = PGMSyncCR3(pVCpu, pVCpu->cpum.GstCtx.cr0, pVCpu->cpum.GstCtx.cr3, pVCpu->cpum.GstCtx.cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
|
---|
[21222] | 330 | if (RT_FAILURE(rc))
|
---|
| 331 | return rc;
|
---|
| 332 | }
|
---|
| 333 | /** @todo maybe prefetch the supervisor stack page as well */
|
---|
[45533] | 334 | #ifdef VBOX_WITH_RAW_MODE
|
---|
[74789] | 335 | Assert(!VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT));
|
---|
[45533] | 336 | #endif
|
---|
[21222] | 337 | }
|
---|
| 338 |
|
---|
| 339 | /*
|
---|
| 340 | * Allocate handy pages (just in case the above actions have consumed some pages).
|
---|
| 341 | */
|
---|
| 342 | if (VM_FF_IS_PENDING_EXCEPT(pVM, VM_FF_PGM_NEED_HANDY_PAGES, VM_FF_PGM_NO_MEMORY))
|
---|
| 343 | {
|
---|
| 344 | int rc = PGMR3PhysAllocateHandyPages(pVM);
|
---|
| 345 | if (RT_FAILURE(rc))
|
---|
| 346 | return rc;
|
---|
| 347 | }
|
---|
| 348 |
|
---|
| 349 | /*
|
---|
| 350 | * Check whether we're out of memory now.
|
---|
| 351 | *
|
---|
| 352 | * This may stem from some of the above actions or operations that has been executed
|
---|
| 353 | * since we ran FFs. The allocate handy pages must for instance always be followed by
|
---|
| 354 | * this check.
|
---|
| 355 | */
|
---|
[74790] | 356 | if (VM_FF_IS_SET(pVM, VM_FF_PGM_NO_MEMORY))
|
---|
[21222] | 357 | return VINF_EM_NO_MEMORY;
|
---|
| 358 |
|
---|
| 359 | return VINF_SUCCESS;
|
---|
| 360 | }
|
---|
| 361 |
|
---|
| 362 |
|
---|
| 363 | /**
|
---|
| 364 | * Executes hardware accelerated raw code. (Intel VT-x & AMD-V)
|
---|
| 365 | *
|
---|
| 366 | * This function contains the raw-mode version of the inner
|
---|
| 367 | * execution loop (the outer loop being in EMR3ExecuteVM()).
|
---|
| 368 | *
|
---|
| 369 | * @returns VBox status code. The most important ones are: VINF_EM_RESCHEDULE, VINF_EM_RESCHEDULE_RAW,
|
---|
| 370 | * VINF_EM_RESCHEDULE_REM, VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
|
---|
| 371 | *
|
---|
[58122] | 372 | * @param pVM The cross context VM structure.
|
---|
[58123] | 373 | * @param pVCpu The cross context virtual CPU structure.
|
---|
[21222] | 374 | * @param pfFFDone Where to store an indicator telling whether or not
|
---|
| 375 | * FFs were done before returning.
|
---|
| 376 | */
|
---|
[43392] | 377 | int emR3HmExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone)
|
---|
[21222] | 378 | {
|
---|
[39405] | 379 | int rc = VERR_IPE_UNINITIALIZED_STATUS;
|
---|
[21222] | 380 |
|
---|
[72634] | 381 | LogFlow(("emR3HmExecute%d: (cs:eip=%04x:%RGv)\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
|
---|
[21222] | 382 | *pfFFDone = false;
|
---|
| 383 |
|
---|
[70979] | 384 | STAM_COUNTER_INC(&pVCpu->em.s.StatHMExecuteCalled);
|
---|
[21222] | 385 |
|
---|
| 386 | /*
|
---|
| 387 | * Spin till we get a forced action which returns anything but VINF_SUCCESS.
|
---|
| 388 | */
|
---|
| 389 | for (;;)
|
---|
| 390 | {
|
---|
[70979] | 391 | STAM_PROFILE_ADV_START(&pVCpu->em.s.StatHMEntry, a);
|
---|
[21222] | 392 |
|
---|
[26146] | 393 | /* Check if a forced reschedule is pending. */
|
---|
[72634] | 394 | if (HMR3IsRescheduleRequired(pVM, &pVCpu->cpum.GstCtx))
|
---|
[26146] | 395 | {
|
---|
| 396 | rc = VINF_EM_RESCHEDULE;
|
---|
| 397 | break;
|
---|
| 398 | }
|
---|
| 399 |
|
---|
[21222] | 400 | /*
|
---|
| 401 | * Process high priority pre-execution raw-mode FFs.
|
---|
| 402 | */
|
---|
[45533] | 403 | #ifdef VBOX_WITH_RAW_MODE
|
---|
[74789] | 404 | Assert(!VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT));
|
---|
[45533] | 405 | #endif
|
---|
[74791] | 406 | if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
|
---|
[74789] | 407 | || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
|
---|
[21222] | 408 | {
|
---|
[72634] | 409 | rc = emR3HmForcedActions(pVM, pVCpu);
|
---|
[21222] | 410 | if (rc != VINF_SUCCESS)
|
---|
| 411 | break;
|
---|
| 412 | }
|
---|
| 413 |
|
---|
| 414 | #ifdef LOG_ENABLED
|
---|
| 415 | /*
|
---|
| 416 | * Log important stuff before entering GC.
|
---|
| 417 | */
|
---|
| 418 | if (TRPMHasTrap(pVCpu))
|
---|
[72634] | 419 | Log(("CPU%d: Pending hardware interrupt=0x%x cs:rip=%04X:%RGv\n", pVCpu->idCpu, TRPMGetTrapNo(pVCpu), pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
|
---|
[21222] | 420 |
|
---|
[41939] | 421 | uint32_t cpl = CPUMGetGuestCPL(pVCpu);
|
---|
[22890] | 422 | if (pVM->cCpus == 1)
|
---|
[21222] | 423 | {
|
---|
[72634] | 424 | if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
|
---|
| 425 | Log(("HWV86: %08X IF=%d\n", pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
|
---|
| 426 | else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
|
---|
| 427 | Log(("HWR%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
|
---|
[21222] | 428 | else
|
---|
[72634] | 429 | Log(("HWR%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
|
---|
[21222] | 430 | }
|
---|
| 431 | else
|
---|
| 432 | {
|
---|
[72634] | 433 | if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
|
---|
| 434 | Log(("HWV86-CPU%d: %08X IF=%d\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
|
---|
| 435 | else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
|
---|
| 436 | Log(("HWR%d-CPU%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
|
---|
[21222] | 437 | else
|
---|
[72634] | 438 | Log(("HWR%d-CPU%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
|
---|
[21222] | 439 | }
|
---|
| 440 | #endif /* LOG_ENABLED */
|
---|
| 441 |
|
---|
| 442 | /*
|
---|
| 443 | * Execute the code.
|
---|
| 444 | */
|
---|
[70979] | 445 | STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatHMEntry, a);
|
---|
[21222] | 446 |
|
---|
[46423] | 447 | if (RT_LIKELY(emR3IsExecutionAllowed(pVM, pVCpu)))
|
---|
[32953] | 448 | {
|
---|
[70979] | 449 | STAM_PROFILE_START(&pVCpu->em.s.StatHMExec, x);
|
---|
[43392] | 450 | rc = VMMR3HmRunGC(pVM, pVCpu);
|
---|
[70979] | 451 | STAM_PROFILE_STOP(&pVCpu->em.s.StatHMExec, x);
|
---|
[32953] | 452 | }
|
---|
| 453 | else
|
---|
| 454 | {
|
---|
| 455 | /* Give up this time slice; virtual time continues */
|
---|
| 456 | STAM_REL_PROFILE_ADV_START(&pVCpu->em.s.StatCapped, u);
|
---|
[32956] | 457 | RTThreadSleep(5);
|
---|
[32953] | 458 | STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatCapped, u);
|
---|
[32954] | 459 | rc = VINF_SUCCESS;
|
---|
[32953] | 460 | }
|
---|
| 461 |
|
---|
[33676] | 462 |
|
---|
[21222] | 463 | /*
|
---|
| 464 | * Deal with high priority post execution FFs before doing anything else.
|
---|
| 465 | */
|
---|
[74795] | 466 | VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
|
---|
[74791] | 467 | if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
|
---|
[74789] | 468 | || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
|
---|
[72488] | 469 | rc = VBOXSTRICTRC_TODO(emR3HighPriorityPostForcedActions(pVM, pVCpu, rc));
|
---|
[21222] | 470 |
|
---|
| 471 | /*
|
---|
| 472 | * Process the returned status code.
|
---|
| 473 | */
|
---|
| 474 | if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
|
---|
| 475 | break;
|
---|
| 476 |
|
---|
[72634] | 477 | rc = emR3HmHandleRC(pVM, pVCpu, rc);
|
---|
[21222] | 478 | if (rc != VINF_SUCCESS)
|
---|
| 479 | break;
|
---|
| 480 |
|
---|
| 481 | /*
|
---|
| 482 | * Check and execute forced actions.
|
---|
| 483 | */
|
---|
| 484 | #ifdef VBOX_HIGH_RES_TIMERS_HACK
|
---|
| 485 | TMTimerPollVoid(pVM, pVCpu);
|
---|
| 486 | #endif
|
---|
[74791] | 487 | if ( VM_FF_IS_ANY_SET(pVM, VM_FF_ALL_MASK)
|
---|
[74789] | 488 | || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_ALL_MASK))
|
---|
[21222] | 489 | {
|
---|
| 490 | rc = emR3ForcedActions(pVM, pVCpu, rc);
|
---|
[40377] | 491 | VBOXVMM_EM_FF_ALL_RET(pVCpu, rc);
|
---|
[21222] | 492 | if ( rc != VINF_SUCCESS
|
---|
[43394] | 493 | && rc != VINF_EM_RESCHEDULE_HM)
|
---|
[21222] | 494 | {
|
---|
| 495 | *pfFFDone = true;
|
---|
| 496 | break;
|
---|
| 497 | }
|
---|
| 498 | }
|
---|
| 499 | }
|
---|
| 500 |
|
---|
| 501 | /*
|
---|
| 502 | * Return to outer loop.
|
---|
| 503 | */
|
---|
| 504 | #if defined(LOG_ENABLED) && defined(DEBUG)
|
---|
| 505 | RTLogFlush(NULL);
|
---|
| 506 | #endif
|
---|
| 507 | return rc;
|
---|
| 508 | }
|
---|
| 509 |
|
---|