VirtualBox

source: vbox/trunk/src/VBox/VMM/VMMR3/EMHM.cpp@ 74795

Last change on this file since 74795 was 74795, checked in by vboxsync, 6 years ago

vm.h,EM: Made the FF_SET and FF_CLEAR macros only take constants with _BIT variants. bugref:9180
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1/* $Id: EMHM.cpp 74795 2018-10-12 11:24:11Z vboxsync $ */
2/** @file
3 * EM - Execution Monitor / Manager - hardware virtualization
4 */
5
6/*
7 * Copyright (C) 2006-2017 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 */
17
18
19/*********************************************************************************************************************************
20* Header Files *
21*********************************************************************************************************************************/
22#define LOG_GROUP LOG_GROUP_EM
23#define VMCPU_INCL_CPUM_GST_CTX
24#include <VBox/vmm/em.h>
25#include <VBox/vmm/vmm.h>
26#include <VBox/vmm/csam.h>
27#include <VBox/vmm/selm.h>
28#include <VBox/vmm/trpm.h>
29#include <VBox/vmm/iem.h>
30#include <VBox/vmm/iom.h>
31#include <VBox/vmm/dbgf.h>
32#include <VBox/vmm/pgm.h>
33#ifdef VBOX_WITH_REM
34# include <VBox/vmm/rem.h>
35#endif
36#include <VBox/vmm/tm.h>
37#include <VBox/vmm/mm.h>
38#include <VBox/vmm/ssm.h>
39#include <VBox/vmm/pdmapi.h>
40#include <VBox/vmm/pdmcritsect.h>
41#include <VBox/vmm/pdmqueue.h>
42#include <VBox/vmm/hm.h>
43#include "EMInternal.h"
44#include <VBox/vmm/vm.h>
45#include <VBox/vmm/gim.h>
46#include <VBox/vmm/cpumdis.h>
47#include <VBox/dis.h>
48#include <VBox/disopcode.h>
49#include <VBox/vmm/dbgf.h>
50#include "VMMTracing.h"
51
52#include <iprt/asm.h>
53
54
55/*********************************************************************************************************************************
56* Internal Functions *
57*********************************************************************************************************************************/
58static int emR3HmHandleRC(PVM pVM, PVMCPU pVCpu, int rc);
59DECLINLINE(int) emR3HmExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC = VINF_SUCCESS);
60static int emR3HmExecuteIOInstruction(PVM pVM, PVMCPU pVCpu);
61static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu);
62
63#define EMHANDLERC_WITH_HM
64#define emR3ExecuteInstruction emR3HmExecuteInstruction
65#define emR3ExecuteIOInstruction emR3HmExecuteIOInstruction
66#include "EMHandleRCTmpl.h"
67
68
69/**
70 * Executes instruction in HM mode if we can.
71 *
72 * This is somewhat comparable to REMR3EmulateInstruction.
73 *
74 * @returns VBox strict status code.
75 * @retval VINF_EM_DBG_STEPPED on success.
76 * @retval VERR_EM_CANNOT_EXEC_GUEST if we cannot execute guest instructions in
77 * HM right now.
78 *
79 * @param pVM The cross context VM structure.
80 * @param pVCpu The cross context virtual CPU structure for the calling EMT.
81 * @param fFlags Combinations of EM_ONE_INS_FLAGS_XXX.
82 * @thread EMT.
83 */
84VMMR3_INT_DECL(VBOXSTRICTRC) EMR3HmSingleInstruction(PVM pVM, PVMCPU pVCpu, uint32_t fFlags)
85{
86 Assert(!(fFlags & ~EM_ONE_INS_FLAGS_MASK));
87
88 if (!HMCanExecuteGuest(pVCpu, &pVCpu->cpum.GstCtx))
89 return VINF_EM_RESCHEDULE;
90
91 uint64_t const uOldRip = pVCpu->cpum.GstCtx.rip;
92 for (;;)
93 {
94 /*
95 * Service necessary FFs before going into HM.
96 */
97 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
98 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
99 {
100 VBOXSTRICTRC rcStrict = emR3HmForcedActions(pVM, pVCpu);
101 if (rcStrict != VINF_SUCCESS)
102 {
103 Log(("EMR3HmSingleInstruction: FFs before -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
104 return rcStrict;
105 }
106 }
107
108 /*
109 * Go execute it.
110 */
111 bool fOld = HMSetSingleInstruction(pVM, pVCpu, true);
112 VBOXSTRICTRC rcStrict = VMMR3HmRunGC(pVM, pVCpu);
113 HMSetSingleInstruction(pVM, pVCpu, fOld);
114 LogFlow(("EMR3HmSingleInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
115
116 /*
117 * Handle high priority FFs and informational status codes. We don't do
118 * normal FF processing the caller or the next call can deal with them.
119 */
120 VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
121 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
122 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
123 {
124 rcStrict = emR3HighPriorityPostForcedActions(pVM, pVCpu, rcStrict);
125 LogFlow(("EMR3HmSingleInstruction: FFs after -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
126 }
127
128 if (rcStrict != VINF_SUCCESS && (rcStrict < VINF_EM_FIRST || rcStrict > VINF_EM_LAST))
129 {
130 rcStrict = emR3HmHandleRC(pVM, pVCpu, VBOXSTRICTRC_TODO(rcStrict));
131 Log(("EMR3HmSingleInstruction: emR3HmHandleRC -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
132 }
133
134 /*
135 * Done?
136 */
137 if ( (rcStrict != VINF_SUCCESS && rcStrict != VINF_EM_DBG_STEPPED)
138 || !(fFlags & EM_ONE_INS_FLAGS_RIP_CHANGE)
139 || pVCpu->cpum.GstCtx.rip != uOldRip)
140 {
141 if (rcStrict == VINF_SUCCESS && pVCpu->cpum.GstCtx.rip != uOldRip)
142 rcStrict = VINF_EM_DBG_STEPPED;
143 Log(("EMR3HmSingleInstruction: returns %Rrc (rip %llx -> %llx)\n", VBOXSTRICTRC_VAL(rcStrict), uOldRip, pVCpu->cpum.GstCtx.rip));
144 CPUM_IMPORT_EXTRN_RET(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK);
145 return rcStrict;
146 }
147 }
148}
149
150
151/**
152 * Executes one (or perhaps a few more) instruction(s).
153 *
154 * @returns VBox status code suitable for EM.
155 *
156 * @param pVM The cross context VM structure.
157 * @param pVCpu The cross context virtual CPU structure.
158 * @param rcRC Return code from RC.
159 * @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
160 * instruction and prefix the log output with this text.
161 */
162#if defined(LOG_ENABLED) || defined(DOXYGEN_RUNNING)
163static int emR3HmExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC, const char *pszPrefix)
164#else
165static int emR3HmExecuteInstructionWorker(PVM pVM, PVMCPU pVCpu, int rcRC)
166#endif
167{
168 NOREF(rcRC);
169
170#ifdef LOG_ENABLED
171 /*
172 * Log it.
173 */
174 Log(("EMINS: %04x:%RGv RSP=%RGv\n", pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, (RTGCPTR)pVCpu->cpum.GstCtx.rsp));
175 if (pszPrefix)
176 {
177 DBGFR3_INFO_LOG(pVM, pVCpu, "cpumguest", pszPrefix);
178 DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, pszPrefix);
179 }
180#endif
181
182 /*
183 * Use IEM and fallback on REM if the functionality is missing.
184 * Once IEM gets mature enough, nothing should ever fall back.
185 */
186 STAM_PROFILE_START(&pVCpu->em.s.StatIEMEmu, a);
187 VBOXSTRICTRC rcStrict;
188 uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
189 RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
190 if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
191 {
192 CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
193 rcStrict = VBOXSTRICTRC_TODO(IEMExecOne(pVCpu));
194 }
195 else
196 {
197 RT_UNTRUSTED_VALIDATED_FENCE();
198 rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
199 LogFlow(("emR3HmExecuteInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
200 }
201 STAM_PROFILE_STOP(&pVCpu->em.s.StatIEMEmu, a);
202
203 if ( rcStrict == VERR_IEM_ASPECT_NOT_IMPLEMENTED
204 || rcStrict == VERR_IEM_INSTR_NOT_IMPLEMENTED)
205 {
206#ifdef VBOX_WITH_REM
207 STAM_PROFILE_START(&pVCpu->em.s.StatREMEmu, b);
208 EMRemLock(pVM);
209 /* Flush the recompiler TLB if the VCPU has changed. */
210 if (pVM->em.s.idLastRemCpu != pVCpu->idCpu)
211 CPUMSetChangedFlags(pVCpu, CPUM_CHANGED_ALL);
212 pVM->em.s.idLastRemCpu = pVCpu->idCpu;
213
214 rcStrict = REMR3EmulateInstruction(pVM, pVCpu);
215 EMRemUnlock(pVM);
216 STAM_PROFILE_STOP(&pVCpu->em.s.StatREMEmu, b);
217#else /* !VBOX_WITH_REM */
218 NOREF(pVM);
219#endif /* !VBOX_WITH_REM */
220 }
221
222 return VBOXSTRICTRC_TODO(rcStrict);
223}
224
225
226/**
227 * Executes one (or perhaps a few more) instruction(s).
228 * This is just a wrapper for discarding pszPrefix in non-logging builds.
229 *
230 * @returns VBox status code suitable for EM.
231 * @param pVM The cross context VM structure.
232 * @param pVCpu The cross context virtual CPU structure.
233 * @param pszPrefix Disassembly prefix. If not NULL we'll disassemble the
234 * instruction and prefix the log output with this text.
235 * @param rcGC GC return code
236 */
237DECLINLINE(int) emR3HmExecuteInstruction(PVM pVM, PVMCPU pVCpu, const char *pszPrefix, int rcGC)
238{
239#ifdef LOG_ENABLED
240 return emR3HmExecuteInstructionWorker(pVM, pVCpu, rcGC, pszPrefix);
241#else
242 RT_NOREF_PV(pszPrefix);
243 return emR3HmExecuteInstructionWorker(pVM, pVCpu, rcGC);
244#endif
245}
246
247
248/**
249 * Executes one (or perhaps a few more) IO instruction(s).
250 *
251 * @returns VBox status code suitable for EM.
252 * @param pVM The cross context VM structure.
253 * @param pVCpu The cross context virtual CPU structure.
254 */
255static int emR3HmExecuteIOInstruction(PVM pVM, PVMCPU pVCpu)
256{
257 RT_NOREF(pVM);
258 STAM_PROFILE_START(&pVCpu->em.s.StatIOEmu, a);
259
260 VBOXSTRICTRC rcStrict;
261 uint32_t idxContinueExitRec = pVCpu->em.s.idxContinueExitRec;
262 RT_UNTRUSTED_NONVOLATILE_COPY_FENCE();
263 if (idxContinueExitRec >= RT_ELEMENTS(pVCpu->em.s.aExitRecords))
264 {
265 /*
266 * Hand it over to the interpreter.
267 */
268 CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
269 rcStrict = IEMExecOne(pVCpu);
270 LogFlow(("emR3HmExecuteIOInstruction: %Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));
271 }
272 else
273 {
274 RT_UNTRUSTED_VALIDATED_FENCE();
275 CPUM_IMPORT_EXTRN_RET(pVCpu, IEM_CPUMCTX_EXTRN_MUST_MASK);
276 rcStrict = EMHistoryExec(pVCpu, &pVCpu->em.s.aExitRecords[idxContinueExitRec], 0);
277 LogFlow(("emR3HmExecuteIOInstruction: %Rrc (EMHistoryExec)\n", VBOXSTRICTRC_VAL(rcStrict)));
278 STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIoRestarted);
279 }
280
281 STAM_COUNTER_INC(&pVCpu->em.s.CTX_SUFF(pStats)->StatIoIem);
282 STAM_PROFILE_STOP(&pVCpu->em.s.StatIOEmu, a);
283 return VBOXSTRICTRC_TODO(rcStrict);
284}
285
286
287/**
288 * Process HM specific forced actions.
289 *
290 * This function is called when any FFs in the VM_FF_HIGH_PRIORITY_PRE_RAW_MASK
291 * or/and VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK are pending.
292 *
293 * @returns VBox status code. May return VINF_EM_NO_MEMORY but none of the other
294 * EM statuses.
295 * @param pVM The cross context VM structure.
296 * @param pVCpu The cross context virtual CPU structure.
297 */
298static int emR3HmForcedActions(PVM pVM, PVMCPU pVCpu)
299{
300 /*
301 * Sync page directory.
302 */
303 if (VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3 | VMCPU_FF_PGM_SYNC_CR3_NON_GLOBAL))
304 {
305 CPUM_IMPORT_EXTRN_RET(pVCpu, CPUMCTX_EXTRN_CR0 | CPUMCTX_EXTRN_CR3 | CPUMCTX_EXTRN_CR4);
306 Assert(pVCpu->em.s.enmState != EMSTATE_WAIT_SIPI);
307 int rc = PGMSyncCR3(pVCpu, pVCpu->cpum.GstCtx.cr0, pVCpu->cpum.GstCtx.cr3, pVCpu->cpum.GstCtx.cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
308 if (RT_FAILURE(rc))
309 return rc;
310
311#ifdef VBOX_WITH_RAW_MODE
312 Assert(!VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT));
313#endif
314
315 /* Prefetch pages for EIP and ESP. */
316 /** @todo This is rather expensive. Should investigate if it really helps at all. */
317 /** @todo this should be skipped! */
318 CPUM_IMPORT_EXTRN_RET(pVCpu, CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_SS);
319 rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVM, DISSELREG_CS, CPUMCTX2CORE(&pVCpu->cpum.GstCtx), pVCpu->cpum.GstCtx.rip));
320 if (rc == VINF_SUCCESS)
321 rc = PGMPrefetchPage(pVCpu, SELMToFlat(pVM, DISSELREG_SS, CPUMCTX2CORE(&pVCpu->cpum.GstCtx), pVCpu->cpum.GstCtx.rsp));
322 if (rc != VINF_SUCCESS)
323 {
324 if (rc != VINF_PGM_SYNC_CR3)
325 {
326 AssertLogRelMsgReturn(RT_FAILURE(rc), ("%Rrc\n", rc), VERR_IPE_UNEXPECTED_INFO_STATUS);
327 return rc;
328 }
329 rc = PGMSyncCR3(pVCpu, pVCpu->cpum.GstCtx.cr0, pVCpu->cpum.GstCtx.cr3, pVCpu->cpum.GstCtx.cr4, VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
330 if (RT_FAILURE(rc))
331 return rc;
332 }
333 /** @todo maybe prefetch the supervisor stack page as well */
334#ifdef VBOX_WITH_RAW_MODE
335 Assert(!VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT));
336#endif
337 }
338
339 /*
340 * Allocate handy pages (just in case the above actions have consumed some pages).
341 */
342 if (VM_FF_IS_PENDING_EXCEPT(pVM, VM_FF_PGM_NEED_HANDY_PAGES, VM_FF_PGM_NO_MEMORY))
343 {
344 int rc = PGMR3PhysAllocateHandyPages(pVM);
345 if (RT_FAILURE(rc))
346 return rc;
347 }
348
349 /*
350 * Check whether we're out of memory now.
351 *
352 * This may stem from some of the above actions or operations that has been executed
353 * since we ran FFs. The allocate handy pages must for instance always be followed by
354 * this check.
355 */
356 if (VM_FF_IS_SET(pVM, VM_FF_PGM_NO_MEMORY))
357 return VINF_EM_NO_MEMORY;
358
359 return VINF_SUCCESS;
360}
361
362
363/**
364 * Executes hardware accelerated raw code. (Intel VT-x & AMD-V)
365 *
366 * This function contains the raw-mode version of the inner
367 * execution loop (the outer loop being in EMR3ExecuteVM()).
368 *
369 * @returns VBox status code. The most important ones are: VINF_EM_RESCHEDULE, VINF_EM_RESCHEDULE_RAW,
370 * VINF_EM_RESCHEDULE_REM, VINF_EM_SUSPEND, VINF_EM_RESET and VINF_EM_TERMINATE.
371 *
372 * @param pVM The cross context VM structure.
373 * @param pVCpu The cross context virtual CPU structure.
374 * @param pfFFDone Where to store an indicator telling whether or not
375 * FFs were done before returning.
376 */
377int emR3HmExecute(PVM pVM, PVMCPU pVCpu, bool *pfFFDone)
378{
379 int rc = VERR_IPE_UNINITIALIZED_STATUS;
380
381 LogFlow(("emR3HmExecute%d: (cs:eip=%04x:%RGv)\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
382 *pfFFDone = false;
383
384 STAM_COUNTER_INC(&pVCpu->em.s.StatHMExecuteCalled);
385
386 /*
387 * Spin till we get a forced action which returns anything but VINF_SUCCESS.
388 */
389 for (;;)
390 {
391 STAM_PROFILE_ADV_START(&pVCpu->em.s.StatHMEntry, a);
392
393 /* Check if a forced reschedule is pending. */
394 if (HMR3IsRescheduleRequired(pVM, &pVCpu->cpum.GstCtx))
395 {
396 rc = VINF_EM_RESCHEDULE;
397 break;
398 }
399
400 /*
401 * Process high priority pre-execution raw-mode FFs.
402 */
403#ifdef VBOX_WITH_RAW_MODE
404 Assert(!VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS | VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT));
405#endif
406 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_PRE_RAW_MASK)
407 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_PRE_RAW_MASK))
408 {
409 rc = emR3HmForcedActions(pVM, pVCpu);
410 if (rc != VINF_SUCCESS)
411 break;
412 }
413
414#ifdef LOG_ENABLED
415 /*
416 * Log important stuff before entering GC.
417 */
418 if (TRPMHasTrap(pVCpu))
419 Log(("CPU%d: Pending hardware interrupt=0x%x cs:rip=%04X:%RGv\n", pVCpu->idCpu, TRPMGetTrapNo(pVCpu), pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip));
420
421 uint32_t cpl = CPUMGetGuestCPL(pVCpu);
422 if (pVM->cCpus == 1)
423 {
424 if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
425 Log(("HWV86: %08X IF=%d\n", pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
426 else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
427 Log(("HWR%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
428 else
429 Log(("HWR%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
430 }
431 else
432 {
433 if (pVCpu->cpum.GstCtx.eflags.Bits.u1VM)
434 Log(("HWV86-CPU%d: %08X IF=%d\n", pVCpu->idCpu, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.eflags.Bits.u1IF));
435 else if (CPUMIsGuestIn64BitCodeEx(&pVCpu->cpum.GstCtx))
436 Log(("HWR%d-CPU%d: %04X:%RGv ESP=%RGv IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, (RTGCPTR)pVCpu->cpum.GstCtx.rip, pVCpu->cpum.GstCtx.rsp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
437 else
438 Log(("HWR%d-CPU%d: %04X:%08X ESP=%08X IF=%d IOPL=%d CR0=%x CR4=%x EFER=%x\n", cpl, pVCpu->idCpu, pVCpu->cpum.GstCtx.cs.Sel, pVCpu->cpum.GstCtx.eip, pVCpu->cpum.GstCtx.esp, pVCpu->cpum.GstCtx.eflags.Bits.u1IF, pVCpu->cpum.GstCtx.eflags.Bits.u2IOPL, (uint32_t)pVCpu->cpum.GstCtx.cr0, (uint32_t)pVCpu->cpum.GstCtx.cr4, (uint32_t)pVCpu->cpum.GstCtx.msrEFER));
439 }
440#endif /* LOG_ENABLED */
441
442 /*
443 * Execute the code.
444 */
445 STAM_PROFILE_ADV_STOP(&pVCpu->em.s.StatHMEntry, a);
446
447 if (RT_LIKELY(emR3IsExecutionAllowed(pVM, pVCpu)))
448 {
449 STAM_PROFILE_START(&pVCpu->em.s.StatHMExec, x);
450 rc = VMMR3HmRunGC(pVM, pVCpu);
451 STAM_PROFILE_STOP(&pVCpu->em.s.StatHMExec, x);
452 }
453 else
454 {
455 /* Give up this time slice; virtual time continues */
456 STAM_REL_PROFILE_ADV_START(&pVCpu->em.s.StatCapped, u);
457 RTThreadSleep(5);
458 STAM_REL_PROFILE_ADV_STOP(&pVCpu->em.s.StatCapped, u);
459 rc = VINF_SUCCESS;
460 }
461
462
463 /*
464 * Deal with high priority post execution FFs before doing anything else.
465 */
466 VMCPU_FF_CLEAR_MASK(pVCpu, VMCPU_FF_RESUME_GUEST_MASK);
467 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_HIGH_PRIORITY_POST_MASK)
468 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_HIGH_PRIORITY_POST_MASK))
469 rc = VBOXSTRICTRC_TODO(emR3HighPriorityPostForcedActions(pVM, pVCpu, rc));
470
471 /*
472 * Process the returned status code.
473 */
474 if (rc >= VINF_EM_FIRST && rc <= VINF_EM_LAST)
475 break;
476
477 rc = emR3HmHandleRC(pVM, pVCpu, rc);
478 if (rc != VINF_SUCCESS)
479 break;
480
481 /*
482 * Check and execute forced actions.
483 */
484#ifdef VBOX_HIGH_RES_TIMERS_HACK
485 TMTimerPollVoid(pVM, pVCpu);
486#endif
487 if ( VM_FF_IS_ANY_SET(pVM, VM_FF_ALL_MASK)
488 || VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_ALL_MASK))
489 {
490 rc = emR3ForcedActions(pVM, pVCpu, rc);
491 VBOXVMM_EM_FF_ALL_RET(pVCpu, rc);
492 if ( rc != VINF_SUCCESS
493 && rc != VINF_EM_RESCHEDULE_HM)
494 {
495 *pfFFDone = true;
496 break;
497 }
498 }
499 }
500
501 /*
502 * Return to outer loop.
503 */
504#if defined(LOG_ENABLED) && defined(DEBUG)
505 RTLogFlush(NULL);
506#endif
507 return rc;
508}
509
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