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DevFdc.cpp

Last change on this file was 104189, checked in by vboxsync, 3 weeks ago
DevFdc: If EOT is below starting sector, make it more explicit what's going on.
Property svn:eol-style set to `native` Property svn:keywords set to `Id Revision`
File size: 110.4 KB

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1	/* $Id: DevFdc.cpp 104189 2024-04-05 13:25:56Z vboxsync $ */
2	/** @file
3	* VBox storage devices - Floppy disk controller
4	*/
5
6	/*
7	* Copyright (C) 2006-2023 Oracle and/or its affiliates.
8	*
9	* This file is part of VirtualBox base platform packages, as
10	* available from https://www.virtualbox.org.
11	*
12	* This program is free software; you can redistribute it and/or
13	* modify it under the terms of the GNU General Public License
14	* as published by the Free Software Foundation, in version 3 of the
15	* License.
16	*
17	* This program is distributed in the hope that it will be useful, but
18	* WITHOUT ANY WARRANTY; without even the implied warranty of
19	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20	* General Public License for more details.
21	*
22	* You should have received a copy of the GNU General Public License
23	* along with this program; if not, see <https://www.gnu.org/licenses>.
24	*
25	* SPDX-License-Identifier: GPL-3.0-only
26	* --------------------------------------------------------------------
27	*
28	* This code is based on:
29	*
30	* QEMU Floppy disk emulator (Intel 82078)
31	*
32	* Copyright (c) 2003 Jocelyn Mayer
33	*
34	* Permission is hereby granted, free of charge, to any person obtaining a copy
35	* of this software and associated documentation files (the "Software"), to deal
36	* in the Software without restriction, including without limitation the rights
37	* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
38	* copies of the Software, and to permit persons to whom the Software is
39	* furnished to do so, subject to the following conditions:
40	*
41	* The above copyright notice and this permission notice shall be included in
42	* all copies or substantial portions of the Software.
43	*
44	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
45	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
46	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
47	* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
48	* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
49	* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
50	* THE SOFTWARE.
51	*
52	*/
53
54
55	/*********************************************************************************************************************************
56	* Header Files *
57	*********************************************************************************************************************************/
58	#define LOG_GROUP LOG_GROUP_DEV_FDC
59	#include <VBox/vmm/pdmdev.h>
60	#include <VBox/vmm/pdmstorageifs.h>
61	#include <VBox/AssertGuest.h>
62	#include <iprt/assert.h>
63	#include <iprt/string.h>
64	#include <iprt/uuid.h>
65
66	#include "VBoxDD.h"
67
68
69	/*********************************************************************************************************************************
70	* Defined Constants And Macros *
71	*********************************************************************************************************************************/
72	/** @name FDC saved state versions
73	* @{ */
74	#define FDC_SAVESTATE_CURRENT 3 /*< Current version. /
75	#define FDC_SAVESTATE_PRE_DELAY 2 /*< Pre IRQDelay. /
76	#define FDC_SAVESTATE_OLD 1 /*< The original saved state. /
77	/** @}*/
78
79	#define MAX_FD 2
80
81
82	/********************************************************/
83	/* debug Floppy devices */
84	/* #define DEBUG_FLOPPY */
85
86	#ifdef LOG_ENABLED
87	# define FLOPPY_DPRINTF(...) Log(("floppy: " __VA_ARGS__))
88	#else
89	# define FLOPPY_DPRINTF(...) do { } while (0)
90	#endif
91
92	#define FLOPPY_ERROR RTLogPrintf
93
94	typedef struct fdctrl_t fdctrl_t;
95
96	/********************************************************/
97	/* Floppy drive emulation */
98
99	/* Drive selection note:
100	* For many commands, the FDC can select one of four drives through the
101	* second command byte. The Digital Output Register (DOR) can also select
102	* one of four drives. On PCs, the FDC drive selection is ignored, but
103	* should be reflected back in command status. Only the DOR drive selection
104	* is effective; on old PCs with a discrete NEC uPD765 or similar, the FDC
105	* drive selection signals (US0/US1) are not connected at all.
106	* NB: A drive is actually selected only when its motor on bit in the DOR
107	* is also set. It is possible to have no drive selected.
108	*
109	* The FDC cur_drv field tracks the drive the FDC thinks is selected, but
110	* the DOR is used for actual drive selection.
111	*/
112
113	#define GET_CUR_DRV(fdctrl) ((fdctrl)->cur_drv)
114	#define SET_CUR_DRV(fdctrl, drive) ((fdctrl)->cur_drv = (drive))
115
116	/* Will always be a fixed parameter for us */
117	#define FD_SECTOR_LEN 512
118	#define FD_SECTOR_SC 2 /* Sector size code */
119	#define FD_RESET_SENSEI_COUNT 4 /* Number of sense interrupts on RESET */
120
121	/* Floppy disk drive emulation */
122	typedef enum fdrive_type_t {
123	FDRIVE_DRV_144 = 0x00, /* 1.44 MB 3"5 drive */
124	FDRIVE_DRV_288 = 0x01, /* 2.88 MB 3"5 drive */
125	FDRIVE_DRV_120 = 0x02, /* 1.2 MB 5"25 drive */
126	FDRIVE_DRV_NONE = 0x03, /* No drive connected */
127	FDRIVE_DRV_FAKE_15_6 = 0x0e, /* Fake 15.6 MB drive. */
128	FDRIVE_DRV_FAKE_63_5 = 0x0f /* Fake 63.5 MB drive. */
129	} fdrive_type_t;
130
131	typedef uint8_t fdrive_flags_t;
132	#define FDISK_DBL_SIDES UINT8_C(0x01)
133
134	typedef enum fdrive_rate_t {
135	FDRIVE_RATE_500K = 0x00, /* 500 Kbps */
136	FDRIVE_RATE_300K = 0x01, /* 300 Kbps */
137	FDRIVE_RATE_250K = 0x02, /* 250 Kbps */
138	FDRIVE_RATE_1M = 0x03 /* 1 Mbps */
139	} fdrive_rate_t;
140
141	/**
142	* The status for one drive.
143	*
144	* @implements PDMIBASE
145	* @implements PDMIMEDIAPORT
146	* @implements PDMIMOUNTNOTIFY
147	*/
148	typedef struct fdrive_t {
149	/** Pointer to the owning device instance. */
150	R3PTRTYPE(PPDMDEVINS) pDevIns;
151	/** Pointer to the attached driver's base interface. */
152	R3PTRTYPE(PPDMIBASE) pDrvBase;
153	/** Pointer to the attached driver's block interface. */
154	R3PTRTYPE(PPDMIMEDIA) pDrvMedia;
155	/** Pointer to the attached driver's mount interface.
156	* This is NULL if the driver isn't a removable unit. */
157	R3PTRTYPE(PPDMIMOUNT) pDrvMount;
158	/** The base interface. */
159	PDMIBASE IBase;
160	/** The block port interface. */
161	PDMIMEDIAPORT IPort;
162	/** The mount notify interface. */
163	PDMIMOUNTNOTIFY IMountNotify;
164	/** The LUN #. */
165	RTUINT iLUN;
166	/** The LED for this LUN. */
167	PDMLED Led;
168	/* Drive status */
169	fdrive_type_t drive;
170	uint8_t perpendicular; /* 2.88 MB access mode */
171	uint8_t dsk_chg; /* Disk change line */
172	/* Position */
173	uint8_t head;
174	uint8_t track;
175	uint8_t sect;
176	uint8_t ltrk; /* Logical track */
177	/* Media */
178	fdrive_flags_t flags;
179	uint8_t last_sect; /* Nb sector per track */
180	uint8_t max_track; /* Nb of tracks */
181	uint16_t bps; /* Bytes per sector */
182	uint8_t ro; /* Is read-only */
183	uint8_t media_rate; /* Data rate of medium */
184	} fdrive_t;
185
186	#define NUM_SIDES(drv) (drv->flags & FDISK_DBL_SIDES ? 2 : 1)
187
188	static void fd_init(fdrive_t *drv, bool fInit)
189	{
190	/* Drive */
191	if (fInit) {
192	/* Fixate the drive type at init time if possible. */
193	if (drv->pDrvMedia) {
194	PDMMEDIATYPE enmType = drv->pDrvMedia->pfnGetType(drv->pDrvMedia);
195	switch (enmType) {
196	case PDMMEDIATYPE_FLOPPY_360:
197	case PDMMEDIATYPE_FLOPPY_1_20:
198	drv->drive = FDRIVE_DRV_120;
199	break;
200	case PDMMEDIATYPE_FLOPPY_720:
201	case PDMMEDIATYPE_FLOPPY_1_44:
202	drv->drive = FDRIVE_DRV_144;
203	break;
204	default:
205	AssertFailed();
206	RT_FALL_THRU();
207	case PDMMEDIATYPE_FLOPPY_2_88:
208	drv->drive = FDRIVE_DRV_288;
209	break;
210	case PDMMEDIATYPE_FLOPPY_FAKE_15_6:
211	drv->drive = FDRIVE_DRV_FAKE_15_6;
212	break;
213	case PDMMEDIATYPE_FLOPPY_FAKE_63_5:
214	drv->drive = FDRIVE_DRV_FAKE_63_5;
215	break;
216	}
217	} else {
218	drv->drive = FDRIVE_DRV_NONE;
219	}
220	} /* else: The BIOS (and others) get the drive type via the CMOS, so
221	don't change it after the VM has been constructed. */
222	drv->perpendicular = 0;
223	/* Disk */
224	drv->last_sect = 0;
225	drv->max_track = 0;
226	}
227
228	static int fd_sector_calc(uint8_t head, uint8_t track, uint8_t sect,
229	uint8_t last_sect, uint8_t num_sides)
230	{
231	return (((track * num_sides) + head) * last_sect) + sect - 1; /* sect >= 1 */
232	}
233
234	/* Returns current position, in sectors, for given drive */
235	static int fd_sector(fdrive_t *drv)
236	{
237	return fd_sector_calc(drv->head, drv->track, drv->sect, drv->last_sect, NUM_SIDES(drv));
238	}
239
240	/* Seek to a new position:
241	* returns 0 if already on right track
242	* returns 1 if track changed
243	* returns 2 if track is invalid
244	* returns 3 if sector is invalid
245	* returns 4 if seek is disabled
246	* returns 5 if no media in drive
247	*/
248	static int fd_seek(fdrive_t *drv, uint8_t head, uint8_t track, uint8_t sect,
249	int enable_seek)
250	{
251	int sector;
252	int ret;
253
254	if (!drv->last_sect) {
255	FLOPPY_DPRINTF("no disk in drive (max=%d h=%d c=%02x =s%02x) -> 5\n",
256	1, NUM_SIDES(drv) - 1, drv->max_track, drv->last_sect);
257	return 5;
258	}
259	if (track > drv->max_track \|\|
260	(head != 0 && (drv->flags & FDISK_DBL_SIDES) == 0)) {
261	FLOPPY_DPRINTF("try to read h=%d c=%02x s=%02x (max=%d h=%d c=%02x s=%02x) -> 2\n",
262	head, track, sect,
263	1, NUM_SIDES(drv) - 1, drv->max_track, drv->last_sect);
264	return 2;
265	}
266	if (sect > drv->last_sect \|\| sect < 1) {
267	FLOPPY_DPRINTF("try to read h=%d c=%02x s=%02x (max=%d h=%d c=%02x s=%02x) -> 3\n",
268	head, track, sect,
269	1, NUM_SIDES(drv) - 1, drv->max_track, drv->last_sect);
270	return 3;
271	}
272	sector = fd_sector_calc(head, track, sect, drv->last_sect, NUM_SIDES(drv));
273	ret = 0;
274	if (sector != fd_sector(drv)) {
275	#if 0
276	if (!enable_seek) {
277	FLOPPY_ERROR("no implicit seek %d %02x %02x (max=%d %02x %02x)\n",
278	head, track, sect, 1, drv->max_track, drv->last_sect);
279	return 4;
280	}
281	#else
282	RT_NOREF(enable_seek);
283	#endif
284	drv->head = head;
285	if (drv->track != track)
286	ret = 1;
287	drv->track = track;
288	drv->sect = sect;
289	}
290	drv->ltrk = drv->track;
291
292	return ret;
293	}
294
295	/* Set drive back to track 0 */
296	static void fd_recalibrate(fdrive_t *drv)
297	{
298	FLOPPY_DPRINTF("recalibrate\n");
299	drv->head = 0;
300	drv->track = 0;
301	drv->ltrk = 0;
302	drv->sect = 1;
303	}
304
305	/* Recognize floppy formats */
306	typedef struct fd_format_t {
307	fdrive_type_t drive;
308	uint8_t last_sect; /*< Number of sectors. /
309	uint8_t max_track; /*< Number of tracks. /
310	uint8_t max_head; /*< Max head number. /
311	fdrive_rate_t rate;
312	const char *str;
313	} fd_format_t;
314
315	/* Note: Low-density disks (160K/180K/320K/360K) use 250 Kbps data rate
316	* in 40-track drives, but 300 Kbps in high-capacity 80-track drives.
317	*/
318	static fd_format_t const fd_formats[] = {
319	/* First entry is default format */
320	/* 1.44 MB 3"1/2 floppy disks */
321	{ FDRIVE_DRV_144, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB 3\"1/2", },
322	{ FDRIVE_DRV_144, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB 3\"1/2", },
323	{ FDRIVE_DRV_144, 21, 80, 1, FDRIVE_RATE_500K, "1.68 MB 3\"1/2", },
324	{ FDRIVE_DRV_144, 21, 82, 1, FDRIVE_RATE_500K, "1.72 MB 3\"1/2", },
325	{ FDRIVE_DRV_144, 21, 83, 1, FDRIVE_RATE_500K, "1.74 MB 3\"1/2", },
326	{ FDRIVE_DRV_144, 22, 80, 1, FDRIVE_RATE_500K, "1.76 MB 3\"1/2", },
327	{ FDRIVE_DRV_144, 23, 80, 1, FDRIVE_RATE_500K, "1.84 MB 3\"1/2", },
328	{ FDRIVE_DRV_144, 24, 80, 1, FDRIVE_RATE_500K, "1.92 MB 3\"1/2", },
329	/* 2.88 MB 3"1/2 floppy disks */
330	{ FDRIVE_DRV_288, 36, 80, 1, FDRIVE_RATE_1M, "2.88 MB 3\"1/2", },
331	{ FDRIVE_DRV_288, 39, 80, 1, FDRIVE_RATE_1M, "3.12 MB 3\"1/2", },
332	{ FDRIVE_DRV_288, 40, 80, 1, FDRIVE_RATE_1M, "3.2 MB 3\"1/2", },
333	{ FDRIVE_DRV_288, 44, 80, 1, FDRIVE_RATE_1M, "3.52 MB 3\"1/2", },
334	{ FDRIVE_DRV_288, 48, 80, 1, FDRIVE_RATE_1M, "3.84 MB 3\"1/2", },
335	/* 720 kB 3"1/2 floppy disks */
336	{ FDRIVE_DRV_144, 9, 80, 1, FDRIVE_RATE_250K, "720 kB 3\"1/2", },
337	{ FDRIVE_DRV_144, 10, 80, 1, FDRIVE_RATE_250K, "800 kB 3\"1/2", },
338	{ FDRIVE_DRV_144, 10, 82, 1, FDRIVE_RATE_250K, "820 kB 3\"1/2", },
339	{ FDRIVE_DRV_144, 10, 83, 1, FDRIVE_RATE_250K, "830 kB 3\"1/2", },
340	{ FDRIVE_DRV_144, 13, 80, 1, FDRIVE_RATE_250K, "1.04 MB 3\"1/2", },
341	{ FDRIVE_DRV_144, 14, 80, 1, FDRIVE_RATE_250K, "1.12 MB 3\"1/2", },
342	/* 1.2 MB 5"1/4 floppy disks */
343	{ FDRIVE_DRV_120, 15, 80, 1, FDRIVE_RATE_500K, "1.2 MB 5\"1/4", },
344	{ FDRIVE_DRV_120, 16, 80, 1, FDRIVE_RATE_500K, "1.28 MB 5\"1/4", }, /* CP Backup 5.25" HD */
345	{ FDRIVE_DRV_120, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB 5\"1/4", },
346	{ FDRIVE_DRV_120, 18, 82, 1, FDRIVE_RATE_500K, "1.48 MB 5\"1/4", },
347	{ FDRIVE_DRV_120, 18, 83, 1, FDRIVE_RATE_500K, "1.49 MB 5\"1/4", },
348	{ FDRIVE_DRV_120, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB 5\"1/4", },
349	/* 720 kB 5"1/4 floppy disks */
350	{ FDRIVE_DRV_120, 9, 80, 1, FDRIVE_RATE_300K, "720 kB 5\"1/4", },
351	{ FDRIVE_DRV_120, 11, 80, 1, FDRIVE_RATE_300K, "880 kB 5\"1/4", },
352	/* 360 kB 5"1/4 floppy disks (newer 9-sector formats) */
353	{ FDRIVE_DRV_120, 9, 40, 1, FDRIVE_RATE_300K, "360 kB 5\"1/4", },
354	{ FDRIVE_DRV_120, 9, 40, 0, FDRIVE_RATE_300K, "180 kB 5\"1/4", },
355	{ FDRIVE_DRV_120, 10, 40, 1, FDRIVE_RATE_300K, "400 kB 5\"1/4", }, /* CP Backup 5.25" DD */
356	{ FDRIVE_DRV_120, 10, 41, 1, FDRIVE_RATE_300K, "410 kB 5\"1/4", },
357	{ FDRIVE_DRV_120, 10, 42, 1, FDRIVE_RATE_300K, "420 kB 5\"1/4", },
358	/* 320 kB 5"1/4 floppy disks (old 8-sector formats) */
359	{ FDRIVE_DRV_120, 8, 40, 1, FDRIVE_RATE_300K, "320 kB 5\"1/4", },
360	{ FDRIVE_DRV_120, 8, 40, 0, FDRIVE_RATE_300K, "160 kB 5\"1/4", },
361	/* 1.2 MB and low density 3"1/2 floppy 'aliases' */
362	{ FDRIVE_DRV_144, 15, 80, 1, FDRIVE_RATE_500K, "1.2 MB 3\"1/2", },
363	{ FDRIVE_DRV_144, 16, 80, 1, FDRIVE_RATE_500K, "1.28 MB 3\"1/2", },
364	{ FDRIVE_DRV_144, 10, 40, 1, FDRIVE_RATE_300K, "400 kB 3\"1/2", }, /* CP Backup 5.25" DD */
365	{ FDRIVE_DRV_144, 9, 40, 1, FDRIVE_RATE_300K, "360 kB 3\"1/2", },
366	{ FDRIVE_DRV_144, 9, 40, 0, FDRIVE_RATE_300K, "180 kB 3\"1/2", },
367	{ FDRIVE_DRV_144, 8, 40, 1, FDRIVE_RATE_300K, "320 kB 3\"1/2", },
368	{ FDRIVE_DRV_144, 8, 40, 0, FDRIVE_RATE_300K, "160 kB 3\"1/2", },
369	/* For larger than real life floppy images (see DrvVD.cpp). */
370	/* 15.6 MB fake floppy disk (just need something big). */
371	{ FDRIVE_DRV_FAKE_15_6, 63, 255, 1, FDRIVE_RATE_1M, "15.6 MB fake 15.6", },
372	{ FDRIVE_DRV_FAKE_15_6, 36, 80, 1, FDRIVE_RATE_1M, "2.88 MB fake 15.6", },
373	{ FDRIVE_DRV_FAKE_15_6, 39, 80, 1, FDRIVE_RATE_1M, "3.12 MB fake 15.6", },
374	{ FDRIVE_DRV_FAKE_15_6, 40, 80, 1, FDRIVE_RATE_1M, "3.2 MB fake 15.6", },
375	{ FDRIVE_DRV_FAKE_15_6, 44, 80, 1, FDRIVE_RATE_1M, "3.52 MB fake 15.6", },
376	{ FDRIVE_DRV_FAKE_15_6, 48, 80, 1, FDRIVE_RATE_1M, "3.84 MB fake 15.6", },
377	{ FDRIVE_DRV_FAKE_15_6, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB fake 15.6", },
378	{ FDRIVE_DRV_FAKE_15_6, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB fake 15.6", },
379	{ FDRIVE_DRV_FAKE_15_6, 21, 80, 1, FDRIVE_RATE_500K, "1.68 MB fake 15.6", },
380	{ FDRIVE_DRV_FAKE_15_6, 21, 82, 1, FDRIVE_RATE_500K, "1.72 MB fake 15.6", },
381	{ FDRIVE_DRV_FAKE_15_6, 21, 83, 1, FDRIVE_RATE_500K, "1.74 MB fake 15.6", },
382	{ FDRIVE_DRV_FAKE_15_6, 22, 80, 1, FDRIVE_RATE_500K, "1.76 MB fake 15.6", },
383	{ FDRIVE_DRV_FAKE_15_6, 23, 80, 1, FDRIVE_RATE_500K, "1.84 MB fake 15.6", },
384	{ FDRIVE_DRV_FAKE_15_6, 24, 80, 1, FDRIVE_RATE_500K, "1.92 MB fake 15.6", },
385	{ FDRIVE_DRV_FAKE_15_6, 9, 80, 1, FDRIVE_RATE_250K, "720 kB fake 15.6", },
386	{ FDRIVE_DRV_FAKE_15_6, 10, 80, 1, FDRIVE_RATE_250K, "800 kB fake 15.6", },
387	{ FDRIVE_DRV_FAKE_15_6, 10, 82, 1, FDRIVE_RATE_250K, "820 kB fake 15.6", },
388	{ FDRIVE_DRV_FAKE_15_6, 10, 83, 1, FDRIVE_RATE_250K, "830 kB fake 15.6", },
389	{ FDRIVE_DRV_FAKE_15_6, 13, 80, 1, FDRIVE_RATE_250K, "1.04 MB fake 15.6", },
390	{ FDRIVE_DRV_FAKE_15_6, 14, 80, 1, FDRIVE_RATE_250K, "1.12 MB fake 15.6", },
391	{ FDRIVE_DRV_FAKE_15_6, 9, 80, 0, FDRIVE_RATE_250K, "360 kB fake 15.6", },
392	/* 63.5 MB fake floppy disk (just need something big). */
393	{ FDRIVE_DRV_FAKE_63_5, 255, 255, 1, FDRIVE_RATE_1M, "63.5 MB fake 63.5", },
394	{ FDRIVE_DRV_FAKE_63_5, 63, 255, 1, FDRIVE_RATE_1M, "15.6 MB fake 63.5", },
395	{ FDRIVE_DRV_FAKE_63_5, 36, 80, 1, FDRIVE_RATE_1M, "2.88 MB fake 63.5", },
396	{ FDRIVE_DRV_FAKE_63_5, 39, 80, 1, FDRIVE_RATE_1M, "3.12 MB fake 63.5", },
397	{ FDRIVE_DRV_FAKE_63_5, 40, 80, 1, FDRIVE_RATE_1M, "3.2 MB fake 63.5", },
398	{ FDRIVE_DRV_FAKE_63_5, 44, 80, 1, FDRIVE_RATE_1M, "3.52 MB fake 63.5", },
399	{ FDRIVE_DRV_FAKE_63_5, 48, 80, 1, FDRIVE_RATE_1M, "3.84 MB fake 63.5", },
400	{ FDRIVE_DRV_FAKE_63_5, 18, 80, 1, FDRIVE_RATE_500K, "1.44 MB fake 63.5", },
401	{ FDRIVE_DRV_FAKE_63_5, 20, 80, 1, FDRIVE_RATE_500K, "1.6 MB fake 63.5", },
402	{ FDRIVE_DRV_FAKE_63_5, 21, 80, 1, FDRIVE_RATE_500K, "1.68 MB fake 63.5", },
403	{ FDRIVE_DRV_FAKE_63_5, 21, 82, 1, FDRIVE_RATE_500K, "1.72 MB fake 63.5", },
404	{ FDRIVE_DRV_FAKE_63_5, 21, 83, 1, FDRIVE_RATE_500K, "1.74 MB fake 63.5", },
405	{ FDRIVE_DRV_FAKE_63_5, 22, 80, 1, FDRIVE_RATE_500K, "1.76 MB fake 63.5", },
406	{ FDRIVE_DRV_FAKE_63_5, 23, 80, 1, FDRIVE_RATE_500K, "1.84 MB fake 63.5", },
407	{ FDRIVE_DRV_FAKE_63_5, 24, 80, 1, FDRIVE_RATE_500K, "1.92 MB fake 63.5", },
408	{ FDRIVE_DRV_FAKE_63_5, 9, 80, 1, FDRIVE_RATE_250K, "720 kB fake 63.5", },
409	{ FDRIVE_DRV_FAKE_63_5, 10, 80, 1, FDRIVE_RATE_250K, "800 kB fake 63.5", },
410	{ FDRIVE_DRV_FAKE_63_5, 10, 82, 1, FDRIVE_RATE_250K, "820 kB fake 63.5", },
411	{ FDRIVE_DRV_FAKE_63_5, 10, 83, 1, FDRIVE_RATE_250K, "830 kB fake 63.5", },
412	{ FDRIVE_DRV_FAKE_63_5, 13, 80, 1, FDRIVE_RATE_250K, "1.04 MB fake 63.5", },
413	{ FDRIVE_DRV_FAKE_63_5, 14, 80, 1, FDRIVE_RATE_250K, "1.12 MB fake 63.5", },
414	{ FDRIVE_DRV_FAKE_63_5, 9, 80, 0, FDRIVE_RATE_250K, "360 kB fake 63.5", },
415	/* end */
416	{ FDRIVE_DRV_NONE, (uint8_t)-1, (uint8_t)-1, 0, (fdrive_rate_t)0, NULL, },
417	};
418
419	/* Revalidate a disk drive after a disk change */
420	static void fd_revalidate(fdrive_t *drv)
421	{
422	const fd_format_t *parse;
423	uint64_t nb_sectors, size;
424	int i, first_match, match;
425	int nb_heads, max_track, last_sect, ro;
426
427	FLOPPY_DPRINTF("revalidate\n");
428	if ( drv->pDrvMedia
429	&& drv->pDrvMount
430	&& drv->pDrvMount->pfnIsMounted (drv->pDrvMount)) {
431	ro = drv->pDrvMedia->pfnIsReadOnly (drv->pDrvMedia);
432	nb_heads = max_track = last_sect = 0;
433	if (nb_heads != 0 && max_track != 0 && last_sect != 0) {
434	FLOPPY_DPRINTF("User defined disk (%d %d %d)",
435	nb_heads - 1, max_track, last_sect);
436	} else {
437	uint64_t size2 = drv->pDrvMedia->pfnGetSize (drv->pDrvMedia);
438	nb_sectors = size2 / FD_SECTOR_LEN;
439	match = -1;
440	first_match = -1;
441	for (i = 0;; i++) {
442	parse = &fd_formats[i];
443	if (parse->drive == FDRIVE_DRV_NONE)
444	break;
445	if (drv->drive == parse->drive \|\|
446	drv->drive == FDRIVE_DRV_NONE) {
447	size = (parse->max_head + 1) * parse->max_track *
448	parse->last_sect;
449	if (nb_sectors == size) {
450	match = i;
451	break;
452	}
453	if (first_match == -1)
454	first_match = i;
455	}
456	}
457	if (match == -1) {
458	if (first_match == -1)
459	match = 1;
460	else
461	match = first_match;
462	parse = &fd_formats[match];
463	}
464	nb_heads = parse->max_head + 1;
465	max_track = parse->max_track;
466	last_sect = parse->last_sect;
467	drv->drive = parse->drive;
468	drv->media_rate = parse->rate;
469	FLOPPY_DPRINTF("%s floppy disk (%d h %d t %d s) %s\n", parse->str,
470	nb_heads, max_track, last_sect, ro ? "ro" : "rw");
471	LogRel(("FDC: %s floppy disk (%d h %d t %d s) %s\n", parse->str,
472	nb_heads, max_track, last_sect, ro ? "ro" : "rw"));
473	}
474	if (nb_heads == 1) {
475	drv->flags &= ~FDISK_DBL_SIDES;
476	} else {
477	drv->flags \|= FDISK_DBL_SIDES;
478	}
479	drv->max_track = max_track;
480	drv->last_sect = last_sect;
481	drv->ro = ro;
482	} else {
483	FLOPPY_DPRINTF("No disk in drive\n");
484	drv->last_sect = 0;
485	drv->max_track = 0;
486	drv->flags &= ~FDISK_DBL_SIDES;
487	drv->dsk_chg = true; /* Disk change line active. */
488	}
489	}
490
491	/********************************************************/
492	/* Intel 82078 floppy disk controller emulation */
493
494	static void fdctrl_reset(fdctrl_t *fdctrl, int do_irq);
495	static void fdctrl_reset_fifo(fdctrl_t *fdctrl);
496	static fdrive_t get_cur_drv(fdctrl_t fdctrl);
497
498	static uint32_t fdctrl_read_statusA(fdctrl_t *fdctrl);
499	static uint32_t fdctrl_read_statusB(fdctrl_t *fdctrl);
500	static uint32_t fdctrl_read_dor(fdctrl_t *fdctrl);
501	static void fdctrl_write_dor(fdctrl_t *fdctrl, uint32_t value);
502	static uint32_t fdctrl_read_tape(fdctrl_t *fdctrl);
503	static void fdctrl_write_tape(fdctrl_t *fdctrl, uint32_t value);
504	static uint32_t fdctrl_read_main_status(fdctrl_t *fdctrl);
505	static void fdctrl_write_rate(fdctrl_t *fdctrl, uint32_t value);
506	static uint32_t fdctrl_read_data(fdctrl_t *fdctrl);
507	static void fdctrl_write_data(fdctrl_t *fdctrl, uint32_t value);
508	static uint32_t fdctrl_read_dir(fdctrl_t *fdctrl);
509	static void fdctrl_write_ccr(fdctrl_t *fdctrl, uint32_t value);
510
511	enum {
512	FD_DIR_WRITE = 0,
513	FD_DIR_READ = 1,
514	FD_DIR_SCANE = 2,
515	FD_DIR_SCANL = 3,
516	FD_DIR_SCANH = 4,
517	FD_DIR_FORMAT = 5
518	};
519
520	enum {
521	FD_STATE_MULTI = 0x01, /* multi track flag */
522	FD_STATE_FORMAT = 0x02, /* format flag */
523	FD_STATE_SEEK = 0x04 /* seek flag */
524	};
525
526	enum {
527	FD_REG_SRA = 0x00,
528	FD_REG_SRB = 0x01,
529	FD_REG_DOR = 0x02,
530	FD_REG_TDR = 0x03,
531	FD_REG_MSR = 0x04,
532	FD_REG_DSR = 0x04,
533	FD_REG_FIFO = 0x05,
534	FD_REG_DIR = 0x07,
535	FD_REG_CCR = 0x07
536	};
537
538	enum {
539	FD_CMD_READ_TRACK = 0x02,
540	FD_CMD_SPECIFY = 0x03,
541	FD_CMD_SENSE_DRIVE_STATUS = 0x04,
542	FD_CMD_WRITE = 0x05,
543	FD_CMD_READ = 0x06,
544	FD_CMD_RECALIBRATE = 0x07,
545	FD_CMD_SENSE_INTERRUPT_STATUS = 0x08,
546	FD_CMD_WRITE_DELETED = 0x09,
547	FD_CMD_READ_ID = 0x0a,
548	FD_CMD_READ_DELETED = 0x0c,
549	FD_CMD_FORMAT_TRACK = 0x0d,
550	FD_CMD_DUMPREG = 0x0e,
551	FD_CMD_SEEK = 0x0f,
552	FD_CMD_VERSION = 0x10,
553	FD_CMD_SCAN_EQUAL = 0x11,
554	FD_CMD_PERPENDICULAR_MODE = 0x12,
555	FD_CMD_CONFIGURE = 0x13,
556	FD_CMD_LOCK = 0x14,
557	FD_CMD_VERIFY = 0x16,
558	FD_CMD_POWERDOWN_MODE = 0x17,
559	FD_CMD_PART_ID = 0x18,
560	FD_CMD_SCAN_LOW_OR_EQUAL = 0x19,
561	FD_CMD_SCAN_HIGH_OR_EQUAL = 0x1d,
562	FD_CMD_SAVE = 0x2e,
563	FD_CMD_OPTION = 0x33,
564	FD_CMD_RESTORE = 0x4e,
565	FD_CMD_DRIVE_SPECIFICATION_COMMAND = 0x8e,
566	FD_CMD_RELATIVE_SEEK_OUT = 0x8f,
567	FD_CMD_FORMAT_AND_WRITE = 0xcd,
568	FD_CMD_RELATIVE_SEEK_IN = 0xcf
569	};
570
571	enum {
572	FD_CONFIG_PRETRK = 0xff, /* Pre-compensation set to track 0 */
573	FD_CONFIG_FIFOTHR = 0x0f, /* FIFO threshold set to 1 byte */
574	FD_CONFIG_POLL = 0x10, /* Poll enabled */
575	FD_CONFIG_EFIFO = 0x20, /* FIFO disabled */
576	FD_CONFIG_EIS = 0x40 /* No implied seeks */
577	};
578
579	enum {
580	FD_SR0_EQPMT = 0x10,
581	FD_SR0_SEEK = 0x20,
582	FD_SR0_ABNTERM = 0x40,
583	FD_SR0_INVCMD = 0x80,
584	FD_SR0_RDYCHG = 0xc0
585	};
586
587	enum {
588	FD_SR1_MA = 0x01, /* Missing address mark */
589	FD_SR1_NW = 0x02, /* Not writable */
590	FD_SR1_ND = 0x04, /* No data */
591	FD_SR1_EC = 0x80 /* End of cylinder */
592	};
593
594	enum {
595	FD_SR2_MD = 0x01, /* Missing data address mark */
596	FD_SR2_SNS = 0x04, /* Scan not satisfied */
597	FD_SR2_SEH = 0x08 /* Scan equal hit */
598	};
599
600	enum {
601	FD_SRA_DIR = 0x01,
602	FD_SRA_nWP = 0x02,
603	FD_SRA_nINDX = 0x04,
604	FD_SRA_HDSEL = 0x08,
605	FD_SRA_nTRK0 = 0x10,
606	FD_SRA_STEP = 0x20,
607	FD_SRA_nDRV2 = 0x40,
608	FD_SRA_INTPEND = 0x80
609	};
610
611	enum {
612	FD_SRB_MTR0 = 0x01,
613	FD_SRB_MTR1 = 0x02,
614	FD_SRB_WGATE = 0x04,
615	FD_SRB_RDATA = 0x08,
616	FD_SRB_WDATA = 0x10,
617	FD_SRB_DR0 = 0x20
618	};
619
620	enum {
621	#if MAX_FD == 4
622	FD_DRV_SELMASK = 0x03,
623	#else
624	FD_DRV_SELMASK = 0x01,
625	#endif
626	};
627
628	enum {
629	FD_DOR_SELMASK = 0x03, /* Always two bits regardless of FD_DRV_SELMASK. */
630	FD_DOR_nRESET = 0x04,
631	FD_DOR_DMAEN = 0x08,
632	FD_DOR_MOTEN0 = 0x10,
633	FD_DOR_MOTEN1 = 0x20,
634	FD_DOR_MOTEN2 = 0x40,
635	FD_DOR_MOTEN3 = 0x80
636	};
637
638	enum {
639	#if MAX_FD == 4
640	FD_TDR_BOOTSEL = 0x0c
641	#else
642	FD_TDR_BOOTSEL = 0x04
643	#endif
644	};
645
646	enum {
647	FD_DSR_DRATEMASK= 0x03,
648	FD_DSR_PWRDOWN = 0x40,
649	FD_DSR_SWRESET = 0x80
650	};
651
652	enum {
653	FD_MSR_DRV0BUSY = 0x01,
654	FD_MSR_DRV1BUSY = 0x02,
655	FD_MSR_DRV2BUSY = 0x04,
656	FD_MSR_DRV3BUSY = 0x08,
657	FD_MSR_CMDBUSY = 0x10,
658	FD_MSR_NONDMA = 0x20,
659	FD_MSR_DIO = 0x40,
660	FD_MSR_RQM = 0x80
661	};
662
663	enum {
664	FD_DIR_DSKCHG = 0x80
665	};
666
667	#define FD_MULTI_TRACK(state) ((state) & FD_STATE_MULTI)
668	#define FD_DID_SEEK(state) ((state) & FD_STATE_SEEK)
669	#define FD_FORMAT_CMD(state) ((state) & FD_STATE_FORMAT)
670
671	/**
672	* Floppy controller state.
673	*
674	* @implements PDMILEDPORTS
675	*/
676	struct fdctrl_t {
677	/* Controller's identification */
678	uint8_t version;
679	/* HW */
680	uint8_t irq_lvl;
681	uint8_t dma_chann;
682	uint16_t io_base;
683	/* Controller state */
684	TMTIMERHANDLE hResultTimer;
685
686	/* Interrupt delay timers. */
687	TMTIMERHANDLE hXferDelayTimer;
688	TMTIMERHANDLE hIrqDelayTimer;
689	uint16_t uIrqDelayMsec;
690	uint8_t st0;
691	uint8_t st1;
692	uint8_t st2;
693
694	uint8_t sra;
695	uint8_t srb;
696	uint8_t dor;
697	uint8_t tdr;
698	uint8_t dsr;
699	uint8_t msr;
700	uint8_t cur_drv;
701	uint8_t status0;
702	uint8_t status1;
703	uint8_t status2;
704	/* Command FIFO */
705	uint8_t fifo[FD_SECTOR_LEN];
706	uint32_t data_pos;
707	uint32_t data_len;
708	uint8_t data_state;
709	uint8_t data_dir;
710	uint8_t eot; /* last wanted sector */
711	/* Debugging only */
712	uint8_t cur_cmd;
713	uint8_t prev_cmd;
714	/* States kept only to be returned back */
715	/* Timers state */
716	uint8_t timer0;
717	uint8_t timer1;
718	/* precompensation */
719	uint8_t precomp_trk;
720	uint8_t config;
721	uint8_t lock;
722	/* Power down config (also with status regB access mode */
723	uint8_t pwrd;
724	/* Floppy drives */
725	uint8_t num_floppies;
726	fdrive_t drives[MAX_FD];
727	uint8_t reset_sensei;
728	/** Pointer to device instance. */
729	PPDMDEVINS pDevIns;
730
731	/** Status LUN: The base interface. */
732	PDMIBASE IBaseStatus;
733	/** Status LUN: The Leds interface. */
734	PDMILEDPORTS ILeds;
735	/** Status LUN: The Partner of ILeds. */
736	PPDMILEDCONNECTORS pLedsConnector;
737
738	/** I/O ports: 0x3f0 */
739	IOMIOPORTHANDLE hIoPorts0;
740	/** I/O ports: 0x3f1..0x3f5 */
741	IOMIOPORTHANDLE hIoPorts1;
742	/** I/O port: 0x3f7 */
743	IOMIOPORTHANDLE hIoPorts2;
744	};
745
746	static uint32_t fdctrl_read (fdctrl_t *fdctrl, uint32_t reg)
747	{
748	uint32_t retval;
749
750	switch (reg) {
751	case FD_REG_SRA:
752	retval = fdctrl_read_statusA(fdctrl);
753	break;
754	case FD_REG_SRB:
755	retval = fdctrl_read_statusB(fdctrl);
756	break;
757	case FD_REG_DOR:
758	retval = fdctrl_read_dor(fdctrl);
759	break;
760	case FD_REG_TDR:
761	retval = fdctrl_read_tape(fdctrl);
762	break;
763	case FD_REG_MSR:
764	retval = fdctrl_read_main_status(fdctrl);
765	break;
766	case FD_REG_FIFO:
767	retval = fdctrl_read_data(fdctrl);
768	break;
769	case FD_REG_DIR:
770	retval = fdctrl_read_dir(fdctrl);
771	break;
772	default:
773	retval = UINT32_MAX;
774	break;
775	}
776	FLOPPY_DPRINTF("read reg%d: 0x%02x\n", reg & 7, retval);
777
778	return retval;
779	}
780
781	static void fdctrl_write (fdctrl_t *fdctrl, uint32_t reg, uint32_t value)
782	{
783	FLOPPY_DPRINTF("write reg%d: 0x%02x\n", reg & 7, value);
784
785	switch (reg) {
786	case FD_REG_DOR:
787	fdctrl_write_dor(fdctrl, value);
788	break;
789	case FD_REG_TDR:
790	fdctrl_write_tape(fdctrl, value);
791	break;
792	case FD_REG_DSR:
793	fdctrl_write_rate(fdctrl, value);
794	break;
795	case FD_REG_FIFO:
796	fdctrl_write_data(fdctrl, value);
797	break;
798	case FD_REG_CCR:
799	fdctrl_write_ccr(fdctrl, value);
800	break;
801	default:
802	break;
803	}
804	}
805
806	/* Change IRQ state */
807	static void fdctrl_reset_irq(fdctrl_t *fdctrl)
808	{
809	if (!(fdctrl->sra & FD_SRA_INTPEND))
810	return;
811	FLOPPY_DPRINTF("Reset interrupt\n");
812	PDMDevHlpISASetIrq (fdctrl->pDevIns, fdctrl->irq_lvl, 0);
813	fdctrl->sra &= ~FD_SRA_INTPEND;
814	}
815
816	static void fdctrl_raise_irq_now(fdctrl_t *fdctrl, uint8_t status0)
817	{
818	if (!(fdctrl->sra & FD_SRA_INTPEND)) {
819	FLOPPY_DPRINTF("Raising interrupt...\n");
820	PDMDevHlpISASetIrq (fdctrl->pDevIns, fdctrl->irq_lvl, 1);
821	fdctrl->sra \|= FD_SRA_INTPEND;
822	}
823	if (status0 & FD_SR0_SEEK) {
824	fdrive_t *cur_drv;
825
826	/* A seek clears the disk change line (if a disk is inserted). */
827	cur_drv = get_cur_drv(fdctrl);
828	if (cur_drv->max_track)
829	cur_drv->dsk_chg = false;
830	}
831
832	fdctrl->reset_sensei = 0;
833	fdctrl->status0 = status0;
834	FLOPPY_DPRINTF("Set interrupt status to 0x%02x\n", fdctrl->status0);
835	}
836
837	static void fdctrl_raise_irq(fdctrl_t *fdctrl, uint8_t status0)
838	{
839	if (!fdctrl->uIrqDelayMsec)
840	{
841	/* If not IRQ delay needed, trigger the interrupt now. */
842	fdctrl_raise_irq_now(fdctrl, status0);
843	}
844	else
845	{
846	/* Otherwise schedule completion after a short while. */
847	fdctrl->st0 = status0;
848	PDMDevHlpTimerSetMillies(fdctrl->pDevIns, fdctrl->hIrqDelayTimer, fdctrl->uIrqDelayMsec);
849	}
850	}
851
852	/* Reset controller */
853	static void fdctrl_reset(fdctrl_t *fdctrl, int do_irq)
854	{
855	int i;
856
857	FLOPPY_DPRINTF("reset controller\n");
858	fdctrl_reset_irq(fdctrl);
859	/* Initialise controller */
860	fdctrl->sra = 0;
861	fdctrl->srb = 0xc0;
862	if (!fdctrl->drives[1].pDrvMedia)
863	fdctrl->sra \|= FD_SRA_nDRV2;
864	fdctrl->cur_drv = 0;
865	fdctrl->dor = FD_DOR_nRESET;
866	fdctrl->dor \|= (fdctrl->dma_chann != 0xff) ? FD_DOR_DMAEN : 0;
867	fdctrl->msr = FD_MSR_RQM;
868	/* FIFO state */
869	fdctrl->data_pos = 0;
870	fdctrl->data_len = 0;
871	fdctrl->data_state = 0;
872	fdctrl->data_dir = FD_DIR_WRITE;
873	for (i = 0; i < MAX_FD; i++)
874	fd_recalibrate(&fdctrl->drives[i]);
875	fdctrl_reset_fifo(fdctrl);
876	if (do_irq) {
877	fdctrl_raise_irq(fdctrl, FD_SR0_RDYCHG);
878	fdctrl->reset_sensei = FD_RESET_SENSEI_COUNT;
879	}
880	}
881
882	static inline fdrive_t drv0(fdctrl_t fdctrl)
883	{
884	return &fdctrl->drives[(fdctrl->tdr & FD_TDR_BOOTSEL) >> 2];
885	}
886
887	static inline fdrive_t drv1(fdctrl_t fdctrl)
888	{
889	if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (1 << 2))
890	return &fdctrl->drives[1];
891	else
892	return &fdctrl->drives[0];
893	}
894
895	#if MAX_FD == 4
896	static inline fdrive_t drv2(fdctrl_t fdctrl)
897	{
898	if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (2 << 2))
899	return &fdctrl->drives[2];
900	else
901	return &fdctrl->drives[1];
902	}
903
904	static inline fdrive_t drv3(fdctrl_t fdctrl)
905	{
906	if ((fdctrl->tdr & FD_TDR_BOOTSEL) < (3 << 2))
907	return &fdctrl->drives[3];
908	else
909	return &fdctrl->drives[2];
910	}
911	#endif
912
913	static fdrive_t get_cur_drv(fdctrl_t fdctrl)
914	{
915	#if MAX_FD == 2
916	if (fdctrl->dor & FD_DRV_SELMASK)
917	return drv1(fdctrl);
918
919	return drv0(fdctrl);
920	#else
921	switch (fdctrl->dor & FD_DRV_SELMASK) {
922	case 0: return drv0(fdctrl);
923	case 1: return drv1(fdctrl);
924	# if MAX_FD == 4
925	case 2: return drv2(fdctrl);
926	case 3: return drv3(fdctrl);
927	# endif
928	default: return NULL;
929	}
930	#endif
931	}
932
933	/* Status A register : 0x00 (read-only) */
934	static uint32_t fdctrl_read_statusA(fdctrl_t *fdctrl)
935	{
936	uint32_t retval = fdctrl->sra;
937
938	FLOPPY_DPRINTF("status register A: 0x%02x\n", retval);
939
940	return retval;
941	}
942
943	/* Status B register : 0x01 (read-only) */
944	static uint32_t fdctrl_read_statusB(fdctrl_t *fdctrl)
945	{
946	uint32_t retval = fdctrl->srb;
947
948	FLOPPY_DPRINTF("status register B: 0x%02x\n", retval);
949
950	return retval;
951	}
952
953	/* Digital output register : 0x02 */
954	static uint32_t fdctrl_read_dor(fdctrl_t *fdctrl)
955	{
956	uint32_t retval = fdctrl->dor;
957
958	FLOPPY_DPRINTF("digital output register: 0x%02x\n", retval);
959
960	return retval;
961	}
962
963	static void fdctrl_write_dor(fdctrl_t *fdctrl, uint32_t value)
964	{
965	FLOPPY_DPRINTF("digital output register set to 0x%02x\n", value);
966
967	/* Motors */
968	if (value & FD_DOR_MOTEN0)
969	fdctrl->srb \|= FD_SRB_MTR0;
970	else
971	fdctrl->srb &= ~FD_SRB_MTR0;
972	if (value & FD_DOR_MOTEN1)
973	fdctrl->srb \|= FD_SRB_MTR1;
974	else
975	fdctrl->srb &= ~FD_SRB_MTR1;
976
977	/* Drive */
978	if (value & 1)
979	fdctrl->srb \|= FD_SRB_DR0;
980	else
981	fdctrl->srb &= ~FD_SRB_DR0;
982
983	/* Reset */
984	if (!(value & FD_DOR_nRESET)) {
985	if (fdctrl->dor & FD_DOR_nRESET) {
986	FLOPPY_DPRINTF("controller enter RESET state\n");
987	}
988	} else {
989	if (!(fdctrl->dor & FD_DOR_nRESET)) {
990	FLOPPY_DPRINTF("controller out of RESET state\n");
991	fdctrl_reset(fdctrl, 1);
992	fdctrl->dsr &= ~FD_DSR_PWRDOWN;
993	}
994	}
995
996	fdctrl->dor = value;
997	}
998
999	/* Tape drive register : 0x03 */
1000	static uint32_t fdctrl_read_tape(fdctrl_t *fdctrl)
1001	{
1002	uint32_t retval = fdctrl->tdr;
1003
1004	FLOPPY_DPRINTF("tape drive register: 0x%02x\n", retval);
1005
1006	return retval;
1007	}
1008
1009	static void fdctrl_write_tape(fdctrl_t *fdctrl, uint32_t value)
1010	{
1011	/* Reset mode */
1012	if (!(fdctrl->dor & FD_DOR_nRESET)) {
1013	FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1014	return;
1015	}
1016	FLOPPY_DPRINTF("tape drive register set to 0x%02x\n", value);
1017	/* Disk boot selection indicator */
1018	fdctrl->tdr = value & FD_TDR_BOOTSEL;
1019	/* Tape indicators: never allow */
1020	}
1021
1022	/* Main status register : 0x04 (read) */
1023	static uint32_t fdctrl_read_main_status(fdctrl_t *fdctrl)
1024	{
1025	uint32_t retval = fdctrl->msr;
1026
1027	fdctrl->dsr &= ~FD_DSR_PWRDOWN;
1028	fdctrl->dor \|= FD_DOR_nRESET;
1029
1030	FLOPPY_DPRINTF("main status register: 0x%02x\n", retval);
1031
1032	return retval;
1033	}
1034
1035	/* Data select rate register : 0x04 (write) */
1036	static void fdctrl_write_rate(fdctrl_t *fdctrl, uint32_t value)
1037	{
1038	/* Reset mode */
1039	if (!(fdctrl->dor & FD_DOR_nRESET)) {
1040	FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1041	return;
1042	}
1043	FLOPPY_DPRINTF("select rate register set to 0x%02x\n", value);
1044	/* Reset: autoclear */
1045	if (value & FD_DSR_SWRESET) {
1046	fdctrl->dor &= ~FD_DOR_nRESET;
1047	fdctrl_reset(fdctrl, 1);
1048	fdctrl->dor \|= FD_DOR_nRESET;
1049	}
1050	if (value & FD_DSR_PWRDOWN) {
1051	fdctrl_reset(fdctrl, 1);
1052	}
1053	fdctrl->dsr = value;
1054	}
1055
1056	/* Configuration control register : 0x07 (write) */
1057	static void fdctrl_write_ccr(fdctrl_t *fdctrl, uint32_t value)
1058	{
1059	/* Reset mode */
1060	if (!(fdctrl->dor & FD_DOR_nRESET)) {
1061	FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
1062	return;
1063	}
1064	FLOPPY_DPRINTF("configuration control register set to 0x%02x\n", value);
1065
1066	/* Only the rate selection bits used in AT mode, and we
1067	* store those in the DSR.
1068	*/
1069	fdctrl->dsr = (fdctrl->dsr & ~FD_DSR_DRATEMASK) \| (value & FD_DSR_DRATEMASK);
1070	}
1071
1072	static int fdctrl_media_changed(fdrive_t *drv)
1073	{
1074	return drv->dsk_chg;
1075	}
1076
1077	/* Digital input register : 0x07 (read-only) */
1078	static uint32_t fdctrl_read_dir(fdctrl_t *fdctrl)
1079	{
1080	uint32_t retval = 0;
1081
1082	/* The change line signal is reported by the currently selected
1083	* drive. If the corresponding motor on bit is not set, the drive
1084	* is not selected!
1085	*/
1086	if (fdctrl_media_changed(get_cur_drv(fdctrl))
1087	&& (fdctrl->dor & (0x10 << (fdctrl->dor & FD_DOR_SELMASK))))
1088	retval \|= FD_DIR_DSKCHG;
1089	if (retval != 0)
1090	FLOPPY_DPRINTF("Floppy digital input register: 0x%02x\n", retval);
1091
1092	return retval;
1093	}
1094
1095	/* FIFO state control */
1096	static void fdctrl_reset_fifo(fdctrl_t *fdctrl)
1097	{
1098	fdctrl->data_dir = FD_DIR_WRITE;
1099	fdctrl->data_pos = 0;
1100	fdctrl->msr &= ~(FD_MSR_CMDBUSY \| FD_MSR_DIO);
1101	fdctrl->prev_cmd = fdctrl->cur_cmd;
1102	fdctrl->cur_cmd = 0;
1103	}
1104
1105	/* Set FIFO status for the host to read */
1106	static void fdctrl_set_fifo(fdctrl_t *fdctrl, int fifo_len, int do_irq)
1107	{
1108	fdctrl->data_dir = FD_DIR_READ;
1109	fdctrl->data_len = fifo_len;
1110	fdctrl->data_pos = 0;
1111	fdctrl->msr \|= FD_MSR_CMDBUSY \| FD_MSR_RQM \| FD_MSR_DIO;
1112	if (do_irq)
1113	fdctrl_raise_irq(fdctrl, 0x00);
1114	}
1115
1116	/* Set an error: unimplemented/unknown command */
1117	static void fdctrl_unimplemented(fdctrl_t *fdctrl, int direction)
1118	{
1119	RT_NOREF(direction);
1120	FLOPPY_ERROR("unimplemented command 0x%02x\n", fdctrl->fifo[0]);
1121	fdctrl->fifo[0] = FD_SR0_INVCMD;
1122	fdctrl_set_fifo(fdctrl, 1, 0);
1123	}
1124
1125	/* Seek to next sector */
1126	static int fdctrl_seek_to_next_sect(fdctrl_t fdctrl, fdrive_t cur_drv)
1127	{
1128	FLOPPY_DPRINTF("seek to next sector (%d %02x %02x => %d)\n",
1129	cur_drv->head, cur_drv->track, cur_drv->sect,
1130	fd_sector(cur_drv));
1131	/* XXX: cur_drv->sect >= cur_drv->last_sect should be an
1132	error in fact */
1133	if (cur_drv->sect >= cur_drv->last_sect \|\|
1134	cur_drv->sect == fdctrl->eot) {
1135	cur_drv->sect = 1;
1136	if (FD_MULTI_TRACK(fdctrl->data_state)) {
1137	if (cur_drv->head == 0 &&
1138	(cur_drv->flags & FDISK_DBL_SIDES) != 0) {
1139	cur_drv->head = 1;
1140	} else {
1141	cur_drv->head = 0;
1142	cur_drv->ltrk++;
1143	if ((cur_drv->flags & FDISK_DBL_SIDES) == 0)
1144	return 0;
1145	}
1146	} else {
1147	cur_drv->ltrk++;
1148	return 0;
1149	}
1150	FLOPPY_DPRINTF("seek to next track (%d %02x %02x => %d)\n",
1151	cur_drv->head, cur_drv->track,
1152	cur_drv->sect, fd_sector(cur_drv));
1153	} else {
1154	cur_drv->sect++;
1155	}
1156	return 1;
1157	}
1158
1159	/* Callback for transfer end (stop or abort) */
1160	static void fdctrl_stop_transfer_now(fdctrl_t *fdctrl, uint8_t status0,
1161	uint8_t status1, uint8_t status2)
1162	{
1163	fdrive_t *cur_drv;
1164
1165	cur_drv = get_cur_drv(fdctrl);
1166	FLOPPY_DPRINTF("transfer status: %02x %02x %02x (%02x)\n",
1167	status0, status1, status2,
1168	status0 \| (cur_drv->head << 2) \| GET_CUR_DRV(fdctrl));
1169	fdctrl->fifo[0] = status0 \| (cur_drv->head << 2) \| GET_CUR_DRV(fdctrl);
1170	fdctrl->fifo[1] = status1;
1171	fdctrl->fifo[2] = status2;
1172	fdctrl->fifo[3] = cur_drv->ltrk;
1173	fdctrl->fifo[4] = cur_drv->head;
1174	fdctrl->fifo[5] = cur_drv->sect;
1175	fdctrl->fifo[6] = FD_SECTOR_SC;
1176	FLOPPY_DPRINTF("ST0:%02x ST1:%02x ST2:%02x C:%02x H:%02x R:%02x N:%02x\n",
1177	fdctrl->fifo[0], fdctrl->fifo[1], fdctrl->fifo[2], fdctrl->fifo[3],
1178	fdctrl->fifo[4], fdctrl->fifo[5], fdctrl->fifo[6]);
1179
1180	fdctrl->data_dir = FD_DIR_READ;
1181	if (!(fdctrl->msr & FD_MSR_NONDMA)) {
1182	PDMDevHlpDMASetDREQ (fdctrl->pDevIns, fdctrl->dma_chann, 0);
1183	}
1184	fdctrl->msr \|= FD_MSR_RQM \| FD_MSR_DIO;
1185	fdctrl->msr &= ~FD_MSR_NONDMA;
1186	fdctrl_set_fifo(fdctrl, 7, 1);
1187	}
1188
1189	static void fdctrl_stop_transfer(fdctrl_t *fdctrl, uint8_t status0,
1190	uint8_t status1, uint8_t status2)
1191	{
1192	if (!fdctrl->uIrqDelayMsec)
1193	{
1194	/* If not IRQ delay needed, just stop the transfer and trigger IRQ now. */
1195	fdctrl_stop_transfer_now(fdctrl, status0, status1, status2);
1196	}
1197	else
1198	{
1199	/* Otherwise schedule completion after a short while. */
1200	fdctrl->st0 = status0;
1201	fdctrl->st1 = status1;
1202	fdctrl->st2 = status2;
1203	PDMDevHlpTimerSetMillies(fdctrl->pDevIns, fdctrl->hXferDelayTimer, fdctrl->uIrqDelayMsec);
1204	}
1205	}
1206
1207	/* Prepare a data transfer (either DMA or FIFO) */
1208	static void fdctrl_start_transfer(fdctrl_t *fdctrl, int direction)
1209	{
1210	fdrive_t *cur_drv;
1211	uint8_t kh, kt, ks;
1212	int did_seek = 0;
1213
1214	SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1215	cur_drv = get_cur_drv(fdctrl);
1216	kt = fdctrl->fifo[2];
1217	kh = fdctrl->fifo[3];
1218	ks = fdctrl->fifo[4];
1219	FLOPPY_DPRINTF("Start transfer at %d %d %02x %02x (%d)\n",
1220	GET_CUR_DRV(fdctrl), kh, kt, ks,
1221	fd_sector_calc(kh, kt, ks, cur_drv->last_sect, NUM_SIDES(cur_drv)));
1222	FLOPPY_DPRINTF("CMD:%02x SEL:%02x C:%02x H:%02x R:%02x N:%02x EOT:%02x GPL:%02x DTL:%02x\n",
1223	fdctrl->fifo[0], fdctrl->fifo[1], fdctrl->fifo[2],
1224	fdctrl->fifo[3], fdctrl->fifo[4], fdctrl->fifo[5],
1225	fdctrl->fifo[6], fdctrl->fifo[7], fdctrl->fifo[8]);
1226	switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1227	case 2:
1228	/* sect too big */
1229	fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1230	fdctrl->fifo[3] = kt;
1231	fdctrl->fifo[4] = kh;
1232	fdctrl->fifo[5] = ks;
1233	return;
1234	case 3:
1235	/* track too big */
1236	fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1237	fdctrl->fifo[3] = kt;
1238	fdctrl->fifo[4] = kh;
1239	fdctrl->fifo[5] = ks;
1240	return;
1241	case 4:
1242	/* No seek enabled */
1243	fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1244	fdctrl->fifo[3] = kt;
1245	fdctrl->fifo[4] = kh;
1246	fdctrl->fifo[5] = ks;
1247	return;
1248	case 5:
1249	/* No disk in drive */
1250	/// @todo This is wrong! Command should not complete.
1251	fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM \| 0x08, /FD_SR1_MA \|/ FD_SR1_ND, 0x00);
1252	fdctrl->fifo[3] = kt;
1253	fdctrl->fifo[4] = kh;
1254	fdctrl->fifo[5] = ks;
1255	return;
1256	case 1:
1257	did_seek = 1;
1258	break;
1259	default:
1260	break;
1261	}
1262	/* Check the data rate. If the programmed data rate does not match
1263	* the currently inserted medium, the operation has to fail.
1264	*/
1265	if ((fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
1266	FLOPPY_DPRINTF("data rate mismatch (fdc=%d, media=%d)\n",
1267	fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
1268	fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, FD_SR2_MD);
1269	fdctrl->fifo[3] = kt;
1270	fdctrl->fifo[4] = kh;
1271	fdctrl->fifo[5] = ks;
1272	return;
1273	}
1274	/* Set the FIFO state */
1275	fdctrl->data_dir = direction;
1276	fdctrl->data_pos = 0;
1277	fdctrl->msr \|= FD_MSR_CMDBUSY;
1278	if (fdctrl->fifo[0] & 0x80)
1279	fdctrl->data_state \|= FD_STATE_MULTI;
1280	else
1281	fdctrl->data_state &= ~FD_STATE_MULTI;
1282	if (did_seek)
1283	fdctrl->data_state \|= FD_STATE_SEEK;
1284	else
1285	fdctrl->data_state &= ~FD_STATE_SEEK;
1286	if (fdctrl->fifo[5] == 00) {
1287	fdctrl->data_len = fdctrl->fifo[8];
1288	} else {
1289	int tmp;
1290	fdctrl->data_len = 128 << (fdctrl->fifo[5] > 7 ? 7 : fdctrl->fifo[5]);
1291	if (fdctrl->fifo[6] >= ks) {
1292	/* EOT is beyond the starting sector */
1293	tmp = (fdctrl->fifo[6] - ks + 1);
1294	if (fdctrl->fifo[0] & 0x80)
1295	tmp += fdctrl->fifo[6];
1296	} else {
1297	/* EOT is below starting sector; keep going until we run out of sectors. */
1298	tmp = 255;
1299	}
1300	fdctrl->data_len *= tmp;
1301	}
1302	fdctrl->eot = fdctrl->fifo[6];
1303	if (fdctrl->dor & FD_DOR_DMAEN) {
1304	int dma_mode;
1305	/* DMA transfer are enabled. Check if DMA channel is well programmed */
1306	dma_mode = PDMDevHlpDMAGetChannelMode (fdctrl->pDevIns, fdctrl->dma_chann);
1307	dma_mode = (dma_mode >> 2) & 3;
1308	FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1309	dma_mode, direction,
1310	(128 << fdctrl->fifo[5]) *
1311	(cur_drv->last_sect - ks + 1), fdctrl->data_len);
1312	if (((direction == FD_DIR_SCANE \|\| direction == FD_DIR_SCANL \|\|
1313	direction == FD_DIR_SCANH) && dma_mode == 0) \|\|
1314	(direction == FD_DIR_WRITE && dma_mode == 2) \|\|
1315	(direction == FD_DIR_READ && (dma_mode == 1 \|\| dma_mode == 0))) {
1316	/* No access is allowed until DMA transfer has completed */
1317	fdctrl->msr &= ~FD_MSR_RQM;
1318	/* Now, we just have to wait for the DMA controller to
1319	* recall us...
1320	*/
1321	PDMDevHlpDMASetDREQ (fdctrl->pDevIns, fdctrl->dma_chann, 1);
1322	PDMDevHlpDMASchedule (fdctrl->pDevIns);
1323	return;
1324	} else {
1325	FLOPPY_ERROR("dma_mode=%d direction=%d\n", dma_mode, direction);
1326	}
1327	}
1328	FLOPPY_DPRINTF("start non-DMA transfer\n");
1329	fdctrl->msr \|= FD_MSR_NONDMA;
1330	if (direction != FD_DIR_WRITE)
1331	fdctrl->msr \|= FD_MSR_DIO;
1332
1333	/* IO based transfer: calculate len */
1334	fdctrl_raise_irq(fdctrl, 0x00);
1335	return;
1336	}
1337
1338	/* Prepare a format data transfer (either DMA or FIFO) */
1339	static void fdctrl_start_format(fdctrl_t *fdctrl)
1340	{
1341	fdrive_t *cur_drv;
1342	uint8_t ns, dp, kh, kt, ks;
1343
1344	SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1345	cur_drv = get_cur_drv(fdctrl);
1346	kt = cur_drv->track;
1347	kh = (fdctrl->fifo[1] & 0x04) >> 2;
1348	ns = fdctrl->fifo[3];
1349	dp = fdctrl->fifo[5];
1350	ks = 1;
1351	FLOPPY_DPRINTF("Start format at %d %d %02x, %d sect, pat %02x (%d)\n",
1352	GET_CUR_DRV(fdctrl), kh, kt, ns, dp,
1353	fd_sector_calc(kh, kt, ks, cur_drv->last_sect, NUM_SIDES(cur_drv)));
1354	switch (fd_seek(cur_drv, kh, kt, ks, false)) {
1355	case 2:
1356	/* sect too big */
1357	fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1358	fdctrl->fifo[3] = kt;
1359	fdctrl->fifo[4] = kh;
1360	fdctrl->fifo[5] = ks;
1361	return;
1362	case 3:
1363	/* track too big */
1364	fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1365	fdctrl->fifo[3] = kt;
1366	fdctrl->fifo[4] = kh;
1367	fdctrl->fifo[5] = ks;
1368	return;
1369	case 4:
1370	/* No seek enabled */
1371	fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1372	fdctrl->fifo[3] = kt;
1373	fdctrl->fifo[4] = kh;
1374	fdctrl->fifo[5] = ks;
1375	return;
1376	case 5:
1377	/* No disk in drive */
1378	fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, 0x00);
1379	fdctrl->fifo[3] = kt;
1380	fdctrl->fifo[4] = kh;
1381	fdctrl->fifo[5] = ks;
1382	return;
1383	case 1:
1384	break;
1385	default:
1386	break;
1387	}
1388	/* It's not clear what should happen if the data rate does not match. */
1389	#if 0
1390	/* Check the data rate. If the programmed data rate does not match
1391	* the currently inserted medium, the operation has to fail.
1392	*/
1393	if ((fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
1394	FLOPPY_DPRINTF("data rate mismatch (fdc=%d, media=%d)\n",
1395	fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
1396	fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, FD_SR2_MD);
1397	fdctrl->fifo[3] = kt;
1398	fdctrl->fifo[4] = kh;
1399	fdctrl->fifo[5] = ks;
1400	return;
1401	}
1402	#endif
1403	/* Set the FIFO state */
1404	fdctrl->data_dir = FD_DIR_FORMAT;
1405	fdctrl->data_pos = 0;
1406	fdctrl->msr \|= FD_MSR_CMDBUSY;
1407	fdctrl->data_state &= ~(FD_STATE_MULTI \| FD_STATE_SEEK);
1408	fdctrl->data_len = ns * 4;
1409	fdctrl->eot = ns;
1410	if (fdctrl->dor & FD_DOR_DMAEN) {
1411	int dma_mode;
1412	/* DMA transfer are enabled. Check if DMA channel is well programmed */
1413	dma_mode = PDMDevHlpDMAGetChannelMode (fdctrl->pDevIns, fdctrl->dma_chann);
1414	dma_mode = (dma_mode >> 2) & 3;
1415	FLOPPY_DPRINTF("dma_mode=%d direction=%d (%d - %d)\n",
1416	dma_mode, fdctrl->data_dir,
1417	(128 << fdctrl->fifo[2]) *
1418	(cur_drv->last_sect + 1), fdctrl->data_len);
1419	if (fdctrl->data_dir == FD_DIR_FORMAT && dma_mode == 2) {
1420	/* No access is allowed until DMA transfer has completed */
1421	fdctrl->msr &= ~FD_MSR_RQM;
1422	/* Now, we just have to wait for the DMA controller to
1423	* recall us...
1424	*/
1425	PDMDevHlpDMASetDREQ (fdctrl->pDevIns, fdctrl->dma_chann, 1);
1426	PDMDevHlpDMASchedule (fdctrl->pDevIns);
1427	return;
1428	} else {
1429	FLOPPY_ERROR("dma_mode=%d direction=%d\n", dma_mode, fdctrl->data_dir);
1430	}
1431	}
1432	FLOPPY_DPRINTF("start non-DMA format\n");
1433	fdctrl->msr \|= FD_MSR_NONDMA;
1434	/* IO based transfer: calculate len */
1435	fdctrl_raise_irq(fdctrl, 0x00);
1436
1437	return;
1438	}
1439
1440	/* Prepare a transfer of deleted data */
1441	static void fdctrl_start_transfer_del(fdctrl_t *fdctrl, int direction)
1442	{
1443	RT_NOREF(direction);
1444	FLOPPY_ERROR("fdctrl_start_transfer_del() unimplemented\n");
1445
1446	/* We don't handle deleted data,
1447	* so we don't return ANYTHING
1448	*/
1449	fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM \| FD_SR0_SEEK, 0x00, 0x00);
1450	}
1451
1452	/* Block driver read/write wrappers. */
1453
1454	static int blk_write(fdrive_t drv, int64_t sector_num, const uint8_t buf, int nb_sectors)
1455	{
1456	int rc;
1457
1458	drv->Led.Asserted.s.fWriting = drv->Led.Actual.s.fWriting = 1;
1459
1460	rc = drv->pDrvMedia->pfnWrite(drv->pDrvMedia, sector_num * FD_SECTOR_LEN,
1461	buf, nb_sectors * FD_SECTOR_LEN);
1462
1463	drv->Led.Actual.s.fWriting = 0;
1464	if (RT_FAILURE(rc))
1465	AssertMsgFailed(("Floppy: Failure to read sector %d. rc=%Rrc", sector_num, rc));
1466
1467	return rc;
1468	}
1469
1470	static int blk_read(fdrive_t drv, int64_t sector_num, uint8_t buf, int nb_sectors)
1471	{
1472	int rc;
1473
1474	drv->Led.Asserted.s.fReading = drv->Led.Actual.s.fReading = 1;
1475
1476	rc = drv->pDrvMedia->pfnRead(drv->pDrvMedia, sector_num * FD_SECTOR_LEN,
1477	buf, nb_sectors * FD_SECTOR_LEN);
1478
1479	drv->Led.Actual.s.fReading = 0;
1480
1481	if (RT_FAILURE(rc))
1482	AssertMsgFailed(("Floppy: Failure to read sector %d. rc=%Rrc", sector_num, rc));
1483
1484	return rc;
1485	}
1486
1487	/**
1488	* @callback_method_impl{FNDMATRANSFERHANDLER, handlers for DMA transfers}
1489	*/
1490	static DECLCALLBACK(uint32_t) fdctrl_transfer_handler(PPDMDEVINS pDevIns, void *pvUser,
1491	unsigned uChannel, uint32_t off, uint32_t cb)
1492	{
1493	RT_NOREF(pDevIns, off);
1494	fdctrl_t *fdctrl;
1495	fdrive_t *cur_drv;
1496	int rc;
1497	uint32_t len = 0;
1498	uint32_t start_pos, rel_pos;
1499	uint8_t status0 = 0x00, status1 = 0x00, status2 = 0x00;
1500
1501	fdctrl = (fdctrl_t *)pvUser;
1502	if (fdctrl->msr & FD_MSR_RQM) {
1503	FLOPPY_DPRINTF("Not in DMA transfer mode !\n");
1504	return 0;
1505	}
1506	cur_drv = get_cur_drv(fdctrl);
1507	if (fdctrl->data_dir == FD_DIR_SCANE \|\| fdctrl->data_dir == FD_DIR_SCANL \|\|
1508	fdctrl->data_dir == FD_DIR_SCANH)
1509	status2 = FD_SR2_SNS;
1510	if (cb > fdctrl->data_len)
1511	cb = fdctrl->data_len;
1512	if (cur_drv->pDrvMedia == NULL)
1513	{
1514	if (fdctrl->data_dir == FD_DIR_WRITE)
1515	fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM \| FD_SR0_SEEK, 0x00, 0x00);
1516	else
1517	fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1518	Assert(len == 0);
1519	goto transfer_error;
1520	}
1521
1522	if (cur_drv->ro)
1523	{
1524	if (fdctrl->data_dir == FD_DIR_WRITE \|\| fdctrl->data_dir == FD_DIR_FORMAT)
1525	{
1526	/* Handle readonly medium early, no need to do DMA, touch the
1527	* LED or attempt any writes. A real floppy doesn't attempt
1528	* to write to readonly media either. */
1529	fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM \| FD_SR0_SEEK, FD_SR1_NW,
1530	0x00);
1531	Assert(len == 0);
1532	goto transfer_error;
1533	}
1534	}
1535
1536	rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1537	for (start_pos = fdctrl->data_pos; fdctrl->data_pos < cb;) {
1538	len = cb - fdctrl->data_pos;
1539	if (len + rel_pos > FD_SECTOR_LEN)
1540	len = FD_SECTOR_LEN - rel_pos;
1541	FLOPPY_DPRINTF("copy %d bytes (%d %d %d) %d pos %d %02x (%d-0x%08x 0x%08x)\n",
1542	len, cb, fdctrl->data_pos, fdctrl->data_len, GET_CUR_DRV(fdctrl), cur_drv->head,
1543	cur_drv->track, cur_drv->sect, fd_sector(cur_drv), fd_sector(cur_drv) * FD_SECTOR_LEN);
1544	if (fdctrl->data_dir != FD_DIR_FORMAT &&
1545	(fdctrl->data_dir != FD_DIR_WRITE \|\|
1546	len < FD_SECTOR_LEN \|\| rel_pos != 0)) {
1547	/* READ & SCAN commands and realign to a sector for WRITE */
1548	rc = blk_read(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1549	if (RT_FAILURE(rc))
1550	{
1551	FLOPPY_DPRINTF("Floppy: error getting sector %d\n",
1552	fd_sector(cur_drv));
1553	/* Sure, image size is too small... */
1554	memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1555	}
1556	}
1557	switch (fdctrl->data_dir) {
1558	case FD_DIR_READ:
1559	/* READ commands */
1560	{
1561	uint32_t read;
1562	int rc2 = PDMDevHlpDMAWriteMemory(fdctrl->pDevIns, uChannel,
1563	fdctrl->fifo + rel_pos,
1564	fdctrl->data_pos,
1565	len, &read);
1566	AssertMsgRC (rc2, ("DMAWriteMemory -> %Rrc\n", rc2));
1567	}
1568	break;
1569	case FD_DIR_WRITE:
1570	/* WRITE commands */
1571	{
1572	uint32_t written;
1573	int rc2 = PDMDevHlpDMAReadMemory(fdctrl->pDevIns, uChannel,
1574	fdctrl->fifo + rel_pos,
1575	fdctrl->data_pos,
1576	len, &written);
1577	AssertMsgRC (rc2, ("DMAReadMemory -> %Rrc\n", rc2));
1578	}
1579
1580	rc = blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1581	if (RT_FAILURE(rc))
1582	{
1583	FLOPPY_ERROR("writing sector %d\n", fd_sector(cur_drv));
1584	fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM \| FD_SR0_SEEK, 0x00, 0x00);
1585	goto transfer_error;
1586	}
1587	break;
1588	case FD_DIR_FORMAT:
1589	/* FORMAT command */
1590	{
1591	uint8_t eot = fdctrl->fifo[3];
1592	uint8_t filler = fdctrl->fifo[5];
1593	uint32_t written;
1594	int sct;
1595	int rc2 = PDMDevHlpDMAReadMemory(fdctrl->pDevIns, uChannel,
1596	fdctrl->fifo + rel_pos,
1597	fdctrl->data_pos,
1598	len, &written);
1599	AssertMsgRC (rc2, ("DMAReadMemory -> %Rrc\n", rc2));
1600
1601	/* Fill the entire track with desired data pattern. */
1602	FLOPPY_DPRINTF("formatting track: %d sectors, pattern %02x\n",
1603	eot, filler);
1604	memset(fdctrl->fifo, filler, FD_SECTOR_LEN);
1605	for (sct = 0; sct < eot; ++sct)
1606	{
1607	rc = blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1608	if (RT_FAILURE(rc))
1609	{
1610	FLOPPY_ERROR("formatting sector %d\n", fd_sector(cur_drv));
1611	fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM \| FD_SR0_SEEK, 0x00, 0x00);
1612	goto transfer_error;
1613	}
1614	fdctrl_seek_to_next_sect(fdctrl, cur_drv);
1615	}
1616	}
1617	break;
1618	default:
1619	/* SCAN commands */
1620	{
1621	uint8_t tmpbuf[FD_SECTOR_LEN];
1622	int ret;
1623	uint32_t read;
1624	int rc2 = PDMDevHlpDMAReadMemory(fdctrl->pDevIns, uChannel, tmpbuf,
1625	fdctrl->data_pos, len, &read);
1626	AssertMsg(RT_SUCCESS(rc2), ("DMAReadMemory -> %Rrc2\n", rc2)); NOREF(rc2);
1627	ret = memcmp(tmpbuf, fdctrl->fifo + rel_pos, len);
1628	if (ret == 0) {
1629	status2 = FD_SR2_SEH;
1630	goto end_transfer;
1631	}
1632	if ((ret < 0 && fdctrl->data_dir == FD_DIR_SCANL) \|\|
1633	(ret > 0 && fdctrl->data_dir == FD_DIR_SCANH)) {
1634	status2 = 0x00;
1635	goto end_transfer;
1636	}
1637	}
1638	break;
1639	}
1640	fdctrl->data_pos += len;
1641	rel_pos = fdctrl->data_pos % FD_SECTOR_LEN;
1642	if (rel_pos == 0) {
1643	/* Seek to next sector */
1644	if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv))
1645	break;
1646	}
1647	}
1648	end_transfer:
1649	len = fdctrl->data_pos - start_pos;
1650	FLOPPY_DPRINTF("end transfer %d %d %d\n",
1651	fdctrl->data_pos, len, fdctrl->data_len);
1652	if (fdctrl->data_dir == FD_DIR_SCANE \|\|
1653	fdctrl->data_dir == FD_DIR_SCANL \|\|
1654	fdctrl->data_dir == FD_DIR_SCANH)
1655	status2 = FD_SR2_SEH;
1656	if (FD_DID_SEEK(fdctrl->data_state))
1657	status0 \|= FD_SR0_SEEK;
1658	fdctrl->data_len -= len;
1659	fdctrl_stop_transfer(fdctrl, status0, status1, status2);
1660	transfer_error:
1661
1662	return len;
1663	}
1664
1665	/* Data register : 0x05 */
1666	static uint32_t fdctrl_read_data(fdctrl_t *fdctrl)
1667	{
1668	fdrive_t *cur_drv;
1669	uint32_t retval = 0;
1670	unsigned pos;
1671	int rc;
1672
1673	cur_drv = get_cur_drv(fdctrl);
1674	fdctrl->dsr &= ~FD_DSR_PWRDOWN;
1675	if (!(fdctrl->msr & FD_MSR_RQM) \|\| !(fdctrl->msr & FD_MSR_DIO)) {
1676	FLOPPY_ERROR("controller not ready for reading\n");
1677	return 0;
1678	}
1679	pos = fdctrl->data_pos % FD_SECTOR_LEN;
1680	if (fdctrl->msr & FD_MSR_NONDMA) {
1681	if (cur_drv->pDrvMedia == NULL)
1682	{
1683	if (fdctrl->data_dir == FD_DIR_WRITE)
1684	fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM \| FD_SR0_SEEK, 0x00, 0x00);
1685	else
1686	fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1687	} else if (pos == 0) {
1688	if (fdctrl->data_pos != 0)
1689	if (!fdctrl_seek_to_next_sect(fdctrl, cur_drv)) {
1690	FLOPPY_DPRINTF("error seeking to next sector %d\n",
1691	fd_sector(cur_drv));
1692	return 0;
1693	}
1694
1695	rc = blk_read(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1696	if (RT_FAILURE(rc))
1697	{
1698	FLOPPY_DPRINTF("error getting sector %d\n",
1699	fd_sector(cur_drv));
1700	/* Sure, image size is too small... */
1701	memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1702	}
1703	}
1704	}
1705	retval = fdctrl->fifo[pos];
1706	if (++fdctrl->data_pos == fdctrl->data_len) {
1707	fdctrl->data_pos = 0;
1708	/* Switch from transfer mode to status mode
1709	* then from status mode to command mode
1710	*/
1711	if (fdctrl->msr & FD_MSR_NONDMA) {
1712	fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1713	} else {
1714	fdctrl_reset_fifo(fdctrl);
1715	fdctrl_reset_irq(fdctrl);
1716	}
1717	}
1718	FLOPPY_DPRINTF("data register: 0x%02x\n", retval);
1719
1720	return retval;
1721	}
1722
1723	static void fdctrl_format_sector(fdctrl_t *fdctrl)
1724	{
1725	fdrive_t *cur_drv;
1726	uint8_t kh, kt, ks;
1727	int ok = 0, rc;
1728
1729	SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1730	cur_drv = get_cur_drv(fdctrl);
1731	kt = fdctrl->fifo[6];
1732	kh = fdctrl->fifo[7];
1733	ks = fdctrl->fifo[8];
1734	FLOPPY_DPRINTF("format sector at %d %d %02x %02x (%d)\n",
1735	GET_CUR_DRV(fdctrl), kh, kt, ks,
1736	fd_sector_calc(kh, kt, ks, cur_drv->last_sect, NUM_SIDES(cur_drv)));
1737	switch (fd_seek(cur_drv, kh, kt, ks, fdctrl->config & FD_CONFIG_EIS)) {
1738	case 2:
1739	/* sect too big */
1740	fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1741	fdctrl->fifo[3] = kt;
1742	fdctrl->fifo[4] = kh;
1743	fdctrl->fifo[5] = ks;
1744	return;
1745	case 3:
1746	/* track too big */
1747	fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_EC, 0x00);
1748	fdctrl->fifo[3] = kt;
1749	fdctrl->fifo[4] = kh;
1750	fdctrl->fifo[5] = ks;
1751	return;
1752	case 4:
1753	/* No seek enabled */
1754	fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
1755	fdctrl->fifo[3] = kt;
1756	fdctrl->fifo[4] = kh;
1757	fdctrl->fifo[5] = ks;
1758	return;
1759	case 5:
1760	/* No disk in drive */
1761	fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA, 0x00);
1762	fdctrl->fifo[3] = kt;
1763	fdctrl->fifo[4] = kh;
1764	fdctrl->fifo[5] = ks;
1765	return;
1766	case 1:
1767	fdctrl->data_state \|= FD_STATE_SEEK;
1768	break;
1769	default:
1770	break;
1771	}
1772	memset(fdctrl->fifo, 0, FD_SECTOR_LEN);
1773	if (cur_drv->pDrvMedia) {
1774	rc = blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
1775	if (RT_FAILURE (rc)) {
1776	FLOPPY_ERROR("formatting sector %d\n", fd_sector(cur_drv));
1777	fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM \| FD_SR0_SEEK, 0x00, 0x00);
1778	} else {
1779	ok = 1;
1780	}
1781	}
1782	if (ok) {
1783	if (cur_drv->sect == cur_drv->last_sect) {
1784	fdctrl->data_state &= ~FD_STATE_FORMAT;
1785	/* Last sector done */
1786	if (FD_DID_SEEK(fdctrl->data_state))
1787	fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
1788	else
1789	fdctrl_stop_transfer(fdctrl, 0x00, 0x00, 0x00);
1790	} else {
1791	/* More to do */
1792	fdctrl->data_pos = 0;
1793	fdctrl->data_len = 4;
1794	}
1795	}
1796	}
1797
1798	static void fdctrl_handle_lock(fdctrl_t *fdctrl, int direction)
1799	{
1800	RT_NOREF(direction);
1801	fdctrl->lock = (fdctrl->fifo[0] & 0x80) ? 1 : 0;
1802	fdctrl->fifo[0] = fdctrl->lock << 4;
1803	fdctrl_set_fifo(fdctrl, 1, 0);
1804	}
1805
1806	static void fdctrl_handle_dumpreg(fdctrl_t *fdctrl, int direction)
1807	{
1808	RT_NOREF(direction);
1809	fdrive_t *cur_drv = get_cur_drv(fdctrl);
1810
1811	/* Drives position */
1812	fdctrl->fifo[0] = drv0(fdctrl)->track;
1813	fdctrl->fifo[1] = drv1(fdctrl)->track;
1814	#if MAX_FD == 4
1815	fdctrl->fifo[2] = drv2(fdctrl)->track;
1816	fdctrl->fifo[3] = drv3(fdctrl)->track;
1817	#else
1818	fdctrl->fifo[2] = 0;
1819	fdctrl->fifo[3] = 0;
1820	#endif
1821	/* timers */
1822	fdctrl->fifo[4] = fdctrl->timer0;
1823	fdctrl->fifo[5] = (fdctrl->timer1 << 1) \| (fdctrl->dor & FD_DOR_DMAEN ? 1 : 0);
1824	fdctrl->fifo[6] = cur_drv->last_sect;
1825	fdctrl->fifo[7] = (fdctrl->lock << 7) \|
1826	(cur_drv->perpendicular << 2);
1827	fdctrl->fifo[8] = fdctrl->config;
1828	fdctrl->fifo[9] = fdctrl->precomp_trk;
1829	fdctrl_set_fifo(fdctrl, 10, 0);
1830	}
1831
1832	static void fdctrl_handle_version(fdctrl_t *fdctrl, int direction)
1833	{
1834	RT_NOREF(direction);
1835	/* Controller's version */
1836	fdctrl->fifo[0] = fdctrl->version;
1837	fdctrl_set_fifo(fdctrl, 1, 0);
1838	}
1839
1840	static void fdctrl_handle_partid(fdctrl_t *fdctrl, int direction)
1841	{
1842	RT_NOREF(direction);
1843	fdctrl->fifo[0] = 0x01; /* Stepping 1 */
1844	fdctrl_set_fifo(fdctrl, 1, 0);
1845	}
1846
1847	static void fdctrl_handle_restore(fdctrl_t *fdctrl, int direction)
1848	{
1849	RT_NOREF(direction);
1850	fdrive_t *cur_drv = get_cur_drv(fdctrl);
1851
1852	/* Drives position */
1853	drv0(fdctrl)->track = fdctrl->fifo[3];
1854	drv1(fdctrl)->track = fdctrl->fifo[4];
1855	#if MAX_FD == 4
1856	drv2(fdctrl)->track = fdctrl->fifo[5];
1857	drv3(fdctrl)->track = fdctrl->fifo[6];
1858	#endif
1859	/* timers */
1860	fdctrl->timer0 = fdctrl->fifo[7];
1861	fdctrl->timer1 = fdctrl->fifo[8];
1862	cur_drv->last_sect = fdctrl->fifo[9];
1863	fdctrl->lock = fdctrl->fifo[10] >> 7;
1864	cur_drv->perpendicular = (fdctrl->fifo[10] >> 2) & 0xF;
1865	fdctrl->config = fdctrl->fifo[11];
1866	fdctrl->precomp_trk = fdctrl->fifo[12];
1867	fdctrl->pwrd = fdctrl->fifo[13];
1868	fdctrl_reset_fifo(fdctrl);
1869	}
1870
1871	static void fdctrl_handle_save(fdctrl_t *fdctrl, int direction)
1872	{
1873	RT_NOREF(direction);
1874	fdrive_t *cur_drv = get_cur_drv(fdctrl);
1875
1876	fdctrl->fifo[0] = 0;
1877	fdctrl->fifo[1] = 0;
1878	/* Drives position */
1879	fdctrl->fifo[2] = drv0(fdctrl)->track;
1880	fdctrl->fifo[3] = drv1(fdctrl)->track;
1881	#if MAX_FD == 4
1882	fdctrl->fifo[4] = drv2(fdctrl)->track;
1883	fdctrl->fifo[5] = drv3(fdctrl)->track;
1884	#else
1885	fdctrl->fifo[4] = 0;
1886	fdctrl->fifo[5] = 0;
1887	#endif
1888	/* timers */
1889	fdctrl->fifo[6] = fdctrl->timer0;
1890	fdctrl->fifo[7] = fdctrl->timer1;
1891	fdctrl->fifo[8] = cur_drv->last_sect;
1892	fdctrl->fifo[9] = (fdctrl->lock << 7) \|
1893	(cur_drv->perpendicular << 2);
1894	fdctrl->fifo[10] = fdctrl->config;
1895	fdctrl->fifo[11] = fdctrl->precomp_trk;
1896	fdctrl->fifo[12] = fdctrl->pwrd;
1897	fdctrl->fifo[13] = 0;
1898	fdctrl->fifo[14] = 0;
1899	fdctrl_set_fifo(fdctrl, 15, 0);
1900	}
1901
1902	static void fdctrl_handle_readid(fdctrl_t *fdctrl, int direction)
1903	{
1904	RT_NOREF(direction);
1905	fdrive_t *cur_drv = get_cur_drv(fdctrl);
1906
1907	FLOPPY_DPRINTF("CMD:%02x SEL:%02x\n", fdctrl->fifo[0], fdctrl->fifo[1]);
1908
1909	fdctrl->msr &= ~FD_MSR_RQM;
1910	cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
1911	PDMDevHlpTimerSetMillies(fdctrl->pDevIns, fdctrl->hResultTimer, 1000 / 50);
1912	}
1913
1914	static void fdctrl_handle_format_track(fdctrl_t *fdctrl, int direction)
1915	{
1916	RT_NOREF(direction);
1917	fdrive_t *cur_drv;
1918	uint8_t ns, dp;
1919
1920	SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1921	cur_drv = get_cur_drv(fdctrl);
1922	fdctrl->data_state &= ~(FD_STATE_MULTI \| FD_STATE_SEEK);
1923	ns = fdctrl->fifo[3];
1924	dp = fdctrl->fifo[5];
1925
1926	FLOPPY_DPRINTF("Format track %d at %d, %d sectors, filler %02x\n",
1927	cur_drv->track, GET_CUR_DRV(fdctrl), ns, dp);
1928	FLOPPY_DPRINTF("CMD:%02x SEL:%02x N:%02x SC:%02x GPL:%02x D:%02x\n",
1929	fdctrl->fifo[0], fdctrl->fifo[1], fdctrl->fifo[2],
1930	fdctrl->fifo[3], fdctrl->fifo[4], fdctrl->fifo[5]);
1931
1932	/* Since we cannot actually format anything, we have to make sure that
1933	* whatever new format the guest is trying to establish matches the
1934	* existing format of the medium.
1935	*/
1936	if (cur_drv->last_sect != ns \|\| fdctrl->fifo[2] != 2)
1937	fdctrl_stop_transfer(fdctrl, FD_SR0_ABNTERM, FD_SR1_NW, 0);
1938	else
1939	{
1940	cur_drv->bps = fdctrl->fifo[2] > 7 ? 16384 : 128 << fdctrl->fifo[2];
1941	cur_drv->last_sect = ns;
1942
1943	fdctrl_start_format(fdctrl);
1944	}
1945	}
1946
1947	static void fdctrl_handle_specify(fdctrl_t *fdctrl, int direction)
1948	{
1949	RT_NOREF(direction);
1950	fdctrl->timer0 = (fdctrl->fifo[1] >> 4) & 0xF;
1951	fdctrl->timer1 = fdctrl->fifo[2] >> 1;
1952	if (fdctrl->fifo[2] & 1)
1953	fdctrl->dor &= ~FD_DOR_DMAEN;
1954	else
1955	fdctrl->dor \|= FD_DOR_DMAEN;
1956	/* No result back */
1957	fdctrl_reset_fifo(fdctrl);
1958	}
1959
1960	static void fdctrl_handle_sense_drive_status(fdctrl_t *fdctrl, int direction)
1961	{
1962	RT_NOREF(direction);
1963	fdrive_t *cur_drv;
1964
1965	SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1966	cur_drv = get_cur_drv(fdctrl);
1967	cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
1968	/* 1 Byte status back */
1969	fdctrl->fifo[0] = (cur_drv->ro << 6) \|
1970	(cur_drv->track == 0 ? 0x10 : 0x00) \|
1971	(cur_drv->head << 2) \|
1972	GET_CUR_DRV(fdctrl) \|
1973	0x28;
1974	fdctrl_set_fifo(fdctrl, 1, 0);
1975	}
1976
1977	static void fdctrl_handle_recalibrate(fdctrl_t *fdctrl, int direction)
1978	{
1979	RT_NOREF(direction);
1980	fdrive_t *cur_drv;
1981	uint8_t st0;
1982
1983	SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
1984	cur_drv = get_cur_drv(fdctrl);
1985	fd_recalibrate(cur_drv);
1986	fdctrl_reset_fifo(fdctrl);
1987	st0 = FD_SR0_SEEK \| GET_CUR_DRV(fdctrl);
1988	/* No drive means no TRK0 signal. */
1989	if (cur_drv->drive == FDRIVE_DRV_NONE)
1990	st0 \|= FD_SR0_ABNTERM \| FD_SR0_EQPMT;
1991	/* Raise Interrupt */
1992	fdctrl_raise_irq(fdctrl, st0);
1993	}
1994
1995	static void fdctrl_handle_sense_interrupt_status(fdctrl_t *fdctrl, int direction)
1996	{
1997	RT_NOREF(direction);
1998	fdrive_t *cur_drv = get_cur_drv(fdctrl);
1999
2000	FLOPPY_DPRINTF("CMD:%02x\n", fdctrl->fifo[0]);
2001	if(fdctrl->reset_sensei > 0) {
2002	fdctrl->fifo[0] =
2003	FD_SR0_RDYCHG + FD_RESET_SENSEI_COUNT - fdctrl->reset_sensei;
2004	fdctrl->reset_sensei--;
2005	} else {
2006	/* XXX: status0 handling is broken for read/write
2007	commands, so we do this hack. It should be suppressed
2008	ASAP */
2009	fdctrl->fifo[0] =
2010	FD_SR0_SEEK \| (cur_drv->head << 2) \| GET_CUR_DRV(fdctrl);
2011	/* Hack to preserve SR0 on equipment check failures (no drive). */
2012	if (fdctrl->status0 & FD_SR0_EQPMT)
2013	fdctrl->fifo[0] = fdctrl->status0;
2014	}
2015
2016	fdctrl->fifo[1] = cur_drv->track;
2017	fdctrl_set_fifo(fdctrl, 2, 0);
2018	FLOPPY_DPRINTF("ST0:%02x PCN:%02x\n", fdctrl->fifo[0], fdctrl->fifo[1]);
2019	fdctrl->status0 = FD_SR0_RDYCHG;
2020	}
2021
2022	static void fdctrl_handle_seek(fdctrl_t *fdctrl, int direction)
2023	{
2024	RT_NOREF(direction);
2025	fdrive_t *cur_drv;
2026
2027	FLOPPY_DPRINTF("CMD:%02x SEL:%02x NCN:%02x\n", fdctrl->fifo[0],
2028	fdctrl->fifo[1], fdctrl->fifo[2]);
2029
2030	SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2031	cur_drv = get_cur_drv(fdctrl);
2032	fdctrl_reset_fifo(fdctrl);
2033
2034	/* The seek command just sends step pulses to the drive and doesn't care if
2035	* there's a medium inserted or if it's banging the head against the drive.
2036	*/
2037	cur_drv->track = fdctrl->fifo[2];
2038	cur_drv->ltrk = cur_drv->track;
2039	cur_drv->head = (fdctrl->fifo[1] >> 2) & 1;
2040	/* Raise Interrupt */
2041	fdctrl_raise_irq(fdctrl, FD_SR0_SEEK \| GET_CUR_DRV(fdctrl));
2042	}
2043
2044	static void fdctrl_handle_perpendicular_mode(fdctrl_t *fdctrl, int direction)
2045	{
2046	RT_NOREF(direction);
2047	fdrive_t *cur_drv = get_cur_drv(fdctrl);
2048
2049	if (fdctrl->fifo[1] & 0x80)
2050	cur_drv->perpendicular = fdctrl->fifo[1] & 0x7;
2051	/* No result back */
2052	fdctrl_reset_fifo(fdctrl);
2053	}
2054
2055	static void fdctrl_handle_configure(fdctrl_t *fdctrl, int direction)
2056	{
2057	RT_NOREF(direction);
2058	fdctrl->config = fdctrl->fifo[2];
2059	fdctrl->precomp_trk = fdctrl->fifo[3];
2060	/* No result back */
2061	fdctrl_reset_fifo(fdctrl);
2062	}
2063
2064	static void fdctrl_handle_powerdown_mode(fdctrl_t *fdctrl, int direction)
2065	{
2066	RT_NOREF(direction);
2067	fdctrl->pwrd = fdctrl->fifo[1];
2068	fdctrl->fifo[0] = fdctrl->fifo[1];
2069	fdctrl_set_fifo(fdctrl, 1, 0);
2070	}
2071
2072	static void fdctrl_handle_option(fdctrl_t *fdctrl, int direction)
2073	{
2074	RT_NOREF(direction);
2075	/* No result back */
2076	fdctrl_reset_fifo(fdctrl);
2077	}
2078
2079	static void fdctrl_handle_drive_specification_command(fdctrl_t *fdctrl, int direction)
2080	{
2081	RT_NOREF(direction);
2082	/* fdrive_t cur_drv = get_cur_drv(fdctrl); - unused /
2083
2084	/* This command takes a variable number of parameters. It can be terminated
2085	* at any time if the high bit of a parameter is set. Once there are 6 bytes
2086	* in the FIFO (command + 5 parameter bytes), data_len/data_pos will be 7.
2087	*/
2088	if (fdctrl->data_len == 7 \|\| (fdctrl->fifo[fdctrl->data_pos - 1] & 0x80)) {
2089
2090	/* Command parameters done */
2091	if (fdctrl->fifo[fdctrl->data_pos - 1] & 0x40) {
2092	/* Data is echoed, but not stored! */
2093	fdctrl->fifo[0] = fdctrl->data_len > 2 ? fdctrl->fifo[1] : 0;
2094	fdctrl->fifo[1] = fdctrl->data_len > 3 ? fdctrl->fifo[2] : 0;
2095	fdctrl->fifo[2] = 0;
2096	fdctrl->fifo[3] = 0;
2097	fdctrl_set_fifo(fdctrl, 4, 0);
2098	} else {
2099	fdctrl_reset_fifo(fdctrl);
2100	}
2101	} else
2102	fdctrl->data_len++; /* Wait for another byte. */
2103	}
2104
2105	static void fdctrl_handle_relative_seek_out(fdctrl_t *fdctrl, int direction)
2106	{
2107	RT_NOREF(direction);
2108	fdrive_t *cur_drv;
2109
2110	SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2111	cur_drv = get_cur_drv(fdctrl);
2112	if (fdctrl->fifo[2] + cur_drv->track >= cur_drv->max_track) {
2113	cur_drv->track = cur_drv->max_track - 1;
2114	} else {
2115	cur_drv->track += fdctrl->fifo[2];
2116	}
2117	fdctrl_reset_fifo(fdctrl);
2118	/* Raise Interrupt */
2119	fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
2120	}
2121
2122	static void fdctrl_handle_relative_seek_in(fdctrl_t *fdctrl, int direction)
2123	{
2124	RT_NOREF(direction);
2125	fdrive_t *cur_drv;
2126
2127	SET_CUR_DRV(fdctrl, fdctrl->fifo[1] & FD_DOR_SELMASK);
2128	cur_drv = get_cur_drv(fdctrl);
2129	if (fdctrl->fifo[2] > cur_drv->track) {
2130	cur_drv->track = 0;
2131	} else {
2132	cur_drv->track -= fdctrl->fifo[2];
2133	}
2134	fdctrl_reset_fifo(fdctrl);
2135	/* Raise Interrupt */
2136	fdctrl_raise_irq(fdctrl, FD_SR0_SEEK);
2137	}
2138
2139	static const struct {
2140	uint8_t value;
2141	uint8_t mask;
2142	const char* name;
2143	int parameters;
2144	void (handler)(fdctrl_t fdctrl, int direction);
2145	int direction;
2146	} handlers[] = {
2147	{ FD_CMD_READ, 0x1f, "READ", 8, fdctrl_start_transfer, FD_DIR_READ },
2148	{ FD_CMD_WRITE, 0x3f, "WRITE", 8, fdctrl_start_transfer, FD_DIR_WRITE },
2149	{ FD_CMD_SEEK, 0xff, "SEEK", 2, fdctrl_handle_seek },
2150	{ FD_CMD_SENSE_INTERRUPT_STATUS, 0xff, "SENSE INTERRUPT STATUS", 0, fdctrl_handle_sense_interrupt_status },
2151	{ FD_CMD_RECALIBRATE, 0xff, "RECALIBRATE", 1, fdctrl_handle_recalibrate },
2152	{ FD_CMD_FORMAT_TRACK, 0xbf, "FORMAT TRACK", 5, fdctrl_handle_format_track },
2153	{ FD_CMD_READ_TRACK, 0x9f, "READ TRACK", 8, fdctrl_start_transfer, FD_DIR_READ },
2154	{ FD_CMD_RESTORE, 0xff, "RESTORE", 17, fdctrl_handle_restore }, /* part of READ DELETED DATA */
2155	{ FD_CMD_SAVE, 0xff, "SAVE", 0, fdctrl_handle_save }, /* part of READ DELETED DATA */
2156	{ FD_CMD_READ_DELETED, 0x1f, "READ DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_READ },
2157	{ FD_CMD_SCAN_EQUAL, 0x1f, "SCAN EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANE },
2158	{ FD_CMD_VERIFY, 0x1f, "VERIFY", 8, fdctrl_unimplemented },
2159	{ FD_CMD_SCAN_LOW_OR_EQUAL, 0x1f, "SCAN LOW OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANL },
2160	{ FD_CMD_SCAN_HIGH_OR_EQUAL, 0x1f, "SCAN HIGH OR EQUAL", 8, fdctrl_start_transfer, FD_DIR_SCANH },
2161	{ FD_CMD_WRITE_DELETED, 0x3f, "WRITE DELETED DATA", 8, fdctrl_start_transfer_del, FD_DIR_WRITE },
2162	{ FD_CMD_READ_ID, 0xbf, "READ ID", 1, fdctrl_handle_readid },
2163	{ FD_CMD_SPECIFY, 0xff, "SPECIFY", 2, fdctrl_handle_specify },
2164	{ FD_CMD_SENSE_DRIVE_STATUS, 0xff, "SENSE DRIVE STATUS", 1, fdctrl_handle_sense_drive_status },
2165	{ FD_CMD_PERPENDICULAR_MODE, 0xff, "PERPENDICULAR MODE", 1, fdctrl_handle_perpendicular_mode },
2166	{ FD_CMD_CONFIGURE, 0xff, "CONFIGURE", 3, fdctrl_handle_configure },
2167	{ FD_CMD_POWERDOWN_MODE, 0xff, "POWERDOWN MODE", 2, fdctrl_handle_powerdown_mode },
2168	{ FD_CMD_OPTION, 0xff, "OPTION", 1, fdctrl_handle_option },
2169	{ FD_CMD_DRIVE_SPECIFICATION_COMMAND, 0xff, "DRIVE SPECIFICATION COMMAND", 1, fdctrl_handle_drive_specification_command },
2170	{ FD_CMD_RELATIVE_SEEK_OUT, 0xff, "RELATIVE SEEK OUT", 2, fdctrl_handle_relative_seek_out },
2171	{ FD_CMD_FORMAT_AND_WRITE, 0xff, "FORMAT AND WRITE", 10, fdctrl_unimplemented },
2172	{ FD_CMD_RELATIVE_SEEK_IN, 0xff, "RELATIVE SEEK IN", 2, fdctrl_handle_relative_seek_in },
2173	{ FD_CMD_LOCK, 0x7f, "LOCK", 0, fdctrl_handle_lock },
2174	{ FD_CMD_DUMPREG, 0xff, "DUMPREG", 0, fdctrl_handle_dumpreg },
2175	{ FD_CMD_VERSION, 0xff, "VERSION", 0, fdctrl_handle_version },
2176	{ FD_CMD_PART_ID, 0xff, "PART ID", 0, fdctrl_handle_partid },
2177	{ FD_CMD_WRITE, 0x1f, "WRITE (BeOS)", 8, fdctrl_start_transfer, FD_DIR_WRITE }, /* not in specification ; BeOS 4.5 bug */
2178	{ 0, 0, "unknown", 0, fdctrl_unimplemented }, /* default handler */
2179	};
2180	/* Associate command to an index in the 'handlers' array */
2181	static uint8_t command_to_handler[256];
2182
2183	static void fdctrl_write_data(fdctrl_t *fdctrl, uint32_t value)
2184	{
2185	fdrive_t *cur_drv;
2186	int pos;
2187
2188	cur_drv = get_cur_drv(fdctrl);
2189	/* Reset mode */
2190	if (!(fdctrl->dor & FD_DOR_nRESET)) {
2191	FLOPPY_DPRINTF("Floppy controller in RESET state !\n");
2192	return;
2193	}
2194	if (!(fdctrl->msr & FD_MSR_RQM) \|\| (fdctrl->msr & FD_MSR_DIO)) {
2195	FLOPPY_ERROR("controller not ready for writing\n");
2196	return;
2197	}
2198	fdctrl->dsr &= ~FD_DSR_PWRDOWN;
2199	/* Is it write command time ? */
2200	if (fdctrl->msr & FD_MSR_NONDMA) {
2201	/* FIFO data write */
2202	pos = fdctrl->data_pos++;
2203	pos %= FD_SECTOR_LEN;
2204	fdctrl->fifo[pos] = value;
2205
2206	if (cur_drv->pDrvMedia == NULL)
2207	{
2208	if (fdctrl->data_dir == FD_DIR_WRITE)
2209	fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM \| FD_SR0_SEEK, 0x00, 0x00);
2210	else
2211	fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, 0x00, 0x00);
2212	} else if (pos == FD_SECTOR_LEN - 1 \|\|
2213	fdctrl->data_pos == fdctrl->data_len) {
2214	blk_write(cur_drv, fd_sector(cur_drv), fdctrl->fifo, 1);
2215	}
2216	/* Switch from transfer mode to status mode
2217	* then from status mode to command mode
2218	*/
2219	if (fdctrl->data_pos == fdctrl->data_len)
2220	fdctrl_stop_transfer(fdctrl, FD_SR0_SEEK, 0x00, 0x00);
2221	return;
2222	}
2223	if (fdctrl->data_pos == 0) {
2224	/* Command */
2225	fdctrl_reset_irq(fdctrl); /* If pending from previous seek/recalibrate. */
2226	pos = command_to_handler[value & 0xff];
2227	FLOPPY_DPRINTF("%s command\n", handlers[pos].name);
2228	fdctrl->data_len = handlers[pos].parameters + 1;
2229	fdctrl->msr \|= FD_MSR_CMDBUSY;
2230	fdctrl->cur_cmd = value & 0xff;
2231	}
2232
2233	FLOPPY_DPRINTF("%s: %02x\n", __FUNCTION__, value);
2234	fdctrl->fifo[fdctrl->data_pos++ % FD_SECTOR_LEN] = value;
2235	if (fdctrl->data_pos == fdctrl->data_len) {
2236	/* We now have all parameters
2237	* and will be able to treat the command
2238	*/
2239	if (fdctrl->data_state & FD_STATE_FORMAT) {
2240	fdctrl_format_sector(fdctrl);
2241	return;
2242	}
2243
2244	pos = command_to_handler[fdctrl->fifo[0] & 0xff];
2245	FLOPPY_DPRINTF("treat %s command\n", handlers[pos].name);
2246	(*handlers[pos].handler)(fdctrl, handlers[pos].direction);
2247	}
2248	}
2249
2250
2251	/* -=-=-=-=-=-=-=-=- Timer Callback -=-=-=-=-=-=-=-=- */
2252
2253	/**
2254	* @callback_method_impl{FNTMTIMERDEV}
2255	*/
2256	static DECLCALLBACK(void) fdcTimerCallback(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, void *pvUser)
2257	{
2258	fdctrl_t fdctrl = PDMDEVINS_2_DATA(pDevIns, fdctrl_t );
2259	fdrive_t *cur_drv = get_cur_drv(fdctrl);
2260	RT_NOREF(hTimer, pvUser);
2261
2262	/* Pretend we are spinning.
2263	* This is needed for Coherent, which uses READ ID to check for
2264	* sector interleaving.
2265	*/
2266	if (cur_drv->last_sect != 0) {
2267	cur_drv->sect = (cur_drv->sect % cur_drv->last_sect) + 1;
2268	}
2269	/* READ_ID can't automatically succeed! */
2270	if (!cur_drv->max_track) {
2271	FLOPPY_DPRINTF("read id when no disk in drive\n");
2272	/// @todo This is wrong! Command should not complete.
2273	fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA \| FD_SR1_ND, FD_SR2_MD);
2274	} else if ((fdctrl->dsr & FD_DSR_DRATEMASK) != cur_drv->media_rate) {
2275	FLOPPY_DPRINTF("read id rate mismatch (fdc=%d, media=%d)\n",
2276	fdctrl->dsr & FD_DSR_DRATEMASK, cur_drv->media_rate);
2277	fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA \| FD_SR1_ND, FD_SR2_MD);
2278	} else if (cur_drv->track >= cur_drv->max_track) {
2279	FLOPPY_DPRINTF("read id past last track (%d >= %d)\n",
2280	cur_drv->track, cur_drv->max_track);
2281	cur_drv->ltrk = 0;
2282	fdctrl_stop_transfer_now(fdctrl, FD_SR0_ABNTERM, FD_SR1_MA \| FD_SR1_ND, FD_SR2_MD);
2283	}
2284	else
2285	fdctrl_stop_transfer_now(fdctrl, 0x00, 0x00, 0x00);
2286	}
2287
2288
2289	/* -=-=-=-=-=-=-=-=- I/O Port Access Handlers -=-=-=-=-=-=-=-=- */
2290
2291	/**
2292	* @callback_method_impl{FNIOMIOPORTNEWOUT, Handling 0x3f0 accesses.}
2293	*/
2294	static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort0Write(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
2295	{
2296	RT_NOREF(pvUser);
2297
2298	if (cb == 1)
2299	fdctrl_write(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), offPort, u32);
2300	else
2301	ASSERT_GUEST_MSG_FAILED(("offPort=%#x cb=%d u32=%#x\n", offPort, cb, u32));
2302	return VINF_SUCCESS;
2303	}
2304
2305
2306	/**
2307	* @callback_method_impl{FNIOMIOPORTNEWIN, Handling 0x3f0 accesses.}
2308	*/
2309	static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort0Read(PPDMDEVINS pDevIns, void pvUser, RTIOPORT offPort, uint32_t pu32, unsigned cb)
2310	{
2311	RT_NOREF(pvUser);
2312
2313	if (cb == 1)
2314	{
2315	pu32 = fdctrl_read(PDMDEVINS_2_DATA(pDevIns, fdctrl_t ), offPort);
2316	return VINF_SUCCESS;
2317	}
2318	return VERR_IOM_IOPORT_UNUSED;
2319	}
2320
2321
2322	/**
2323	* @callback_method_impl{FNIOMIOPORTNEWOUT, Handling 0x3f1..0x3f5 accesses.}
2324	*/
2325	static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort1Write(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
2326	{
2327	RT_NOREF(pvUser);
2328
2329	if (cb == 1)
2330	fdctrl_write(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), offPort + 1, u32);
2331	else
2332	ASSERT_GUEST_MSG_FAILED(("offPort=%#x cb=%d u32=%#x\n", offPort, cb, u32));
2333	return VINF_SUCCESS;
2334	}
2335
2336
2337	/**
2338	* @callback_method_impl{FNTMTIMERDEV}
2339	*/
2340	static DECLCALLBACK(void) fdcTransferDelayTimer(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, void *pvUser)
2341	{
2342	fdctrl_t fdctrl = PDMDEVINS_2_DATA(pDevIns, fdctrl_t );
2343	RT_NOREF(pvUser, hTimer);
2344	fdctrl_stop_transfer_now(fdctrl, fdctrl->st0, fdctrl->st1, fdctrl->st2);
2345	}
2346
2347
2348	/**
2349	* @callback_method_impl{FNTMTIMERDEV}
2350	*/
2351	static DECLCALLBACK(void) fdcIrqDelayTimer(PPDMDEVINS pDevIns, TMTIMERHANDLE hTimer, void *pvUser)
2352	{
2353	fdctrl_t fdctrl = PDMDEVINS_2_DATA(pDevIns, fdctrl_t );
2354	RT_NOREF(pvUser, hTimer);
2355	fdctrl_raise_irq_now(fdctrl, fdctrl->st0);
2356	}
2357
2358
2359
2360	/* -=-=-=-=-=-=-=-=- I/O Port Access Handlers -=-=-=-=-=-=-=-=- */
2361	/**
2362	* @callback_method_impl{FNIOMIOPORTNEWIN, Handling 0x3f1..0x3f5 accesses.}
2363	*/
2364	static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort1Read(PPDMDEVINS pDevIns, void pvUser, RTIOPORT offPort, uint32_t pu32, unsigned cb)
2365	{
2366	RT_NOREF(pvUser);
2367
2368	if (cb == 1)
2369	{
2370	pu32 = fdctrl_read(PDMDEVINS_2_DATA(pDevIns, fdctrl_t ), offPort + 1);
2371	return VINF_SUCCESS;
2372	}
2373	return VERR_IOM_IOPORT_UNUSED;
2374	}
2375
2376
2377	/**
2378	* @callback_method_impl{FNIOMIOPORTNEWOUT, Handling 0x3f7 access.}
2379	*/
2380	static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort2Write(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb)
2381	{
2382	RT_NOREF(offPort, pvUser);
2383	Assert(offPort == 0);
2384
2385	if (cb == 1)
2386	fdctrl_write(PDMDEVINS_2_DATA(pDevIns, fdctrl_t *), 7, u32);
2387	else
2388	ASSERT_GUEST_MSG_FAILED(("offPort=%#x cb=%d u32=%#x\n", offPort, cb, u32));
2389	return VINF_SUCCESS;
2390	}
2391
2392
2393	/**
2394	* @callback_method_impl{FNIOMIOPORTNEWIN, Handling 0x3f7 access.}
2395	*/
2396	static DECLCALLBACK(VBOXSTRICTRC) fdcIoPort2Read(PPDMDEVINS pDevIns, void pvUser, RTIOPORT offPort, uint32_t pu32, unsigned cb)
2397	{
2398	RT_NOREF(pvUser, offPort);
2399	Assert(offPort == 0);
2400
2401	if (cb == 1)
2402	{
2403	pu32 = fdctrl_read(PDMDEVINS_2_DATA(pDevIns, fdctrl_t ), 7);
2404	return VINF_SUCCESS;
2405	}
2406	return VERR_IOM_IOPORT_UNUSED;
2407	}
2408
2409
2410	/* -=-=-=-=-=-=-=-=- Debugger callback -=-=-=-=-=-=-=-=- */
2411
2412	/**
2413	* FDC debugger info callback.
2414	*
2415	* @param pDevIns The device instance.
2416	* @param pHlp The output helpers.
2417	* @param pszArgs The arguments.
2418	*/
2419	static DECLCALLBACK(void) fdcInfo(PPDMDEVINS pDevIns, PCDBGFINFOHLP pHlp, const char *pszArgs)
2420	{
2421	fdctrl_t pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t );
2422	unsigned i;
2423	bool fVerbose = false;
2424
2425	/* Parse arguments. */
2426	if (pszArgs)
2427	fVerbose = strstr(pszArgs, "verbose") != NULL;
2428
2429	/* Show basic information. */
2430	pHlp->pfnPrintf(pHlp, "%s#%d: ",
2431	pDevIns->pReg->szName,
2432	pDevIns->iInstance);
2433	pHlp->pfnPrintf(pHlp, "I/O=%X IRQ=%u DMA=%u ",
2434	pThis->io_base,
2435	pThis->irq_lvl,
2436	pThis->dma_chann);
2437	pHlp->pfnPrintf(pHlp, "RC=%RTbool R0=%RTbool\n", pDevIns->fRCEnabled, pDevIns->fR0Enabled);
2438
2439	/* Print register contents. */
2440	pHlp->pfnPrintf(pHlp, "Registers: MSR=%02X DSR=%02X DOR=%02X\n",
2441	pThis->msr, pThis->dsr, pThis->dor);
2442	pHlp->pfnPrintf(pHlp, " DIR=%02X\n",
2443	fdctrl_read_dir(pThis));
2444
2445	/* Print the current command, if any. */
2446	if (pThis->cur_cmd)
2447	pHlp->pfnPrintf(pHlp, "Curr cmd: %02X (%s)\n",
2448	pThis->cur_cmd,
2449	handlers[command_to_handler[pThis->cur_cmd]].name);
2450	if (pThis->prev_cmd)
2451	pHlp->pfnPrintf(pHlp, "Prev cmd: %02X (%s)\n",
2452	pThis->prev_cmd,
2453	handlers[command_to_handler[pThis->prev_cmd]].name);
2454
2455
2456	for (i = 0; i < pThis->num_floppies; ++i)
2457	{
2458	fdrive_t *drv = &pThis->drives[i];
2459	pHlp->pfnPrintf(pHlp, " Drive %u state:\n", i);
2460	pHlp->pfnPrintf(pHlp, " Medium : %u tracks, %u sectors\n",
2461	drv->max_track,
2462	drv->last_sect);
2463	pHlp->pfnPrintf(pHlp, " Current: track %u, head %u, sector %u\n",
2464	drv->track,
2465	drv->head,
2466	drv->sect);
2467	}
2468	}
2469
2470
2471	/* -=-=-=-=-=-=-=-=- Saved state -=-=-=-=-=-=-=-=- */
2472
2473	/**
2474	* @callback_method_impl{FNSSMDEVSAVEEXEC}
2475	*/
2476	static DECLCALLBACK(int) fdcSaveExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM)
2477	{
2478	fdctrl_t pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t );
2479	PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
2480	unsigned int i;
2481	int rc;
2482
2483	/* Save the FDC I/O registers... */
2484	pHlp->pfnSSMPutU8(pSSM, pThis->sra);
2485	pHlp->pfnSSMPutU8(pSSM, pThis->srb);
2486	pHlp->pfnSSMPutU8(pSSM, pThis->dor);
2487	pHlp->pfnSSMPutU8(pSSM, pThis->tdr);
2488	pHlp->pfnSSMPutU8(pSSM, pThis->dsr);
2489	pHlp->pfnSSMPutU8(pSSM, pThis->msr);
2490	/* ...the status registers... */
2491	pHlp->pfnSSMPutU8(pSSM, pThis->status0);
2492	pHlp->pfnSSMPutU8(pSSM, pThis->status1);
2493	pHlp->pfnSSMPutU8(pSSM, pThis->status2);
2494	/* ...the command FIFO... */
2495	pHlp->pfnSSMPutU32(pSSM, sizeof(pThis->fifo));
2496	pHlp->pfnSSMPutMem(pSSM, &pThis->fifo, sizeof(pThis->fifo));
2497	pHlp->pfnSSMPutU32(pSSM, pThis->data_pos);
2498	pHlp->pfnSSMPutU32(pSSM, pThis->data_len);
2499	pHlp->pfnSSMPutU8(pSSM, pThis->data_state);
2500	pHlp->pfnSSMPutU8(pSSM, pThis->data_dir);
2501	/* ...and miscellaneous internal FDC state. */
2502	pHlp->pfnSSMPutU8(pSSM, pThis->reset_sensei);
2503	pHlp->pfnSSMPutU8(pSSM, pThis->eot);
2504	pHlp->pfnSSMPutU8(pSSM, pThis->timer0);
2505	pHlp->pfnSSMPutU8(pSSM, pThis->timer1);
2506	pHlp->pfnSSMPutU8(pSSM, pThis->precomp_trk);
2507	pHlp->pfnSSMPutU8(pSSM, pThis->config);
2508	pHlp->pfnSSMPutU8(pSSM, pThis->lock);
2509	pHlp->pfnSSMPutU8(pSSM, pThis->pwrd);
2510	pHlp->pfnSSMPutU8(pSSM, pThis->version);
2511
2512	/* Save the number of drives and per-drive state. Note that the media
2513	* states will be updated in fd_revalidate() and need not be saved.
2514	*/
2515	pHlp->pfnSSMPutU8(pSSM, pThis->num_floppies);
2516	Assert(RT_ELEMENTS(pThis->drives) == pThis->num_floppies);
2517	for (i = 0; i < pThis->num_floppies; ++i)
2518	{
2519	fdrive_t *d = &pThis->drives[i];
2520
2521	pHlp->pfnSSMPutMem(pSSM, &d->Led, sizeof(d->Led));
2522	pHlp->pfnSSMPutU32(pSSM, d->drive);
2523	pHlp->pfnSSMPutU8(pSSM, d->dsk_chg);
2524	pHlp->pfnSSMPutU8(pSSM, d->perpendicular);
2525	pHlp->pfnSSMPutU8(pSSM, d->head);
2526	pHlp->pfnSSMPutU8(pSSM, d->track);
2527	pHlp->pfnSSMPutU8(pSSM, d->sect);
2528	}
2529	rc = pHlp->pfnTimerSave(pDevIns, pThis->hXferDelayTimer, pSSM);
2530	AssertRCReturn(rc, rc);
2531	rc = pHlp->pfnTimerSave(pDevIns, pThis->hIrqDelayTimer, pSSM);
2532	AssertRCReturn(rc, rc);
2533	return pHlp->pfnTimerSave(pDevIns, pThis->hResultTimer, pSSM);
2534	}
2535
2536
2537	/**
2538	* @callback_method_impl{FNSSMDEVLOADEXEC}
2539	*/
2540	static DECLCALLBACK(int) fdcLoadExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t uVersion, uint32_t uPass)
2541	{
2542	fdctrl_t pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t );
2543	PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
2544	unsigned int i;
2545	uint32_t val32;
2546	uint8_t val8;
2547	int rc;
2548
2549	if (uVersion > FDC_SAVESTATE_CURRENT)
2550	return VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION;
2551	Assert(uPass == SSM_PASS_FINAL); NOREF(uPass);
2552
2553	if (uVersion > FDC_SAVESTATE_OLD)
2554	{
2555	/* Load the FDC I/O registers... */
2556	pHlp->pfnSSMGetU8(pSSM, &pThis->sra);
2557	pHlp->pfnSSMGetU8(pSSM, &pThis->srb);
2558	pHlp->pfnSSMGetU8(pSSM, &pThis->dor);
2559	pHlp->pfnSSMGetU8(pSSM, &pThis->tdr);
2560	pHlp->pfnSSMGetU8(pSSM, &pThis->dsr);
2561	pHlp->pfnSSMGetU8(pSSM, &pThis->msr);
2562	/* ...the status registers... */
2563	pHlp->pfnSSMGetU8(pSSM, &pThis->status0);
2564	pHlp->pfnSSMGetU8(pSSM, &pThis->status1);
2565	pHlp->pfnSSMGetU8(pSSM, &pThis->status2);
2566	/* ...the command FIFO, if the size matches... */
2567	rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2568	AssertRCReturn(rc, rc);
2569	AssertMsgReturn(sizeof(pThis->fifo) == val32,
2570	("The size of FIFO in saved state doesn't match!\n"),
2571	VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2572	pHlp->pfnSSMGetMem(pSSM, &pThis->fifo, sizeof(pThis->fifo));
2573	pHlp->pfnSSMGetU32(pSSM, &pThis->data_pos);
2574	pHlp->pfnSSMGetU32(pSSM, &pThis->data_len);
2575	pHlp->pfnSSMGetU8(pSSM, &pThis->data_state);
2576	pHlp->pfnSSMGetU8(pSSM, &pThis->data_dir);
2577	/* ...and miscellaneous internal FDC state. */
2578	pHlp->pfnSSMGetU8(pSSM, &pThis->reset_sensei);
2579	pHlp->pfnSSMGetU8(pSSM, &pThis->eot);
2580	pHlp->pfnSSMGetU8(pSSM, &pThis->timer0);
2581	pHlp->pfnSSMGetU8(pSSM, &pThis->timer1);
2582	pHlp->pfnSSMGetU8(pSSM, &pThis->precomp_trk);
2583	pHlp->pfnSSMGetU8(pSSM, &pThis->config);
2584	pHlp->pfnSSMGetU8(pSSM, &pThis->lock);
2585	pHlp->pfnSSMGetU8(pSSM, &pThis->pwrd);
2586	pHlp->pfnSSMGetU8(pSSM, &pThis->version);
2587
2588	/* Validate the number of drives. */
2589	rc = pHlp->pfnSSMGetU8(pSSM, &pThis->num_floppies);
2590	AssertRCReturn(rc, rc);
2591	AssertMsgReturn(RT_ELEMENTS(pThis->drives) == pThis->num_floppies,
2592	("The number of drives in saved state doesn't match!\n"),
2593	VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2594
2595	/* Load the per-drive state. */
2596	for (i = 0; i < pThis->num_floppies; ++i)
2597	{
2598	fdrive_t *d = &pThis->drives[i];
2599
2600	pHlp->pfnSSMGetMem(pSSM, &d->Led, sizeof(d->Led));
2601	rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2602	AssertRCReturn(rc, rc);
2603	d->drive = (fdrive_type_t)val32;
2604	pHlp->pfnSSMGetU8(pSSM, &d->dsk_chg);
2605	pHlp->pfnSSMGetU8(pSSM, &d->perpendicular);
2606	pHlp->pfnSSMGetU8(pSSM, &d->head);
2607	pHlp->pfnSSMGetU8(pSSM, &d->track);
2608	pHlp->pfnSSMGetU8(pSSM, &d->sect);
2609	}
2610
2611	if (uVersion > FDC_SAVESTATE_PRE_DELAY)
2612	{
2613	pHlp->pfnTimerLoad(pDevIns, pThis->hXferDelayTimer, pSSM);
2614	pHlp->pfnTimerLoad(pDevIns, pThis->hIrqDelayTimer, pSSM);
2615	}
2616	}
2617	else if (uVersion == FDC_SAVESTATE_OLD)
2618	{
2619	/* The old saved state was significantly different. However, we can get
2620	* back most of the controller state and fix the rest by pretending the
2621	* disk in the drive (if any) has been replaced. At any rate there should
2622	* be no difficulty unless the state was saved during a floppy operation.
2623	*/
2624
2625	/* First verify a few assumptions. */
2626	AssertMsgReturn(sizeof(pThis->fifo) == FD_SECTOR_LEN,
2627	("The size of FIFO in saved state doesn't match!\n"),
2628	VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2629	AssertMsgReturn(RT_ELEMENTS(pThis->drives) == 2,
2630	("The number of drives in old saved state doesn't match!\n"),
2631	VERR_SSM_DATA_UNIT_FORMAT_CHANGED);
2632	/* Now load the old state. */
2633	pHlp->pfnSSMGetU8(pSSM, &pThis->version);
2634	/* Toss IRQ level, DMA channel, I/O base, and state. */
2635	pHlp->pfnSSMGetU8(pSSM, &val8);
2636	pHlp->pfnSSMGetU8(pSSM, &val8);
2637	pHlp->pfnSSMGetU32(pSSM, &val32);
2638	pHlp->pfnSSMGetU8(pSSM, &val8);
2639	/* Translate dma_en. */
2640	rc = pHlp->pfnSSMGetU8(pSSM, &val8);
2641	AssertRCReturn(rc, rc);
2642	if (val8)
2643	pThis->dor \|= FD_DOR_DMAEN;
2644	pHlp->pfnSSMGetU8(pSSM, &pThis->cur_drv);
2645	/* Translate bootsel. */
2646	rc = pHlp->pfnSSMGetU8(pSSM, &val8);
2647	AssertRCReturn(rc, rc);
2648	pThis->tdr \|= val8 << 2;
2649	pHlp->pfnSSMGetMem(pSSM, &pThis->fifo, FD_SECTOR_LEN);
2650	pHlp->pfnSSMGetU32(pSSM, &pThis->data_pos);
2651	pHlp->pfnSSMGetU32(pSSM, &pThis->data_len);
2652	pHlp->pfnSSMGetU8(pSSM, &pThis->data_state);
2653	pHlp->pfnSSMGetU8(pSSM, &pThis->data_dir);
2654	pHlp->pfnSSMGetU8(pSSM, &pThis->status0);
2655	pHlp->pfnSSMGetU8(pSSM, &pThis->eot);
2656	pHlp->pfnSSMGetU8(pSSM, &pThis->timer0);
2657	pHlp->pfnSSMGetU8(pSSM, &pThis->timer1);
2658	pHlp->pfnSSMGetU8(pSSM, &pThis->precomp_trk);
2659	pHlp->pfnSSMGetU8(pSSM, &pThis->config);
2660	pHlp->pfnSSMGetU8(pSSM, &pThis->lock);
2661	pHlp->pfnSSMGetU8(pSSM, &pThis->pwrd);
2662
2663	for (i = 0; i < 2; ++i)
2664	{
2665	fdrive_t *d = &pThis->drives[i];
2666
2667	pHlp->pfnSSMGetMem(pSSM, &d->Led, sizeof (d->Led));
2668	rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2669	d->drive = (fdrive_type_t)val32;
2670	AssertRCReturn(rc, rc);
2671	pHlp->pfnSSMGetU32(pSSM, &val32); /* Toss drflags */
2672	pHlp->pfnSSMGetU8(pSSM, &d->perpendicular);
2673	pHlp->pfnSSMGetU8(pSSM, &d->head);
2674	pHlp->pfnSSMGetU8(pSSM, &d->track);
2675	pHlp->pfnSSMGetU8(pSSM, &d->sect);
2676	pHlp->pfnSSMGetU8(pSSM, &val8); /* Toss dir, rw */
2677	pHlp->pfnSSMGetU8(pSSM, &val8);
2678	rc = pHlp->pfnSSMGetU32(pSSM, &val32);
2679	AssertRCReturn(rc, rc);
2680	d->flags = (fdrive_flags_t)val32;
2681	pHlp->pfnSSMGetU8(pSSM, &d->last_sect);
2682	pHlp->pfnSSMGetU8(pSSM, &d->max_track);
2683	pHlp->pfnSSMGetU16(pSSM, &d->bps);
2684	pHlp->pfnSSMGetU8(pSSM, &d->ro);
2685	}
2686	}
2687	else
2688	AssertFailedReturn(VERR_SSM_UNSUPPORTED_DATA_UNIT_VERSION);
2689	return pHlp->pfnTimerLoad(pDevIns, pThis->hResultTimer, pSSM);
2690	}
2691
2692
2693	/* -=-=-=-=-=-=-=-=- Drive level interfaces -=-=-=-=-=-=-=-=- */
2694
2695	/**
2696	* @interface_method_impl{PDMIMOUNTNOTIFY,pfnMountNotify}
2697	*/
2698	static DECLCALLBACK(void) fdMountNotify(PPDMIMOUNTNOTIFY pInterface)
2699	{
2700	fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IMountNotify);
2701	LogFlow(("fdMountNotify:\n"));
2702	fd_revalidate(pDrv);
2703	}
2704
2705
2706	/**
2707	* @interface_method_impl{PDMIMOUNTNOTIFY,pfnUnmountNotify}
2708	*/
2709	static DECLCALLBACK(void) fdUnmountNotify(PPDMIMOUNTNOTIFY pInterface)
2710	{
2711	fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IMountNotify);
2712	LogFlow(("fdUnmountNotify:\n"));
2713	fd_revalidate(pDrv);
2714	}
2715
2716
2717	/**
2718	* @interface_method_impl{PDMIBASE,pfnQueryInterface}
2719	*/
2720	static DECLCALLBACK(void ) fdQueryInterface (PPDMIBASE pInterface, const char pszIID)
2721	{
2722	fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IBase);
2723
2724	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pDrv->IBase);
2725	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMEDIAPORT, &pDrv->IPort);
2726	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIMOUNTNOTIFY, &pDrv->IMountNotify);
2727	return NULL;
2728	}
2729
2730
2731	/**
2732	* @interface_method_impl{PDMIMEDIAPORT,pfnQueryDeviceLocation}
2733	*/
2734	static DECLCALLBACK(int) fdQueryDeviceLocation(PPDMIMEDIAPORT pInterface, const char **ppcszController,
2735	uint32_t piInstance, uint32_t piLUN)
2736	{
2737	fdrive_t *pDrv = RT_FROM_MEMBER(pInterface, fdrive_t, IPort);
2738	PPDMDEVINS pDevIns = pDrv->pDevIns;
2739
2740	AssertPtrReturn(ppcszController, VERR_INVALID_POINTER);
2741	AssertPtrReturn(piInstance, VERR_INVALID_POINTER);
2742	AssertPtrReturn(piLUN, VERR_INVALID_POINTER);
2743
2744	*ppcszController = pDevIns->pReg->szName;
2745	*piInstance = pDevIns->iInstance;
2746	*piLUN = pDrv->iLUN;
2747
2748	return VINF_SUCCESS;
2749	}
2750
2751	/* -=-=-=-=-=-=-=-=- Controller level interfaces -=-=-=-=-=-=-=-=- */
2752
2753	/**
2754	* @interface_method_impl{PDMILEDPORTS,pfnQueryStatusLed}
2755	*/
2756	static DECLCALLBACK(int) fdcStatusQueryStatusLed(PPDMILEDPORTS pInterface, unsigned iLUN, PPDMLED *ppLed)
2757	{
2758	fdctrl_t *pThis = RT_FROM_MEMBER (pInterface, fdctrl_t, ILeds);
2759	if (iLUN < RT_ELEMENTS(pThis->drives)) {
2760	*ppLed = &pThis->drives[iLUN].Led;
2761	Assert ((*ppLed)->u32Magic == PDMLED_MAGIC);
2762	return VINF_SUCCESS;
2763	}
2764	return VERR_PDM_LUN_NOT_FOUND;
2765	}
2766
2767
2768	/**
2769	* @interface_method_impl{PDMIBASE,pfnQueryInterface}
2770	*/
2771	static DECLCALLBACK(void ) fdcStatusQueryInterface(PPDMIBASE pInterface, const char pszIID)
2772	{
2773	fdctrl_t *pThis = RT_FROM_MEMBER (pInterface, fdctrl_t, IBaseStatus);
2774
2775	PDMIBASE_RETURN_INTERFACE(pszIID, PDMIBASE, &pThis->IBaseStatus);
2776	PDMIBASE_RETURN_INTERFACE(pszIID, PDMILEDPORTS, &pThis->ILeds);
2777	return NULL;
2778	}
2779
2780
2781	/**
2782	* Configure a drive.
2783	*
2784	* @returns VBox status code.
2785	* @param drv The drive in question.
2786	* @param pDevIns The driver instance.
2787	* @param fInit Set if we're at init time and can change the drive type.
2788	*/
2789	static int fdConfig(fdrive_t *drv, PPDMDEVINS pDevIns, bool fInit)
2790	{
2791	static const char * const s_apszDesc[] = {"Floppy Drive A:", "Floppy Drive B"};
2792	int rc;
2793
2794	/*
2795	* Reset the LED just to be on the safe side.
2796	*/
2797	Assert (RT_ELEMENTS(s_apszDesc) > drv->iLUN);
2798	Assert (drv->Led.u32Magic == PDMLED_MAGIC);
2799	drv->Led.Actual.u32 = 0;
2800	drv->Led.Asserted.u32 = 0;
2801
2802	/*
2803	* Try attach the block device and get the interfaces.
2804	*/
2805	rc = PDMDevHlpDriverAttach (pDevIns, drv->iLUN, &drv->IBase, &drv->pDrvBase, s_apszDesc[drv->iLUN]);
2806	if (RT_SUCCESS (rc)) {
2807	drv->pDrvMedia = PDMIBASE_QUERY_INTERFACE(drv->pDrvBase, PDMIMEDIA);
2808	if (drv->pDrvMedia) {
2809	drv->pDrvMount = PDMIBASE_QUERY_INTERFACE(drv->pDrvBase, PDMIMOUNT);
2810	if (drv->pDrvMount) {
2811	fd_init(drv, fInit);
2812	} else {
2813	AssertMsgFailed (("Configuration error: LUN#%d without mountable interface!\n", drv->iLUN));
2814	rc = VERR_PDM_MISSING_INTERFACE;
2815	}
2816
2817	} else {
2818	AssertMsgFailed (("Configuration error: LUN#%d hasn't a block interface!\n", drv->iLUN));
2819	rc = VERR_PDM_MISSING_INTERFACE;
2820	}
2821	} else {
2822	AssertMsg (rc == VERR_PDM_NO_ATTACHED_DRIVER,
2823	("Failed to attach LUN#%d. rc=%Rrc\n", drv->iLUN, rc));
2824	switch (rc) {
2825	case VERR_ACCESS_DENIED:
2826	/* Error already cached by DrvHostBase */
2827	break;
2828	case VERR_PDM_NO_ATTACHED_DRIVER:
2829	/* Legal on architectures without a floppy controller */
2830	break;
2831	default:
2832	rc = PDMDevHlpVMSetError (pDevIns, rc, RT_SRC_POS,
2833	N_ ("The floppy controller cannot attach to the floppy drive"));
2834	break;
2835	}
2836	}
2837
2838	if (RT_FAILURE (rc)) {
2839	drv->pDrvBase = NULL;
2840	drv->pDrvMedia = NULL;
2841	drv->pDrvMount = NULL;
2842	}
2843	LogFlow (("fdConfig: returns %Rrc\n", rc));
2844	return rc;
2845	}
2846
2847
2848	/**
2849	* @interface_method_impl{PDMDEVREG,pfnAttach}
2850	*
2851	* This is called when we change block driver for a floppy drive.
2852	*/
2853	static DECLCALLBACK(int) fdcAttach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
2854	{
2855	fdctrl_t fdctrl = PDMDEVINS_2_DATA(pDevIns, fdctrl_t );
2856	fdrive_t *drv;
2857	int rc;
2858	LogFlow (("fdcAttach: iLUN=%u\n", iLUN));
2859
2860	AssertMsgReturn(fFlags & PDM_TACH_FLAGS_NOT_HOT_PLUG,
2861	("The FDC device does not support hotplugging\n"),
2862	VERR_INVALID_PARAMETER);
2863
2864	/*
2865	* Validate.
2866	*/
2867	if (iLUN >= 2) {
2868	AssertMsgFailed (("Configuration error: cannot attach or detach any but the first two LUNs - iLUN=%u\n",
2869	iLUN));
2870	return VERR_PDM_DEVINS_NO_ATTACH;
2871	}
2872
2873	/*
2874	* Locate the drive and stuff.
2875	*/
2876	drv = &fdctrl->drives[iLUN];
2877
2878	/* the usual paranoia */
2879	AssertRelease (!drv->pDrvBase);
2880	AssertRelease (!drv->pDrvMedia);
2881	AssertRelease (!drv->pDrvMount);
2882
2883	rc = fdConfig (drv, pDevIns, false /fInit/);
2884	AssertMsg (rc != VERR_PDM_NO_ATTACHED_DRIVER,
2885	("Configuration error: failed to configure drive %d, rc=%Rrc\n", iLUN, rc));
2886	if (RT_SUCCESS(rc)) {
2887	fd_revalidate (drv);
2888	}
2889
2890	LogFlow (("floppyAttach: returns %Rrc\n", rc));
2891	return rc;
2892	}
2893
2894
2895	/**
2896	* @interface_method_impl{PDMDEVREG,pfnDetach}
2897	*
2898	* The floppy drive has been temporarily 'unplugged'.
2899	*/
2900	static DECLCALLBACK(void) fdcDetach(PPDMDEVINS pDevIns, unsigned iLUN, uint32_t fFlags)
2901	{
2902	RT_NOREF(fFlags);
2903	fdctrl_t pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t );
2904	LogFlow (("fdcDetach: iLUN=%u\n", iLUN));
2905
2906	switch (iLUN)
2907	{
2908	case 0:
2909	case 1:
2910	{
2911	fdrive_t *drv = &pThis->drives[iLUN];
2912	drv->pDrvBase = NULL;
2913	drv->pDrvMedia = NULL;
2914	drv->pDrvMount = NULL;
2915	break;
2916	}
2917
2918	default:
2919	AssertMsgFailed(("Cannot detach LUN#%d!\n", iLUN));
2920	break;
2921	}
2922	}
2923
2924
2925	/**
2926	* @interface_method_impl{PDMDEVREG,pfnReset}
2927	*
2928	* I haven't check the specs on what's supposed to happen on reset, but we
2929	* should get any 'FATAL: floppy recal:f07 ctrl not ready' when resetting
2930	* at wrong time like we do if this was all void.
2931	*/
2932	static DECLCALLBACK(void) fdcReset(PPDMDEVINS pDevIns)
2933	{
2934	fdctrl_t pThis = PDMDEVINS_2_DATA (pDevIns, fdctrl_t );
2935	unsigned i;
2936	LogFlow (("fdcReset:\n"));
2937
2938	fdctrl_reset(pThis, 0);
2939
2940	for (i = 0; i < RT_ELEMENTS(pThis->drives); i++)
2941	fd_revalidate(&pThis->drives[i]);
2942	}
2943
2944
2945	/**
2946	* @interface_method_impl{PDMDEVREG,pfnConstruct}
2947	*/
2948	static DECLCALLBACK(int) fdcConstruct(PPDMDEVINS pDevIns, int iInstance, PCFGMNODE pCfg)
2949	{
2950	PDMDEV_CHECK_VERSIONS_RETURN(pDevIns);
2951	fdctrl_t pThis = PDMDEVINS_2_DATA(pDevIns, fdctrl_t );
2952	PCPDMDEVHLPR3 pHlp = pDevIns->pHlpR3;
2953	int rc;
2954
2955	RT_NOREF(iInstance);
2956	Assert(iInstance == 0);
2957
2958	/*
2959	* Validate configuration.
2960	*/
2961	PDMDEV_VALIDATE_CONFIG_RETURN(pDevIns, "IRQ\|DMA\|MemMapped\|IOBase\|StatusA\|IRQDelay", "");
2962
2963	/*
2964	* Read the configuration.
2965	*/
2966	rc = pHlp->pfnCFGMQueryU8Def(pCfg, "IRQ", &pThis->irq_lvl, 6);
2967	AssertMsgRCReturn(rc, ("Configuration error: Failed to read U8 IRQ, rc=%Rrc\n", rc), rc);
2968
2969	rc = pHlp->pfnCFGMQueryU8Def(pCfg, "DMA", &pThis->dma_chann, 2);
2970	AssertMsgRCReturn(rc, ("Configuration error: Failed to read U8 DMA, rc=%Rrc\n", rc), rc);
2971
2972	rc = pHlp->pfnCFGMQueryU16Def(pCfg, "IOBase", &pThis->io_base, 0x3f0);
2973	AssertMsgRCReturn(rc, ("Configuration error: Failed to read U16 IOBase, rc=%Rrc\n", rc), rc);
2974
2975	bool fMemMapped;
2976	rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "MemMapped", &fMemMapped, false);
2977	AssertMsgRCReturn(rc, ("Configuration error: Failed to read bool value MemMapped rc=%Rrc\n", rc), rc);
2978
2979	uint16_t uIrqDelay;
2980	rc = pHlp->pfnCFGMQueryU16Def(pCfg, "IRQDelay", &uIrqDelay, 0);
2981	AssertMsgRCReturn(rc, ("Configuration error: Failed to read U16 IRQDelay, rc=%Rrc\n", rc), rc);
2982
2983	bool fStatusA;
2984	rc = pHlp->pfnCFGMQueryBoolDef(pCfg, "StatusA", &fStatusA, false);
2985	AssertMsgRCReturn(rc, ("Configuration error: Failed to read bool value fStatusA rc=%Rrc\n", rc), rc);
2986
2987	/*
2988	* Initialize data.
2989	*/
2990	LogFlow(("fdcConstruct: irq_lvl=%d dma_chann=%d io_base=%#x\n", pThis->irq_lvl, pThis->dma_chann, pThis->io_base));
2991	pThis->pDevIns = pDevIns;
2992	pThis->version = 0x90; /* Intel 82078 controller */
2993	pThis->config = FD_CONFIG_EIS \| FD_CONFIG_EFIFO; /* Implicit seek, polling & FIFO enabled */
2994	pThis->num_floppies = MAX_FD;
2995	pThis->hIoPorts0 = NIL_IOMMMIOHANDLE;
2996	pThis->hIoPorts1 = NIL_IOMMMIOHANDLE;
2997	pThis->hIoPorts2 = NIL_IOMMMIOHANDLE;
2998
2999	/* Fill 'command_to_handler' lookup table */
3000	for (int ii = RT_ELEMENTS(handlers) - 1; ii >= 0; ii--)
3001	for (unsigned j = 0; j < sizeof(command_to_handler); j++)
3002	if ((j & handlers[ii].mask) == handlers[ii].value)
3003	command_to_handler[j] = ii;
3004
3005	pThis->IBaseStatus.pfnQueryInterface = fdcStatusQueryInterface;
3006	pThis->ILeds.pfnQueryStatusLed = fdcStatusQueryStatusLed;
3007
3008	for (unsigned i = 0; i < RT_ELEMENTS(pThis->drives); ++i)
3009	{
3010	fdrive_t *pDrv = &pThis->drives[i];
3011
3012	pDrv->drive = FDRIVE_DRV_NONE;
3013	pDrv->iLUN = i;
3014	pDrv->pDevIns = pDevIns;
3015
3016	pDrv->IBase.pfnQueryInterface = fdQueryInterface;
3017	pDrv->IMountNotify.pfnMountNotify = fdMountNotify;
3018	pDrv->IMountNotify.pfnUnmountNotify = fdUnmountNotify;
3019	pDrv->IPort.pfnQueryDeviceLocation = fdQueryDeviceLocation;
3020	pDrv->Led.u32Magic = PDMLED_MAGIC;
3021	}
3022
3023	/*
3024	* Create the FDC timer.
3025	*/
3026	rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL, fdcTimerCallback, pThis,
3027	TMTIMER_FLAGS_DEFAULT_CRIT_SECT \| TMTIMER_FLAGS_NO_RING0,
3028	"FDC Timer", &pThis->hResultTimer);
3029	AssertRCReturn(rc, rc);
3030
3031	/*
3032	* Create the transfer delay timer.
3033	*/
3034	rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, fdcTransferDelayTimer, pThis,
3035	TMTIMER_FLAGS_DEFAULT_CRIT_SECT \| TMTIMER_FLAGS_NO_RING0,
3036	"FDC Transfer Delay", &pThis->hXferDelayTimer);
3037	AssertRCReturn(rc, rc);
3038
3039	/*
3040	* Create the IRQ delay timer.
3041	*/
3042	rc = PDMDevHlpTimerCreate(pDevIns, TMCLOCK_VIRTUAL_SYNC, fdcIrqDelayTimer, pThis,
3043	TMTIMER_FLAGS_DEFAULT_CRIT_SECT \| TMTIMER_FLAGS_NO_RING0,
3044	"FDC IRQ Delay", &pThis->hIrqDelayTimer);
3045	AssertRCReturn(rc, rc);
3046
3047	pThis->uIrqDelayMsec = uIrqDelay;
3048
3049	/*
3050	* Register DMA channel.
3051	*/
3052	if (pThis->dma_chann != 0xff)
3053	{
3054	rc = PDMDevHlpDMARegister(pDevIns, pThis->dma_chann, &fdctrl_transfer_handler, pThis);
3055	AssertRCReturn(rc, rc);
3056	}
3057
3058	/*
3059	* IO / MMIO.
3060	*
3061	* We must skip I/O port 0x3f6 as it is the ATA alternate status register.
3062	* Why we skip registering status register A, though, isn't as clear.
3063	*/
3064	if (!fMemMapped)
3065	{
3066	static const IOMIOPORTDESC s_aDescs[] =
3067	{
3068	{ "SRA", NULL, "Status register A", NULL },
3069	{ "SRB", NULL, "Status register B", NULL },
3070	{ "DOR", "DOR", "Digital output register", "Digital output register"},
3071	{ "TDR", "TDR", "Tape driver register", "Tape driver register"},
3072	{ "MSR", "DSR", "Main status register", "Datarate select register" },
3073	{ "FIFO", "FIFO", "Data FIFO", "Data FIFO" },
3074	{ "ATA", "ATA", NULL, NULL },
3075	{ "DIR", "CCR", "Digital input register", "Configuration control register"},
3076	{ NULL, NULL, NULL, NULL }
3077	};
3078
3079	/* 0x3f0 */
3080	if (fStatusA)
3081	{
3082	rc = PDMDevHlpIoPortCreateAndMap(pDevIns, pThis->io_base, 1 /cPorts/, fdcIoPort0Write, fdcIoPort0Read,
3083	"FDC-SRA", s_aDescs, &pThis->hIoPorts0);
3084	AssertRCReturn(rc, rc);
3085	}
3086
3087	/* 0x3f1..0x3f5 */
3088	rc = PDMDevHlpIoPortCreateAndMap(pDevIns, pThis->io_base + 0x1, 5, fdcIoPort1Write, fdcIoPort1Read,
3089	"FDC#1", &s_aDescs[1], &pThis->hIoPorts1);
3090	AssertRCReturn(rc, rc);
3091
3092	/* 0x3f7 */
3093	rc = PDMDevHlpIoPortCreateAndMap(pDevIns, pThis->io_base + 0x7, 1, fdcIoPort2Write, fdcIoPort2Read,
3094	"FDC#2", &s_aDescs[7], &pThis->hIoPorts2);
3095	AssertRCReturn(rc, rc);
3096	}
3097	else
3098	AssertMsgFailedReturn(("Memory mapped floppy not supported\n"), VERR_NOT_SUPPORTED);
3099
3100	/*
3101	* Register the saved state data unit.
3102	*/
3103	rc = PDMDevHlpSSMRegister(pDevIns, FDC_SAVESTATE_CURRENT, sizeof(*pThis), fdcSaveExec, fdcLoadExec);
3104	AssertRCReturn(rc, rc);
3105
3106	/*
3107	* Register the debugger info callback.
3108	*/
3109	PDMDevHlpDBGFInfoRegister(pDevIns, "fdc", "FDC info", fdcInfo);
3110
3111	/*
3112	* Attach the status port (optional).
3113	*/
3114	PPDMIBASE pBase;
3115	rc = PDMDevHlpDriverAttach(pDevIns, PDM_STATUS_LUN, &pThis->IBaseStatus, &pBase, "Status Port");
3116	if (RT_SUCCESS (rc))
3117	pThis->pLedsConnector = PDMIBASE_QUERY_INTERFACE(pBase, PDMILEDCONNECTORS);
3118	else
3119	AssertMsgReturn(rc == VERR_PDM_NO_ATTACHED_DRIVER, ("Failed to attach to status driver. rc=%Rrc\n", rc), rc);
3120
3121	/*
3122	* Initialize drives.
3123	*/
3124	for (unsigned i = 0; i < RT_ELEMENTS(pThis->drives); i++)
3125	{
3126	rc = fdConfig(&pThis->drives[i], pDevIns, true /fInit/);
3127	AssertMsgReturn(RT_SUCCESS(rc) \|\| rc == VERR_PDM_NO_ATTACHED_DRIVER,
3128	("Configuration error: failed to configure drive %d, rc=%Rrc\n", i, rc),
3129	rc);
3130	}
3131
3132	fdctrl_reset(pThis, 0);
3133
3134	for (unsigned i = 0; i < RT_ELEMENTS(pThis->drives); i++)
3135	fd_revalidate(&pThis->drives[i]);
3136
3137	return VINF_SUCCESS;
3138	}
3139
3140
3141	/**
3142	* The device registration structure.
3143	*/
3144	const PDMDEVREG g_DeviceFloppyController =
3145	{
3146	/* .u32Version = */ PDM_DEVREG_VERSION,
3147	/* .uReserved0 = */ 0,
3148	/* .szName = */ "i82078",
3149	/* .fFlags = */ PDM_DEVREG_FLAGS_DEFAULT_BITS \| PDM_DEVREG_FLAGS_NEW_STYLE,
3150	/* .fClass = */ PDM_DEVREG_CLASS_STORAGE,
3151	/* .cMaxInstances = */ 1,
3152	/* .uSharedVersion = */ 42,
3153	/* .cbInstanceShared = */ sizeof(fdctrl_t),
3154	/* .cbInstanceCC = */ 0,
3155	/* .cbInstanceRC = */ 0,
3156	/* .cMaxPciDevices = */ 0,
3157	/* .cMaxMsixVectors = */ 0,
3158	/* .pszDescription = */ "Floppy drive controller (Intel 82078)",
3159	#if defined(IN_RING3)
3160	/* .pszRCMod = */ "",
3161	/* .pszR0Mod = */ "",
3162	/* .pfnConstruct = */ fdcConstruct,
3163	/* .pfnDestruct = */ NULL,
3164	/* .pfnRelocate = */ NULL,
3165	/* .pfnMemSetup = */ NULL,
3166	/* .pfnPowerOn = */ NULL,
3167	/* .pfnReset = */ fdcReset,
3168	/* .pfnSuspend = */ NULL,
3169	/* .pfnResume = */ NULL,
3170	/* .pfnAttach = */ fdcAttach,
3171	/* .pfnDetach = */ fdcDetach,
3172	/* .pfnQueryInterface = */ NULL,
3173	/* .pfnInitComplete = */ NULL,
3174	/* .pfnPowerOff = */ NULL,
3175	/* .pfnSoftReset = */ NULL,
3176	/* .pfnReserved0 = */ NULL,
3177	/* .pfnReserved1 = */ NULL,
3178	/* .pfnReserved2 = */ NULL,
3179	/* .pfnReserved3 = */ NULL,
3180	/* .pfnReserved4 = */ NULL,
3181	/* .pfnReserved5 = */ NULL,
3182	/* .pfnReserved6 = */ NULL,
3183	/* .pfnReserved7 = */ NULL,
3184	#elif defined(IN_RING0)
3185	/* .pfnEarlyConstruct = */ NULL,
3186	/* .pfnConstruct = */ NULL,
3187	/* .pfnDestruct = */ NULL,
3188	/* .pfnFinalDestruct = */ NULL,
3189	/* .pfnRequest = */ NULL,
3190	/* .pfnReserved0 = */ NULL,
3191	/* .pfnReserved1 = */ NULL,
3192	/* .pfnReserved2 = */ NULL,
3193	/* .pfnReserved3 = */ NULL,
3194	/* .pfnReserved4 = */ NULL,
3195	/* .pfnReserved5 = */ NULL,
3196	/* .pfnReserved6 = */ NULL,
3197	/* .pfnReserved7 = */ NULL,
3198	#elif defined(IN_RC)
3199	/* .pfnConstruct = */ NULL,
3200	/* .pfnReserved0 = */ NULL,
3201	/* .pfnReserved1 = */ NULL,
3202	/* .pfnReserved2 = */ NULL,
3203	/* .pfnReserved3 = */ NULL,
3204	/* .pfnReserved4 = */ NULL,
3205	/* .pfnReserved5 = */ NULL,
3206	/* .pfnReserved6 = */ NULL,
3207	/* .pfnReserved7 = */ NULL,
3208	#else
3209	# error "Not in IN_RING3, IN_RING0 or IN_RC!"
3210	#endif
3211	/* .u32VersionEnd = */ PDM_DEVREG_VERSION
3212	};
3213
3214	/*
3215	* Local Variables:
3216	* mode: c
3217	* c-file-style: "k&r"
3218	* indent-tabs-mode: nil
3219	* End:
3220	*/
3221

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source: vbox/trunk/src/VBox/Devices/Storage/DevFdc.cpp

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