VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA.h@ 82781

Last change on this file since 82781 was 82199, checked in by vboxsync, 4 years ago

DevVGA: The FIFO shouldn't be prefetchable. Workarounds for old saved state with non-prefetchable VRAM (VMSVGA). bugref:9218
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File size: 29.8 KB
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1/* $Id: DevVGA.h 82199 2019-11-25 20:54:14Z vboxsync $ */
2/** @file
3 * DevVGA - VBox VGA/VESA device, internal header.
4 */
5
6/*
7 * Copyright (C) 2006-2019 Oracle Corporation
8 *
9 * This file is part of VirtualBox Open Source Edition (OSE), as
10 * available from http://www.virtualbox.org. This file is free software;
11 * you can redistribute it and/or modify it under the terms of the GNU
12 * General Public License (GPL) as published by the Free Software
13 * Foundation, in version 2 as it comes in the "COPYING" file of the
14 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
15 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
16 * --------------------------------------------------------------------
17 *
18 * This code is based on:
19 *
20 * QEMU internal VGA defines.
21 *
22 * Copyright (c) 2003-2004 Fabrice Bellard
23 *
24 * Permission is hereby granted, free of charge, to any person obtaining a copy
25 * of this software and associated documentation files (the "Software"), to deal
26 * in the Software without restriction, including without limitation the rights
27 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
28 * copies of the Software, and to permit persons to whom the Software is
29 * furnished to do so, subject to the following conditions:
30 *
31 * The above copyright notice and this permission notice shall be included in
32 * all copies or substantial portions of the Software.
33 *
34 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
35 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
36 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
37 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
38 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
39 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
40 * THE SOFTWARE.
41 */
42
43#ifndef VBOX_INCLUDED_SRC_Graphics_DevVGA_h
44#define VBOX_INCLUDED_SRC_Graphics_DevVGA_h
45#ifndef RT_WITHOUT_PRAGMA_ONCE
46# pragma once
47#endif
48
49#include <VBoxVideoVBE.h>
50#include <VBoxVideoVBEPrivate.h>
51
52#ifdef VBOX_WITH_HGSMI
53# include "HGSMI/HGSMIHost.h"
54#endif /* VBOX_WITH_HGSMI */
55#include "DevVGASavedState.h"
56
57#ifdef VBOX_WITH_VMSVGA
58# include "DevVGA-SVGA.h"
59#endif
60
61#include <iprt/list.h>
62
63
64/** Use VBE bytewise I/O. Only needed for Windows Longhorn/Vista betas and backwards compatibility. */
65#define VBE_BYTEWISE_IO
66
67#ifdef VBOX
68/** The default amount of VRAM. */
69# define VGA_VRAM_DEFAULT (_4M)
70/** The maximum amount of VRAM. Limited by VBOX_MAX_ALLOC_PAGE_COUNT. */
71# define VGA_VRAM_MAX (256 * _1M)
72/** The minimum amount of VRAM. */
73# define VGA_VRAM_MIN (_1M)
74#endif
75
76
77/** @name Macros dealing with partial ring-0/raw-mode VRAM mappings.
78 * @{ */
79/** The size of the VGA ring-0 and raw-mode mapping.
80 *
81 * This is supposed to be all the VGA memory accessible to the guest.
82 * The initial value was 256KB but NTAllInOne.iso appears to access more
83 * thus the limit was upped to 512KB.
84 *
85 * @todo Someone with some VGA knowhow should make a better guess at this value.
86 */
87#define VGA_MAPPING_SIZE _512K
88/** Enables partially mapping the VRAM into ring-0 rather than using the ring-3.
89 * The VGA_MAPPING_SIZE define sets the number of bytes that will be mapped. */
90#define VGA_WITH_PARTIAL_RING0_MAPPING
91
92/**
93 * Check buffer if an VRAM offset is within the right range or not.
94 */
95#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) || (defined(IN_RING0) && defined(VGA_WITH_PARTIAL_RING0_MAPPING))
96# define VERIFY_VRAM_WRITE_OFF_RETURN(pThis, off) \
97 do { \
98 if ((off) < VGA_MAPPING_SIZE) \
99 RT_UNTRUSTED_VALIDATED_FENCE(); \
100 else \
101 { \
102 AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), VINF_SUCCESS); \
103 Log2(("%Rfn[%d]: %RX32 -> R3\n", __PRETTY_FUNCTION__, __LINE__, (off))); \
104 return VINF_IOM_R3_MMIO_WRITE; \
105 } \
106 } while (0)
107#else
108# define VERIFY_VRAM_WRITE_OFF_RETURN(pThis, off) \
109 do { \
110 AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), VINF_SUCCESS); \
111 RT_UNTRUSTED_VALIDATED_FENCE(); \
112 } while (0)
113#endif
114
115/**
116 * Check buffer if an VRAM offset is within the right range or not.
117 */
118#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) || (defined(IN_RING0) && defined(VGA_WITH_PARTIAL_RING0_MAPPING))
119# define VERIFY_VRAM_READ_OFF_RETURN(pThis, off, rcVar) \
120 do { \
121 if ((off) < VGA_MAPPING_SIZE) \
122 RT_UNTRUSTED_VALIDATED_FENCE(); \
123 else \
124 { \
125 AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), 0xff); \
126 Log2(("%Rfn[%d]: %RX32 -> R3\n", __PRETTY_FUNCTION__, __LINE__, (off))); \
127 (rcVar) = VINF_IOM_R3_MMIO_READ; \
128 return 0; \
129 } \
130 } while (0)
131#else
132# define VERIFY_VRAM_READ_OFF_RETURN(pThis, off, rcVar) \
133 do { \
134 AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), 0xff); \
135 RT_UNTRUSTED_VALIDATED_FENCE(); \
136 NOREF(rcVar); \
137 } while (0)
138#endif
139/** @} */
140
141
142#define MSR_COLOR_EMULATION 0x01
143#define MSR_PAGE_SELECT 0x20
144
145#define ST01_V_RETRACE 0x08
146#define ST01_DISP_ENABLE 0x01
147
148/* bochs VBE support */
149#define CONFIG_BOCHS_VBE
150
151#ifdef CONFIG_BOCHS_VBE
152
153/* Cross reference with <VBoxVideoVBE.h> */
154#define VBE_DISPI_INDEX_NB_SAVED 0xb /* Old number of saved registers (vbe_regs array, see vga_load) */
155#define VBE_DISPI_INDEX_NB 0xd /* Total number of VBE registers */
156
157#define VGA_STATE_COMMON_BOCHS_VBE \
158 uint16_t vbe_index; \
159 uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \
160 uint16_t alignment[2]; /* pad to 64 bits */ \
161 uint32_t vbe_start_addr; \
162 uint32_t vbe_line_offset; \
163 uint32_t vbe_bank_max;
164
165#else
166
167#define VGA_STATE_COMMON_BOCHS_VBE
168
169#endif /* !CONFIG_BOCHS_VBE */
170
171#define CH_ATTR_SIZE (160 * 100)
172#define VGA_MAX_HEIGHT VBE_DISPI_MAX_YRES
173
174typedef struct vga_retrace_s {
175 unsigned frame_cclks; /* Character clocks per frame. */
176 unsigned frame_ns; /* Frame duration in ns. */
177 unsigned cclk_ns; /* Character clock duration in ns. */
178 unsigned vb_start; /* Vertical blanking start (scanline). */
179 unsigned vb_end; /* Vertical blanking end (scanline). */
180 unsigned vb_end_ns; /* Vertical blanking end time (length) in ns. */
181 unsigned vs_start; /* Vertical sync start (scanline). */
182 unsigned vs_end; /* Vertical sync end (scanline). */
183 unsigned vs_start_ns; /* Vertical sync start time in ns. */
184 unsigned vs_end_ns; /* Vertical sync end time in ns. */
185 unsigned h_total; /* Horizontal total (cclks per scanline). */
186 unsigned h_total_ns; /* Scanline duration in ns. */
187 unsigned hb_start; /* Horizontal blanking start (cclk). */
188 unsigned hb_end; /* Horizontal blanking end (cclk). */
189 unsigned hb_end_ns; /* Horizontal blanking end time (length) in ns. */
190 unsigned v_freq_hz; /* Vertical refresh rate to emulate. */
191} vga_retrace_s;
192
193#ifndef VBOX
194#define VGA_STATE_COMMON \
195 uint8_t *vram_ptr; \
196 unsigned long vram_offset; \
197 unsigned int vram_size; \
198 uint32_t latch; \
199 uint8_t sr_index; \
200 uint8_t sr[256]; \
201 uint8_t gr_index; \
202 uint8_t gr[256]; \
203 uint8_t ar_index; \
204 uint8_t ar[21]; \
205 int ar_flip_flop; \
206 uint8_t cr_index; \
207 uint8_t cr[256]; /* CRT registers */ \
208 uint8_t msr; /* Misc Output Register */ \
209 uint8_t fcr; /* Feature Control Register */ \
210 uint8_t st00; /* status 0 */ \
211 uint8_t st01; /* status 1 */ \
212 uint8_t dac_state; \
213 uint8_t dac_sub_index; \
214 uint8_t dac_read_index; \
215 uint8_t dac_write_index; \
216 uint8_t dac_cache[3]; /* used when writing */ \
217 uint8_t palette[768]; \
218 int32_t bank_offset; \
219 int (*get_bpp)(struct VGAState *s); \
220 void (*get_offsets)(struct VGAState *s, \
221 uint32_t *pline_offset, \
222 uint32_t *pstart_addr, \
223 uint32_t *pline_compare); \
224 void (*get_resolution)(struct VGAState *s, \
225 int *pwidth, \
226 int *pheight); \
227 VGA_STATE_COMMON_BOCHS_VBE \
228 /* display refresh support */ \
229 DisplayState *ds; \
230 uint32_t font_offsets[2]; \
231 int graphic_mode; \
232 uint8_t shift_control; \
233 uint8_t double_scan; \
234 uint32_t line_offset; \
235 uint32_t line_compare; \
236 uint32_t start_addr; \
237 uint32_t plane_updated; \
238 uint8_t last_cw, last_ch; \
239 uint32_t last_width, last_height; /* in chars or pixels */ \
240 uint32_t last_scr_width, last_scr_height; /* in pixels */ \
241 uint8_t cursor_start, cursor_end; \
242 uint32_t cursor_offset; \
243 unsigned int (*rgb_to_pixel)(unsigned int r, \
244 unsigned int g, unsigned b); \
245 /* hardware mouse cursor support */ \
246 uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32]; \
247 void (*cursor_invalidate)(struct VGAState *s); \
248 void (*cursor_draw_line)(struct VGAState *s, uint8_t *d, int y); \
249 /* tell for each page if it has been updated since the last time */ \
250 uint32_t last_palette[256]; \
251 uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
252
253#else /* VBOX */
254
255/* bird: Since we've changed types, reordered members, done alignment
256 paddings and more, VGA_STATE_COMMON was added directly to the
257 struct to make it more readable and easier to handle. */
258
259struct VGAState;
260typedef int FNGETBPP(struct VGAState *s);
261typedef void FNGETOFFSETS(struct VGAState *s, uint32_t *pline_offset, uint32_t *pstart_addr, uint32_t *pline_compare);
262typedef void FNGETRESOLUTION(struct VGAState *s, int *pwidth, int *pheight);
263typedef unsigned int FNRGBTOPIXEL(unsigned int r, unsigned int g, unsigned b);
264typedef void FNCURSORINVALIDATE(struct VGAState *s);
265typedef void FNCURSORDRAWLINE(struct VGAState *s, uint8_t *d, int y);
266
267#endif /* VBOX */
268
269#ifdef VBOX_WITH_VDMA
270typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
271#endif
272
273#ifdef VBOX_WITH_VIDEOHWACCEL
274#define VBOX_VHWA_MAX_PENDING_COMMANDS 1000
275
276typedef struct _VBOX_VHWA_PENDINGCMD
277{
278 RTLISTNODE Node;
279 VBOXVHWACMD RT_UNTRUSTED_VOLATILE_GUEST *pCommand;
280} VBOX_VHWA_PENDINGCMD;
281#endif
282
283
284/**
285 * The shared VGA state data.
286 */
287typedef struct VGAState
288{
289 uint32_t vram_size;
290 uint32_t latch;
291 uint8_t sr_index;
292 uint8_t sr[256];
293 uint8_t gr_index;
294 uint8_t gr[256];
295 uint8_t ar_index;
296 uint8_t ar[21];
297 int32_t ar_flip_flop;
298 uint8_t cr_index;
299 uint8_t cr[256]; /* CRT registers */
300 uint8_t msr; /* Misc Output Register */
301 uint8_t fcr; /* Feature Control Register */
302 uint8_t st00; /* status 0 */
303 uint8_t st01; /* status 1 */
304 uint8_t dac_state;
305 uint8_t dac_sub_index;
306 uint8_t dac_read_index;
307 uint8_t dac_write_index;
308 uint8_t dac_cache[3]; /* used when writing */
309 uint8_t palette[768];
310 int32_t bank_offset;
311 VGA_STATE_COMMON_BOCHS_VBE
312 /* display refresh support */
313 uint32_t font_offsets[2];
314 int32_t graphic_mode;
315 uint8_t shift_control;
316 uint8_t double_scan;
317 uint8_t padding1[2];
318 uint32_t line_offset;
319 uint32_t vga_addr_mask;
320 uint32_t padding1a;
321 uint32_t line_compare;
322 uint32_t start_addr;
323 uint32_t plane_updated;
324 uint8_t last_cw, last_ch, padding2[2];
325 uint32_t last_width, last_height; /* in chars or pixels */
326 uint32_t last_scr_width, last_scr_height; /* in pixels */
327 uint32_t last_bpp;
328 uint8_t cursor_start, cursor_end;
329 bool last_cur_blink, last_chr_blink;
330 uint32_t cursor_offset;
331 /** hardware mouse cursor support */
332 uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
333 /** tell for each page if it has been updated since the last time */
334 uint32_t last_palette[256];
335 uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
336
337 /** end-of-common-state-marker */
338 uint32_t u32Marker;
339
340 /** Refresh timer handle - HC. */
341 TMTIMERHANDLE hRefreshTimer;
342
343#ifdef VBOX_WITH_VMSVGA
344 VMSVGASTATE svga;
345#endif
346
347 /** The number of monitors. */
348 uint32_t cMonitors;
349 /** Current refresh timer interval. */
350 uint32_t cMilliesRefreshInterval;
351 /** Bitmap tracking dirty pages. */
352 uint32_t au32DirtyBitmap[VGA_VRAM_MAX / PAGE_SIZE / 32];
353
354 /** Flag indicating that there are dirty bits. This is used to optimize the handler resetting. */
355 bool fHasDirtyBits;
356 /** LFB was updated flag. */
357 bool fLFBUpdated;
358 /** Flag indicating that the VGA memory in the 0xa0000-0xbffff region has been remapped to allow direct access. */
359 bool fRemappedVGA;
360 /** Whether to render the guest VRAM to the framebuffer memory. False only for some LFB modes. */
361 bool fRenderVRAM;
362 /** Whether 3D is enabled for the VM. */
363 bool f3DEnabled;
364 /** Set if state has been restored. */
365 bool fStateLoaded;
366#ifdef VBOX_WITH_VMSVGA
367 /* Whether the SVGA emulation is enabled or not. */
368 bool fVMSVGAEnabled;
369 bool fVMSVGAPciId;
370 bool fVMSVGAPciBarLayout;
371 bool Padding4[3];
372#else
373 bool Padding4[3+3];
374#endif
375
376 struct {
377 uint32_t u32Padding1;
378 uint32_t iVRAM;
379#ifdef VBOX_WITH_VMSVGA
380 uint32_t iIO;
381 uint32_t iFIFO;
382#endif
383 } pciRegions;
384
385 /** Physical access type for the linear frame buffer dirty page tracking. */
386 PGMPHYSHANDLERTYPE hLfbAccessHandlerType;
387
388 /** The physical address the VRAM was assigned. */
389 RTGCPHYS GCPhysVRAM;
390 /** The critical section protect the instance data. */
391 PDMCRITSECT CritSect;
392
393 /* Keep track of ring 0 latched accesses to the VGA MMIO memory. */
394 uint64_t u64LastLatchedAccess;
395 uint32_t cLatchAccesses;
396 uint16_t uMaskLatchAccess;
397 uint16_t iMask;
398
399#ifdef VBE_BYTEWISE_IO
400 /** VBE read/write data/index flags */
401 uint8_t fReadVBEData;
402 uint8_t fWriteVBEData;
403 uint8_t fReadVBEIndex;
404 uint8_t fWriteVBEIndex;
405 /** VBE write data/index one byte buffer */
406 uint8_t cbWriteVBEData;
407 uint8_t cbWriteVBEIndex;
408 /** VBE Extra Data write address one byte buffer */
409 uint8_t cbWriteVBEExtraAddress;
410 uint8_t Padding5;
411#endif
412
413 /** Retrace emulation state */
414 bool fRealRetrace;
415 bool Padding6[HC_ARCH_BITS == 64 ? 7 : 3];
416 vga_retrace_s retrace_state;
417
418#ifdef VBOX_WITH_HGSMI
419 /** Base port in the assigned PCI I/O space. */
420 RTIOPORT IOPortBase;
421# ifdef VBOX_WITH_WDDM
422 uint8_t Padding10[2];
423 /** Specifies guest driver caps, i.e. whether it can handle IRQs from the
424 * adapter, the way it can handle async HGSMI command completion, etc. */
425 uint32_t fGuestCaps;
426 uint32_t fScanLineCfg;
427 uint32_t Padding11;
428# else
429 uint8_t Padding11[14];
430# endif
431
432 /** The critical section serializes the HGSMI IRQ setting/clearing. */
433 PDMCRITSECT CritSectIRQ;
434 /** VBVARaiseIRQ flags which were set when the guest was still processing previous IRQ. */
435 uint32_t fu32PendingGuestFlags;
436 uint32_t Padding12;
437#endif /* VBOX_WITH_HGSMI */
438
439 PDMLED Led3D;
440
441 struct {
442 volatile uint32_t cPending;
443 uint32_t Padding1;
444 union
445 {
446 RTLISTNODE PendingList;
447 /* make sure the structure sized cross different contexts correctly */
448 struct
449 {
450 R3PTRTYPE(void *) dummy1;
451 R3PTRTYPE(void *) dummy2;
452 } dummy;
453 };
454 } pendingVhwaCommands;
455
456 /** The MMIO handle of the legacy graphics buffer/regs at 0xa0000-0xbffff. */
457 PGMMMIO2HANDLE hMmioLegacy;
458
459 /** @name I/O ports for range 0x3c0-3cf.
460 * @{ */
461 IOMIOPORTHANDLE hIoPortAr;
462 IOMIOPORTHANDLE hIoPortMsrSt00;
463 IOMIOPORTHANDLE hIoPort3c3;
464 IOMIOPORTHANDLE hIoPortSr;
465 IOMIOPORTHANDLE hIoPortDac;
466 IOMIOPORTHANDLE hIoPortPos;
467 IOMIOPORTHANDLE hIoPortGr;
468 /** @} */
469
470 /** @name I/O ports for MDA 0x3b0-0x3bf (sparse)
471 * @{ */
472 IOMIOPORTHANDLE hIoPortMdaCrt;
473 IOMIOPORTHANDLE hIoPortMdaFcrSt;
474 /** @} */
475
476 /** @name I/O ports for CGA 0x3d0-0x3df (sparse)
477 * @{ */
478 IOMIOPORTHANDLE hIoPortCgaCrt;
479 IOMIOPORTHANDLE hIoPortCgaFcrSt;
480 /** @} */
481
482#ifdef VBOX_WITH_HGSMI
483 /** @name I/O ports for HGSMI 0x3b0-03b3 and 0x3d0-03d3 (ring-3 only)
484 * @{ */
485 IOMIOPORTHANDLE hIoPortHgsmiHost;
486 IOMIOPORTHANDLE hIoPortHgsmiGuest;
487 /** @} */
488#endif
489
490 /** @name I/O ports for Boch VBE 0x1ce-0x1cf
491 * @{ */
492 IOMIOPORTHANDLE hIoPortVbeIndex;
493 IOMIOPORTHANDLE hIoPortVbeData;
494 /** @} */
495
496 /** The BIOS printf I/O port. */
497 IOMIOPORTHANDLE hIoPortBios;
498 /** The VBE extra data I/O port. */
499 IOMIOPORTHANDLE hIoPortVbeExtra;
500 /** The logo command I/O port. */
501 IOMIOPORTHANDLE hIoPortCmdLogo;
502
503#ifdef VBOX_WITH_VMSVGA
504 /** VMSVGA: I/O port PCI region. */
505 IOMIOPORTHANDLE hIoPortVmSvga;
506 /** VMSVGA: The MMIO2 handle of the FIFO PCI region. */
507 PGMMMIO2HANDLE hMmio2VmSvgaFifo;
508#endif
509 /** The MMIO2 handle of the VRAM. */
510 PGMMMIO2HANDLE hMmio2VRam;
511
512 STAMPROFILE StatRZMemoryRead;
513 STAMPROFILE StatR3MemoryRead;
514 STAMPROFILE StatRZMemoryWrite;
515 STAMPROFILE StatR3MemoryWrite;
516 STAMCOUNTER StatMapPage; /**< Counts IOMMMIOMapMMIO2Page calls. */
517 STAMCOUNTER StatUpdateDisp; /**< Counts vgaPortUpdateDisplay calls. */
518#ifdef VBOX_WITH_HGSMI
519 STAMCOUNTER StatHgsmiMdaCgaAccesses;
520#endif
521} VGAState;
522#ifdef VBOX
523/** VGA state. */
524typedef VGAState VGASTATE;
525/** Pointer to the VGA state. */
526typedef VGASTATE *PVGASTATE;
527AssertCompileMemberAlignment(VGASTATE, bank_offset, 8);
528AssertCompileMemberAlignment(VGASTATE, font_offsets, 8);
529AssertCompileMemberAlignment(VGASTATE, last_ch_attr, 8);
530AssertCompileMemberAlignment(VGASTATE, u32Marker, 8);
531#endif
532
533
534/**
535 * The VGA state data for ring-3 context.
536 */
537typedef struct VGASTATER3
538{
539 R3PTRTYPE(uint8_t *) pbVRam;
540 R3PTRTYPE(FNGETBPP *) get_bpp;
541 R3PTRTYPE(FNGETOFFSETS *) get_offsets;
542 R3PTRTYPE(FNGETRESOLUTION *) get_resolution;
543 R3PTRTYPE(FNRGBTOPIXEL *) rgb_to_pixel;
544 R3PTRTYPE(FNCURSORINVALIDATE *) cursor_invalidate;
545 R3PTRTYPE(FNCURSORDRAWLINE *) cursor_draw_line;
546
547 /** Pointer to the device instance.
548 * @note Only for getting our bearings in interface methods. */
549 PPDMDEVINSR3 pDevIns;
550#ifdef VBOX_WITH_HGSMI
551 R3PTRTYPE(PHGSMIINSTANCE) pHGSMI;
552#endif
553#ifdef VBOX_WITH_VDMA
554 R3PTRTYPE(PVBOXVDMAHOST) pVdma;
555#endif
556
557 /** LUN\#0: The display port base interface. */
558 PDMIBASE IBase;
559 /** LUN\#0: The display port interface. */
560 PDMIDISPLAYPORT IPort;
561#ifdef VBOX_WITH_HGSMI
562 /** LUN\#0: VBVA callbacks interface */
563 PDMIDISPLAYVBVACALLBACKS IVBVACallbacks;
564#endif
565 /** Status LUN: Leds interface. */
566 PDMILEDPORTS ILeds;
567
568 /** Pointer to base interface of the driver. */
569 R3PTRTYPE(PPDMIBASE) pDrvBase;
570 /** Pointer to display connector interface of the driver. */
571 R3PTRTYPE(PPDMIDISPLAYCONNECTOR) pDrv;
572
573 /** Status LUN: Partner of ILeds. */
574 R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
575
576#ifdef VBOX_WITH_VMSVGA
577 /** The VMSVGA ring-3 state. */
578 VMSVGASTATER3 svga;
579#endif
580
581 /** The VGA BIOS ROM data. */
582 R3PTRTYPE(uint8_t *) pbVgaBios;
583 /** The size of the VGA BIOS ROM. */
584 uint64_t cbVgaBios;
585 /** The name of the VGA BIOS ROM file. */
586 R3PTRTYPE(char *) pszVgaBiosFile;
587
588 /** @name Logo data
589 * @{ */
590 /** Current logo data offset. */
591 uint32_t offLogoData;
592 /** The size of the BIOS logo data. */
593 uint32_t cbLogo;
594 /** Current logo command. */
595 uint16_t LogoCommand;
596 /** Bitmap width. */
597 uint16_t cxLogo;
598 /** Bitmap height. */
599 uint16_t cyLogo;
600 /** Bitmap planes. */
601 uint16_t cLogoPlanes;
602 /** Bitmap depth. */
603 uint16_t cLogoBits;
604 /** Bitmap compression. */
605 uint16_t LogoCompression;
606 /** Bitmap colors used. */
607 uint16_t cLogoUsedColors;
608 /** Palette size. */
609 uint16_t cLogoPalEntries;
610 /** Clear screen flag. */
611 uint8_t fLogoClearScreen;
612 bool fBootMenuInverse;
613 uint8_t Padding8[6];
614 /** Palette data. */
615 uint32_t au32LogoPalette[256];
616 /** The BIOS logo data. */
617 R3PTRTYPE(uint8_t *) pbLogo;
618 /** The name of the logo file. */
619 R3PTRTYPE(char *) pszLogoFile;
620 /** Bitmap image data. */
621 R3PTRTYPE(uint8_t *) pbLogoBitmap;
622 /** @} */
623
624 /** @name VBE extra data (modes)
625 * @{ */
626 /** The VBE BIOS extra data. */
627 R3PTRTYPE(uint8_t *) pbVBEExtraData;
628 /** The size of the VBE BIOS extra data. */
629 uint16_t cbVBEExtraData;
630 /** The VBE BIOS current memory address. */
631 uint16_t u16VBEExtraAddress;
632 uint16_t Padding7[2];
633 /** @} */
634
635} VGASTATER3;
636/** Pointer to the ring-3 VGA state. */
637typedef VGASTATER3 *PVGASTATER3;
638
639
640/**
641 * The VGA state data for ring-0 context.
642 */
643typedef struct VGASTATER0
644{
645 /** The R0 vram pointer. */
646 R0PTRTYPE(uint8_t *) pbVRam;
647#ifdef VBOX_WITH_VMSVGA
648 /** The VMSVGA ring-0 state. */
649 VMSVGASTATER0 svga;
650#endif
651} VGASTATER0;
652/** Pointer to the ring-0 VGA state. */
653typedef VGASTATER0 *PVGASTATER0;
654
655
656/**
657 * The VGA state data for raw-mode context.
658 */
659typedef struct VGASTATERC
660{
661 /** Pointer to the RC vram mapping. */
662 RCPTRTYPE(uint8_t *) pbVRam;
663} VGASTATERC;
664/** Pointer to the raw-mode VGA state. */
665typedef VGASTATERC *PVGASTATERC;
666
667
668/** The VGA state for the current context. */
669typedef CTX_SUFF(VGASTATE) VGASTATECC;
670/** Pointer to the VGA state for the current context. */
671typedef CTX_SUFF(PVGASTATE) PVGASTATECC;
672
673
674
675/** VBE Extra Data. */
676typedef VBEHeader VBEHEADER;
677/** Pointer to the VBE Extra Data. */
678typedef VBEHEADER *PVBEHEADER;
679
680#if !defined(VBOX) || defined(IN_RING3)
681static inline int c6_to_8(int v)
682{
683 int b;
684 v &= 0x3f;
685 b = v & 1;
686 return (v << 2) | (b << 1) | b;
687}
688#endif /* !VBOX || IN_RING3 */
689
690
691#ifdef VBOX_WITH_HGSMI
692int VBVAInit(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
693void VBVADestroy(PVGASTATECC pThisCC);
694int VBVAUpdateDisplay(PVGASTATE pThis, PVGASTATECC pThisCC);
695void VBVAReset(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
696void VBVAOnVBEChanged(PVGASTATE pThis, PVGASTATECC pThisCC);
697void VBVAOnResume(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
698
699bool VBVAIsPaused(PVGASTATECC pThisCC);
700#ifdef UNUSED_FUNCTION
701bool VBVAIsEnabled(PVGASTATECC pThisCC);
702#endif
703
704void VBVARaiseIrq(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t fFlags);
705
706int VBVAInfoScreen(PVGASTATE pThis, const VBVAINFOSCREEN RT_UNTRUSTED_VOLATILE_HOST *pScreen);
707#ifdef UNUSED_FUNCTION
708int VBVAGetInfoViewAndScreen(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t u32ViewIndex,
709 VBVAINFOVIEW *pView, VBVAINFOSCREEN *pScreen);
710#endif
711
712/* @return host-guest flags that were set on reset
713 * this allows the caller to make further cleaning when needed,
714 * e.g. reset the IRQ */
715uint32_t HGSMIReset(PHGSMIINSTANCE pIns);
716
717# ifdef VBOX_WITH_VIDEOHWACCEL
718DECLCALLBACK(int) vbvaR3VHWACommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface,
719 VBOXVHWACMD RT_UNTRUSTED_VOLATILE_GUEST *pCmd);
720int vbvaVHWAConstruct(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
721
722void vbvaTimerCb(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
723
724int vboxVBVASaveStatePrep(PPDMDEVINS pDevIns);
725int vboxVBVASaveStateDone(PPDMDEVINS pDevIns);
726# endif
727
728int vboxVBVASaveStateExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
729int vboxVBVALoadStateExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t u32Version);
730int vboxVBVALoadStateDone(PPDMDEVINS pDevIns);
731
732DECLCALLBACK(int) vbvaR3PortSendModeHint(PPDMIDISPLAYPORT pInterface, uint32_t cx, uint32_t cy, uint32_t cBPP,
733 uint32_t cDisplay, uint32_t dx, uint32_t dy, uint32_t fEnabled, uint32_t fNotifyGuest);
734
735# ifdef VBOX_WITH_VDMA
736typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
737int vboxVDMAConstruct(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t cPipeElements);
738void vboxVDMADestruct(PVBOXVDMAHOST pVdma);
739void vboxVDMAReset(PVBOXVDMAHOST pVdma);
740void vboxVDMAControl(PVBOXVDMAHOST pVdma, VBOXVDMA_CTL RT_UNTRUSTED_VOLATILE_GUEST *pCmd, uint32_t cbCmd);
741void vboxVDMACommand(PVBOXVDMAHOST pVdma, VBOXVDMACBUF_DR RT_UNTRUSTED_VOLATILE_GUEST *pCmd, uint32_t cbCmd);
742int vboxVDMASaveStateExecPrep(struct VBOXVDMAHOST *pVdma);
743int vboxVDMASaveStateExecDone(struct VBOXVDMAHOST *pVdma);
744int vboxVDMASaveStateExecPerform(PCPDMDEVHLPR3 pHlp, struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
745int vboxVDMASaveLoadExecPerform(PCPDMDEVHLPR3 pHlp, struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM, uint32_t u32Version);
746int vboxVDMASaveLoadDone(struct VBOXVDMAHOST *pVdma);
747# endif /* VBOX_WITH_VDMA */
748
749#endif /* VBOX_WITH_HGSMI */
750
751# ifdef VBOX_WITH_VMSVGA
752int vgaR3UnregisterVRAMHandler(PPDMDEVINS pDevIns, PVGASTATE pThis);
753int vgaR3RegisterVRAMHandler(PPDMDEVINS pDevIns, PVGASTATE pThis, uint64_t cbFrameBuffer);
754int vgaR3UpdateDisplay(PVGASTATE pThis, unsigned xStart, unsigned yStart, unsigned width, unsigned height);
755# endif
756
757#ifndef VBOX
758void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base,
759 unsigned long vga_ram_offset, int vga_ram_size);
760uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
761void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
762void vga_invalidate_scanlines(VGAState *s, int y1, int y2);
763
764void vga_draw_cursor_line_8(uint8_t *d1, const uint8_t *src1,
765 int poffset, int w,
766 unsigned int color0, unsigned int color1,
767 unsigned int color_xor);
768void vga_draw_cursor_line_16(uint8_t *d1, const uint8_t *src1,
769 int poffset, int w,
770 unsigned int color0, unsigned int color1,
771 unsigned int color_xor);
772void vga_draw_cursor_line_32(uint8_t *d1, const uint8_t *src1,
773 int poffset, int w,
774 unsigned int color0, unsigned int color1,
775 unsigned int color_xor);
776
777extern const uint8_t sr_mask[8];
778extern const uint8_t gr_mask[16];
779#endif /* !VBOX */
780
781#endif /* !VBOX_INCLUDED_SRC_Graphics_DevVGA_h */
782
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