VirtualBox

source: vbox/trunk/src/VBox/Devices/Graphics/DevVGA.h

Last change on this file was 103457, checked in by vboxsync, 3 months ago

HGSMI: Some symbol visibility cleanup, bugref:3409
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1/* $Id: DevVGA.h 103457 2024-02-19 15:51:24Z vboxsync $ */
2/** @file
3 * DevVGA - VBox VGA/VESA device, internal header.
4 */
5
6/*
7 * Copyright (C) 2006-2023 Oracle and/or its affiliates.
8 *
9 * This file is part of VirtualBox base platform packages, as
10 * available from https://www.virtualbox.org.
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation, in version 3 of the
15 * License.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * You should have received a copy of the GNU General Public License
23 * along with this program; if not, see <https://www.gnu.org/licenses>.
24 *
25 * SPDX-License-Identifier: GPL-3.0-only
26 * --------------------------------------------------------------------
27 *
28 * This code is based on:
29 *
30 * QEMU internal VGA defines.
31 *
32 * Copyright (c) 2003-2004 Fabrice Bellard
33 *
34 * Permission is hereby granted, free of charge, to any person obtaining a copy
35 * of this software and associated documentation files (the "Software"), to deal
36 * in the Software without restriction, including without limitation the rights
37 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
38 * copies of the Software, and to permit persons to whom the Software is
39 * furnished to do so, subject to the following conditions:
40 *
41 * The above copyright notice and this permission notice shall be included in
42 * all copies or substantial portions of the Software.
43 *
44 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
45 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
46 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
47 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
48 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
49 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
50 * THE SOFTWARE.
51 */
52
53#ifndef VBOX_INCLUDED_SRC_Graphics_DevVGA_h
54#define VBOX_INCLUDED_SRC_Graphics_DevVGA_h
55#ifndef RT_WITHOUT_PRAGMA_ONCE
56# pragma once
57#endif
58
59#include <VBoxVideoVBE.h>
60#include <VBoxVideoVBEPrivate.h>
61
62#ifdef VBOX_WITH_HGSMI
63# include "HGSMI/HGSMIHost.h"
64#endif /* VBOX_WITH_HGSMI */
65#include "DevVGASavedState.h"
66
67#ifdef VBOX_WITH_VMSVGA
68# include "DevVGA-SVGA.h"
69#endif
70
71#include <iprt/list.h>
72
73
74/** Use VBE bytewise I/O. Only needed for Windows Longhorn/Vista betas and backwards compatibility. */
75#define VBE_BYTEWISE_IO
76
77#ifdef VBOX
78/** The default amount of VRAM. */
79# define VGA_VRAM_DEFAULT (_4M)
80/** The maximum amount of VRAM. Limited by VBOX_MAX_ALLOC_PAGE_COUNT. */
81# define VGA_VRAM_MAX (256 * _1M)
82/** The minimum amount of VRAM. */
83# define VGA_VRAM_MIN (_1M)
84#endif
85
86
87/** @name Macros dealing with partial ring-0/raw-mode VRAM mappings.
88 * @{ */
89/** The size of the VGA ring-0 and raw-mode mapping.
90 *
91 * This is supposed to be all the VGA memory accessible to the guest.
92 * The initial value was 256KB but NTAllInOne.iso appears to access more
93 * thus the limit was upped to 512KB.
94 *
95 * @todo Someone with some VGA knowhow should make a better guess at this value.
96 */
97#define VGA_MAPPING_SIZE _512K
98/** Enables partially mapping the VRAM into ring-0 rather than using the ring-3.
99 * The VGA_MAPPING_SIZE define sets the number of bytes that will be mapped. */
100#define VGA_WITH_PARTIAL_RING0_MAPPING
101
102/**
103 * Check buffer if an VRAM offset is within the right range or not.
104 */
105#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) || (defined(IN_RING0) && defined(VGA_WITH_PARTIAL_RING0_MAPPING))
106# define VERIFY_VRAM_WRITE_OFF_RETURN(pThis, off) \
107 do { \
108 if ((off) < VGA_MAPPING_SIZE) \
109 RT_UNTRUSTED_VALIDATED_FENCE(); \
110 else \
111 { \
112 AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), VINF_SUCCESS); \
113 Log2(("%Rfn[%d]: %RX32 -> R3\n", __PRETTY_FUNCTION__, __LINE__, (off))); \
114 return VINF_IOM_R3_MMIO_WRITE; \
115 } \
116 } while (0)
117#else
118# define VERIFY_VRAM_WRITE_OFF_RETURN(pThis, off) \
119 do { \
120 AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), VINF_SUCCESS); \
121 RT_UNTRUSTED_VALIDATED_FENCE(); \
122 } while (0)
123#endif
124
125/**
126 * Check buffer if an VRAM offset is within the right range or not.
127 */
128#if defined(IN_RC) || defined(VBOX_WITH_2X_4GB_ADDR_SPACE_IN_R0) || (defined(IN_RING0) && defined(VGA_WITH_PARTIAL_RING0_MAPPING))
129# define VERIFY_VRAM_READ_OFF_RETURN(pThis, off, rcVar) \
130 do { \
131 if ((off) < VGA_MAPPING_SIZE) \
132 RT_UNTRUSTED_VALIDATED_FENCE(); \
133 else \
134 { \
135 AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), 0xff); \
136 Log2(("%Rfn[%d]: %RX32 -> R3\n", __PRETTY_FUNCTION__, __LINE__, (off))); \
137 (rcVar) = VINF_IOM_R3_MMIO_READ; \
138 return 0; \
139 } \
140 } while (0)
141#else
142# define VERIFY_VRAM_READ_OFF_RETURN(pThis, off, rcVar) \
143 do { \
144 AssertMsgReturn((off) < (pThis)->vram_size, ("%RX32 !< %RX32\n", (uint32_t)(off), (pThis)->vram_size), 0xff); \
145 RT_UNTRUSTED_VALIDATED_FENCE(); \
146 NOREF(rcVar); \
147 } while (0)
148#endif
149/** @} */
150
151
152#define MSR_COLOR_EMULATION 0x01
153#define MSR_PAGE_SELECT 0x20
154
155#define ST01_V_RETRACE 0x08
156#define ST01_DISP_ENABLE 0x01
157
158/* bochs VBE support */
159#define CONFIG_BOCHS_VBE
160
161#ifdef CONFIG_BOCHS_VBE
162
163/* Cross reference with <VBoxVideoVBE.h> */
164#define VBE_DISPI_INDEX_NB_SAVED 0xb /* Old number of saved registers (vbe_regs array, see vga_load) */
165#define VBE_DISPI_INDEX_NB 0xd /* Total number of VBE registers */
166
167#define VGA_STATE_COMMON_BOCHS_VBE \
168 uint16_t vbe_index; \
169 uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \
170 uint16_t alignment[2]; /* pad to 64 bits */ \
171 uint32_t vbe_start_addr; \
172 uint32_t vbe_line_offset; \
173 uint32_t vbe_bank_max;
174
175#else
176
177#define VGA_STATE_COMMON_BOCHS_VBE
178
179#endif /* !CONFIG_BOCHS_VBE */
180
181#define CH_ATTR_SIZE (160 * 100)
182#define VGA_MAX_HEIGHT VBE_DISPI_MAX_YRES
183
184typedef struct vga_retrace_s {
185 unsigned frame_cclks; /* Character clocks per frame. */
186 unsigned frame_ns; /* Frame duration in ns. */
187 unsigned cclk_ns; /* Character clock duration in ns. */
188 unsigned vb_start; /* Vertical blanking start (scanline). */
189 unsigned vb_end; /* Vertical blanking end (scanline). */
190 unsigned vb_end_ns; /* Vertical blanking end time (length) in ns. */
191 unsigned vs_start; /* Vertical sync start (scanline). */
192 unsigned vs_end; /* Vertical sync end (scanline). */
193 unsigned vs_start_ns; /* Vertical sync start time in ns. */
194 unsigned vs_end_ns; /* Vertical sync end time in ns. */
195 unsigned h_total; /* Horizontal total (cclks per scanline). */
196 unsigned h_total_ns; /* Scanline duration in ns. */
197 unsigned hb_start; /* Horizontal blanking start (cclk). */
198 unsigned hb_end; /* Horizontal blanking end (cclk). */
199 unsigned hb_end_ns; /* Horizontal blanking end time (length) in ns. */
200 unsigned v_freq_hz; /* Vertical refresh rate to emulate. */
201} vga_retrace_s;
202
203#ifndef VBOX
204#define VGA_STATE_COMMON \
205 unsigned long vram_offset; \
206 unsigned int vram_size; \
207 uint32_t latch; \
208 uint8_t sr_index; \
209 uint8_t sr[256]; \
210 uint8_t gr_index; \
211 uint8_t gr[256]; \
212 uint8_t ar_index; \
213 uint8_t ar[21]; \
214 int ar_flip_flop; \
215 uint8_t cr_index; \
216 uint8_t cr[256]; /* CRT registers */ \
217 uint8_t msr; /* Misc Output Register */ \
218 uint8_t fcr; /* Feature Control Register */ \
219 uint8_t st00; /* status 0 */ \
220 uint8_t st01; /* status 1 */ \
221 uint8_t dac_state; \
222 uint8_t dac_sub_index; \
223 uint8_t dac_read_index; \
224 uint8_t dac_write_index; \
225 uint8_t dac_cache[3]; /* used when writing */ \
226 uint8_t palette[768]; \
227 int32_t bank_offset; \
228 int (*get_bpp)(struct VGAState *s); \
229 void (*get_offsets)(struct VGAState *s, \
230 uint32_t *pline_offset, \
231 uint32_t *pstart_addr, \
232 uint32_t *pline_compare); \
233 void (*get_resolution)(struct VGAState *s, \
234 int *pwidth, \
235 int *pheight); \
236 VGA_STATE_COMMON_BOCHS_VBE \
237 /* display refresh support */ \
238 DisplayState *ds; \
239 uint32_t font_offsets[2]; \
240 int graphic_mode; \
241 uint8_t shift_control; \
242 uint8_t double_scan; \
243 uint32_t line_offset; \
244 uint32_t line_compare; \
245 uint32_t start_addr; \
246 uint32_t plane_updated; \
247 uint8_t last_cw, last_ch; \
248 uint32_t last_width, last_height; /* in chars or pixels */ \
249 uint32_t last_scr_width, last_scr_height; /* in pixels */ \
250 uint8_t cursor_start, cursor_end; \
251 uint32_t cursor_offset; \
252 unsigned int (*rgb_to_pixel)(unsigned int r, \
253 unsigned int g, unsigned b); \
254 /* hardware mouse cursor support */ \
255 uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32]; \
256 void (*cursor_invalidate)(struct VGAState *s); \
257 void (*cursor_draw_line)(struct VGAState *s, uint8_t *d, int y); \
258 /* tell for each page if it has been updated since the last time */ \
259 uint32_t last_palette[256]; \
260 uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
261
262#else /* VBOX */
263
264/* bird: Since we've changed types, reordered members, done alignment
265 paddings and more, VGA_STATE_COMMON was added directly to the
266 struct to make it more readable and easier to handle. */
267
268struct VGAState;
269typedef int FNGETBPP(struct VGAState *s);
270typedef void FNGETOFFSETS(struct VGAState *s, uint32_t *pline_offset, uint32_t *pstart_addr, uint32_t *pline_compare);
271typedef void FNGETRESOLUTION(struct VGAState *s, int *pwidth, int *pheight);
272typedef unsigned int FNRGBTOPIXEL(unsigned int r, unsigned int g, unsigned b);
273typedef void FNCURSORINVALIDATE(struct VGAState *s);
274typedef void FNCURSORDRAWLINE(struct VGAState *s, uint8_t *d, int y);
275
276#endif /* VBOX */
277
278#ifdef VBOX_WITH_VDMA
279typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
280#endif
281
282#ifdef VBOX_WITH_VIDEOHWACCEL
283#define VBOX_VHWA_MAX_PENDING_COMMANDS 1000
284
285typedef struct _VBOX_VHWA_PENDINGCMD
286{
287 RTLISTNODE Node;
288 VBOXVHWACMD RT_UNTRUSTED_VOLATILE_GUEST *pCommand;
289} VBOX_VHWA_PENDINGCMD;
290#endif
291
292
293/**
294 * The shared VGA state data.
295 */
296typedef struct VGAState
297{
298 uint32_t vram_size;
299 uint32_t latch;
300 uint8_t sr_index;
301 uint8_t sr[256];
302 uint8_t gr_index;
303 uint8_t gr[256];
304 uint8_t ar_index;
305 uint8_t ar[21];
306 int32_t ar_flip_flop;
307 uint8_t cr_index;
308 uint8_t cr[256]; /* CRT registers */
309 uint8_t msr; /* Misc Output Register */
310 uint8_t fcr; /* Feature Control Register */
311 uint8_t st00; /* status 0 */
312 uint8_t st01; /* status 1 */
313 uint8_t dac_state;
314 uint8_t dac_sub_index;
315 uint8_t dac_read_index;
316 uint8_t dac_write_index;
317 uint8_t dac_cache[3]; /* used when writing */
318 uint8_t palette[768];
319 int32_t bank_offset;
320 VGA_STATE_COMMON_BOCHS_VBE
321 /* display refresh support */
322 uint32_t font_offsets[2];
323 int32_t graphic_mode;
324 uint8_t shift_control;
325 uint8_t double_scan;
326 uint8_t padding1[2];
327 uint32_t line_offset;
328 uint32_t vga_addr_mask;
329 uint32_t padding1a;
330 uint32_t line_compare;
331 uint32_t start_addr;
332 uint32_t plane_updated;
333 uint8_t last_cw, last_ch;
334 uint8_t last_uline; \
335 bool last_blink; \
336 uint32_t last_width, last_height; /* in chars or pixels */
337 uint32_t last_scr_width, last_scr_height; /* in pixels */
338 uint32_t last_bpp;
339 uint8_t cursor_start, cursor_end;
340 bool last_cur_blink, last_chr_blink;
341 uint32_t cursor_offset;
342 /** hardware mouse cursor support */
343 uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32];
344 /** tell for each page if it has been updated since the last time */
345 uint32_t last_palette[256];
346 uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */
347
348 /** end-of-common-state-marker */
349 uint32_t u32Marker;
350
351 /** Refresh timer handle - HC. */
352 TMTIMERHANDLE hRefreshTimer;
353
354#ifdef VBOX_WITH_VMSVGA
355 VMSVGASTATE svga;
356#endif
357
358 /** The number of monitors. */
359 uint32_t cMonitors;
360 /** Current refresh timer interval. */
361 uint32_t cMilliesRefreshInterval;
362 /** Bitmap tracking dirty pages. */
363 uint64_t bmDirtyBitmap[VGA_VRAM_MAX / GUEST_PAGE_SIZE / 64];
364 /** Bitmap tracking which VGA memory pages in the 0xa0000-0xbffff region has
365 * been remapped to allow direct access.
366 * @note It's quite possible that mapping in the 0xb0000-0xbffff isn't possible,
367 * but we're playing safe and cover the whole VGA MMIO region here. */
368 uint32_t bmPageRemappedVGA;
369
370 /** Flag indicating that there are dirty bits. This is used to optimize the handler resetting. */
371 bool fHasDirtyBits;
372 /** Whether to render the guest VRAM to the framebuffer memory. False only for some LFB modes. */
373 bool fRenderVRAM;
374 /** Whether 3D is enabled for the VM. */
375 bool f3DEnabled;
376 /** Set if state has been restored. */
377 bool fStateLoaded;
378 /** Flag whether to expose the legacy VGA interface to the guest. */
379 bool fLegacyVgaEnabled;
380#ifdef VBOX_WITH_VMSVGA
381 /* Whether the SVGA emulation is enabled or not. */
382 bool fVMSVGAEnabled;
383 bool fVMSVGA10;
384 bool fVMSVGAPciId;
385 bool fVMSVGAPciBarLayout;
386 /** Flag whether the SVGA3 interface is exposed to the guest. */
387 bool fVmSvga3;
388#else
389 bool afPadding4[5];
390#endif
391
392 struct {
393 uint32_t u32Padding1;
394 uint32_t iVRAM;
395#ifdef VBOX_WITH_VMSVGA
396 uint32_t iIO;
397 uint32_t iFIFO;
398#endif
399 } pciRegions;
400
401 /** The physical address the VRAM was assigned. */
402 RTGCPHYS GCPhysVRAM;
403 /** The critical section protect the instance data. */
404 PDMCRITSECT CritSect;
405
406 /* Keep track of ring 0 latched accesses to the VGA MMIO memory. */
407 uint64_t u64LastLatchedAccess;
408 uint32_t cLatchAccesses;
409 uint16_t uMaskLatchAccess;
410 uint16_t iMask;
411
412#ifdef VBE_BYTEWISE_IO
413 /** VBE read/write data/index flags */
414 uint8_t fReadVBEData;
415 uint8_t fWriteVBEData;
416 uint8_t fReadVBEIndex;
417 uint8_t fWriteVBEIndex;
418 /** VBE write data/index one byte buffer */
419 uint8_t cbWriteVBEData;
420 uint8_t cbWriteVBEIndex;
421 /** VBE Extra Data write address one byte buffer */
422 uint8_t cbWriteVBEExtraAddress;
423 uint8_t Padding5;
424#endif
425
426 /** Retrace emulation state */
427 bool fRealRetrace;
428 bool Padding6[HC_ARCH_BITS == 64 ? 7 : 3];
429 vga_retrace_s retrace_state;
430
431#ifdef VBOX_WITH_HGSMI
432 /** Base port in the assigned PCI I/O space. */
433 RTIOPORT IOPortBase;
434# ifdef VBOX_WITH_WDDM
435 uint8_t Padding10[2];
436 /** Specifies guest driver caps, i.e. whether it can handle IRQs from the
437 * adapter, the way it can handle async HGSMI command completion, etc. */
438 uint32_t fGuestCaps;
439 uint32_t fScanLineCfg;
440 uint32_t Padding11;
441# else
442 uint8_t Padding11[14];
443# endif
444
445 /** The critical section serializes the HGSMI IRQ setting/clearing. */
446 PDMCRITSECT CritSectIRQ;
447 /** VBVARaiseIRQ flags which were set when the guest was still processing previous IRQ. */
448 uint32_t fu32PendingGuestFlags;
449 uint32_t Padding12;
450#endif /* VBOX_WITH_HGSMI */
451
452 PDMLED Led3D;
453
454 struct {
455 volatile uint32_t cPending;
456 uint32_t Padding1;
457 union
458 {
459 RTLISTNODE PendingList;
460 /* make sure the structure sized cross different contexts correctly */
461 struct
462 {
463 R3PTRTYPE(void *) dummy1;
464 R3PTRTYPE(void *) dummy2;
465 } dummy;
466 };
467 } pendingVhwaCommands;
468
469 /** The MMIO handle of the legacy graphics buffer/regs at 0xa0000-0xbffff. */
470 PGMMMIO2HANDLE hMmioLegacy;
471
472 /** @name I/O ports for range 0x3c0-3cf.
473 * @{ */
474 IOMIOPORTHANDLE hIoPortAr;
475 IOMIOPORTHANDLE hIoPortMsrSt00;
476 IOMIOPORTHANDLE hIoPort3c3;
477 IOMIOPORTHANDLE hIoPortSr;
478 IOMIOPORTHANDLE hIoPortDac;
479 IOMIOPORTHANDLE hIoPortPos;
480 IOMIOPORTHANDLE hIoPortGr;
481 /** @} */
482
483 /** @name I/O ports for MDA 0x3b0-0x3bf (sparse)
484 * @{ */
485 IOMIOPORTHANDLE hIoPortMdaCrt;
486 IOMIOPORTHANDLE hIoPortMdaFcrSt;
487 /** @} */
488
489 /** @name I/O ports for CGA 0x3d0-0x3df (sparse)
490 * @{ */
491 IOMIOPORTHANDLE hIoPortCgaCrt;
492 IOMIOPORTHANDLE hIoPortCgaFcrSt;
493 /** @} */
494
495#ifdef VBOX_WITH_HGSMI
496 /** @name I/O ports for HGSMI 0x3b0-03b3 and 0x3d0-03d3 (ring-3 only)
497 * @{ */
498 IOMIOPORTHANDLE hIoPortHgsmiHost;
499 IOMIOPORTHANDLE hIoPortHgsmiGuest;
500 /** @} */
501#endif
502
503 /** @name I/O ports for Boch VBE 0x1ce-0x1cf
504 * @{ */
505 IOMIOPORTHANDLE hIoPortVbeIndex;
506 IOMIOPORTHANDLE hIoPortVbeData;
507 /** @} */
508
509 /** The BIOS printf I/O port. */
510 IOMIOPORTHANDLE hIoPortBios;
511 /** The VBE extra data I/O port. */
512 IOMIOPORTHANDLE hIoPortVbeExtra;
513 /** The logo command I/O port. */
514 IOMIOPORTHANDLE hIoPortCmdLogo;
515
516#ifdef VBOX_WITH_VMSVGA
517 /** VMSVGA: I/O port PCI region. */
518 IOMIOPORTHANDLE hIoPortVmSvga;
519 /** VMSVGA3: MMIO PCI region for the registers. */
520 IOMMMIOHANDLE hMmioSvga3;
521 /** VMSVGA: The MMIO2 handle of the FIFO PCI region. */
522 PGMMMIO2HANDLE hMmio2VmSvgaFifo;
523#endif
524 /** The MMIO2 handle of the VRAM. */
525 PGMMMIO2HANDLE hMmio2VRam;
526
527 STAMPROFILE StatRZMemoryRead;
528 STAMPROFILE StatR3MemoryRead;
529 STAMPROFILE StatRZMemoryWrite;
530 STAMPROFILE StatR3MemoryWrite;
531 STAMCOUNTER StatMapPage; /**< Counts IOMMmioMapMmio2Page calls. */
532 STAMCOUNTER StatMapReset; /**< Counts IOMMmioResetRegion calls. */
533 STAMCOUNTER StatUpdateDisp; /**< Counts vgaPortUpdateDisplay calls. */
534#ifdef VBOX_WITH_HGSMI
535 STAMCOUNTER StatHgsmiMdaCgaAccesses;
536#endif
537} VGAState;
538#ifdef VBOX
539/** VGA state. */
540typedef VGAState VGASTATE;
541/** Pointer to the VGA state. */
542typedef VGASTATE *PVGASTATE;
543AssertCompileMemberAlignment(VGASTATE, bank_offset, 8);
544AssertCompileMemberAlignment(VGASTATE, font_offsets, 8);
545AssertCompileMemberAlignment(VGASTATE, last_ch_attr, 8);
546AssertCompileMemberAlignment(VGASTATE, u32Marker, 8);
547AssertCompile(sizeof(uint64_t)/*bmPageMapBitmap*/ >= (_64K / GUEST_PAGE_SIZE / 8));
548#endif
549
550
551/**
552 * The VGA state data for ring-3 context.
553 */
554typedef struct VGASTATER3
555{
556 R3PTRTYPE(uint8_t *) pbVRam;
557 R3PTRTYPE(FNGETBPP *) get_bpp;
558 R3PTRTYPE(FNGETOFFSETS *) get_offsets;
559 R3PTRTYPE(FNGETRESOLUTION *) get_resolution;
560 R3PTRTYPE(FNRGBTOPIXEL *) rgb_to_pixel;
561 R3PTRTYPE(FNCURSORINVALIDATE *) cursor_invalidate;
562 R3PTRTYPE(FNCURSORDRAWLINE *) cursor_draw_line;
563
564 /** Pointer to the device instance.
565 * @note Only for getting our bearings in interface methods. */
566 PPDMDEVINSR3 pDevIns;
567#ifdef VBOX_WITH_HGSMI
568 R3PTRTYPE(PHGSMIINSTANCE) pHGSMI;
569#endif
570#ifdef VBOX_WITH_VDMA
571 R3PTRTYPE(PVBOXVDMAHOST) pVdma;
572#endif
573
574 /** LUN\#0: The display port base interface. */
575 PDMIBASE IBase;
576 /** LUN\#0: The display port interface. */
577 PDMIDISPLAYPORT IPort;
578#ifdef VBOX_WITH_HGSMI
579 /** LUN\#0: VBVA callbacks interface */
580 PDMIDISPLAYVBVACALLBACKS IVBVACallbacks;
581#endif
582 /** Status LUN: Leds interface. */
583 PDMILEDPORTS ILeds;
584
585 /** Pointer to base interface of the driver. */
586 R3PTRTYPE(PPDMIBASE) pDrvBase;
587 /** Pointer to display connector interface of the driver. */
588 R3PTRTYPE(PPDMIDISPLAYCONNECTOR) pDrv;
589
590 /** Status LUN: Partner of ILeds. */
591 R3PTRTYPE(PPDMILEDCONNECTORS) pLedsConnector;
592
593#ifdef VBOX_WITH_VMSVGA
594 /** The VMSVGA ring-3 state. */
595 VMSVGASTATER3 svga;
596#endif
597
598 /** The VGA BIOS ROM data. */
599 R3PTRTYPE(uint8_t *) pbVgaBios;
600 /** The size of the VGA BIOS ROM. */
601 uint64_t cbVgaBios;
602 /** The name of the VGA BIOS ROM file. */
603 R3PTRTYPE(char *) pszVgaBiosFile;
604
605 /** @name Logo data
606 * @{ */
607 /** Current logo data offset. */
608 uint32_t offLogoData;
609 /** The size of the BIOS logo data. */
610 uint32_t cbLogo;
611 /** Current logo command. */
612 uint16_t LogoCommand;
613 /** Bitmap width. */
614 uint16_t cxLogo;
615 /** Bitmap height. */
616 uint16_t cyLogo;
617 /** Bitmap planes. */
618 uint16_t cLogoPlanes;
619 /** Bitmap depth. */
620 uint16_t cLogoBits;
621 /** Bitmap compression. */
622 uint16_t LogoCompression;
623 /** Bitmap colors used. */
624 uint16_t cLogoUsedColors;
625 /** Palette size. */
626 uint16_t cLogoPalEntries;
627 /** Clear screen flag. */
628 uint8_t fLogoClearScreen;
629 bool fBootMenuInverse;
630 uint8_t Padding8[6];
631 /** Palette data. */
632 uint32_t au32LogoPalette[256];
633 /** The BIOS logo data. */
634 R3PTRTYPE(uint8_t *) pbLogo;
635 /** The name of the logo file. */
636 R3PTRTYPE(char *) pszLogoFile;
637 /** Bitmap image data. */
638 R3PTRTYPE(uint8_t *) pbLogoBitmap;
639 /** @} */
640
641 /** @name VBE extra data (modes)
642 * @{ */
643 /** The VBE BIOS extra data. */
644 R3PTRTYPE(uint8_t *) pbVBEExtraData;
645 /** The size of the VBE BIOS extra data. */
646 uint16_t cbVBEExtraData;
647 /** The VBE BIOS current memory address. */
648 uint16_t u16VBEExtraAddress;
649 uint16_t Padding7[2];
650 /** @} */
651
652} VGASTATER3;
653/** Pointer to the ring-3 VGA state. */
654typedef VGASTATER3 *PVGASTATER3;
655
656
657/**
658 * The VGA state data for ring-0 context.
659 */
660typedef struct VGASTATER0
661{
662 /** The R0 vram pointer. */
663 R0PTRTYPE(uint8_t *) pbVRam;
664#ifdef VBOX_WITH_VMSVGA
665 /** The VMSVGA ring-0 state. */
666 VMSVGASTATER0 svga;
667#endif
668} VGASTATER0;
669/** Pointer to the ring-0 VGA state. */
670typedef VGASTATER0 *PVGASTATER0;
671
672
673/**
674 * The VGA state data for raw-mode context.
675 */
676typedef struct VGASTATERC
677{
678 /** Pointer to the RC vram mapping. */
679 RCPTRTYPE(uint8_t *) pbVRam;
680} VGASTATERC;
681/** Pointer to the raw-mode VGA state. */
682typedef VGASTATERC *PVGASTATERC;
683
684
685/** The VGA state for the current context. */
686typedef CTX_SUFF(VGASTATE) VGASTATECC;
687/** Pointer to the VGA state for the current context. */
688typedef CTX_SUFF(PVGASTATE) PVGASTATECC;
689
690
691
692/** VBE Extra Data. */
693typedef VBEHeader VBEHEADER;
694/** Pointer to the VBE Extra Data. */
695typedef VBEHEADER *PVBEHEADER;
696
697#if !defined(VBOX) || defined(IN_RING3)
698static inline int c6_to_8(int v)
699{
700 int b;
701 v &= 0x3f;
702 b = v & 1;
703 return (v << 2) | (b << 1) | b;
704}
705#endif /* !VBOX || IN_RING3 */
706
707
708#ifdef VBOX_WITH_HGSMI
709int VBVAInit(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
710void VBVADestroy(PVGASTATECC pThisCC);
711int VBVAUpdateDisplay(PVGASTATE pThis, PVGASTATECC pThisCC);
712void VBVAReset(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
713void VBVAOnVBEChanged(PVGASTATE pThis, PVGASTATECC pThisCC);
714void VBVAOnResume(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
715
716bool VBVAIsPaused(PVGASTATECC pThisCC);
717#ifdef UNUSED_FUNCTION
718bool VBVAIsEnabled(PVGASTATECC pThisCC);
719#endif
720
721void VBVARaiseIrq(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t fFlags);
722
723int VBVAInfoScreen(PVGASTATE pThis, const VBVAINFOSCREEN RT_UNTRUSTED_VOLATILE_HOST *pScreen);
724#ifdef UNUSED_FUNCTION
725int VBVAGetInfoViewAndScreen(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t u32ViewIndex,
726 VBVAINFOVIEW *pView, VBVAINFOSCREEN *pScreen);
727#endif
728
729# ifdef VBOX_WITH_VIDEOHWACCEL
730DECLCALLBACK(int) vbvaR3VHWACommandCompleteAsync(PPDMIDISPLAYVBVACALLBACKS pInterface,
731 VBOXVHWACMD RT_UNTRUSTED_VOLATILE_GUEST *pCmd);
732int vbvaVHWAConstruct(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
733
734void vbvaTimerCb(PPDMDEVINS pDevIns, PVGASTATE pThis, PVGASTATECC pThisCC);
735
736int vboxVBVASaveStatePrep(PPDMDEVINS pDevIns);
737int vboxVBVASaveStateDone(PPDMDEVINS pDevIns);
738# endif
739
740int vboxVBVASaveStateExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM);
741int vboxVBVALoadStateExec(PPDMDEVINS pDevIns, PSSMHANDLE pSSM, uint32_t u32Version);
742int vboxVBVALoadStateDone(PPDMDEVINS pDevIns);
743
744DECLCALLBACK(int) vbvaR3PortSendModeHint(PPDMIDISPLAYPORT pInterface, uint32_t cx, uint32_t cy, uint32_t cBPP,
745 uint32_t cDisplay, uint32_t dx, uint32_t dy, uint32_t fEnabled, uint32_t fNotifyGuest);
746
747# ifdef VBOX_WITH_VDMA
748typedef struct VBOXVDMAHOST *PVBOXVDMAHOST;
749int vboxVDMAConstruct(PVGASTATE pThis, PVGASTATECC pThisCC, uint32_t cPipeElements);
750void vboxVDMADestruct(PVBOXVDMAHOST pVdma);
751void vboxVDMAReset(PVBOXVDMAHOST pVdma);
752void vboxVDMAControl(PVBOXVDMAHOST pVdma, VBOXVDMA_CTL RT_UNTRUSTED_VOLATILE_GUEST *pCmd, uint32_t cbCmd);
753void vboxVDMACommand(PVBOXVDMAHOST pVdma, VBOXVDMACBUF_DR RT_UNTRUSTED_VOLATILE_GUEST *pCmd, uint32_t cbCmd);
754int vboxVDMASaveStateExecPrep(struct VBOXVDMAHOST *pVdma);
755int vboxVDMASaveStateExecDone(struct VBOXVDMAHOST *pVdma);
756int vboxVDMASaveStateExecPerform(PCPDMDEVHLPR3 pHlp, struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM);
757int vboxVDMASaveLoadExecPerform(PCPDMDEVHLPR3 pHlp, struct VBOXVDMAHOST *pVdma, PSSMHANDLE pSSM, uint32_t u32Version);
758int vboxVDMASaveLoadDone(struct VBOXVDMAHOST *pVdma);
759# endif /* VBOX_WITH_VDMA */
760
761#endif /* VBOX_WITH_HGSMI */
762
763# ifdef VBOX_WITH_VMSVGA
764int vgaR3UnregisterVRAMHandler(PPDMDEVINS pDevIns, PVGASTATE pThis);
765int vgaR3RegisterVRAMHandler(PPDMDEVINS pDevIns, PVGASTATE pThis, uint64_t cbFrameBuffer);
766int vgaR3UpdateDisplay(PVGASTATE pThis, unsigned xStart, unsigned yStart, unsigned width, unsigned height);
767# endif
768
769#ifndef VBOX
770void vga_common_init(VGAState *s, DisplayState *ds, uint8_t *vga_ram_base,
771 unsigned long vga_ram_offset, int vga_ram_size);
772uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
773void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
774void vga_invalidate_scanlines(VGAState *s, int y1, int y2);
775
776void vga_draw_cursor_line_8(uint8_t *d1, const uint8_t *src1,
777 int poffset, int w,
778 unsigned int color0, unsigned int color1,
779 unsigned int color_xor);
780void vga_draw_cursor_line_16(uint8_t *d1, const uint8_t *src1,
781 int poffset, int w,
782 unsigned int color0, unsigned int color1,
783 unsigned int color_xor);
784void vga_draw_cursor_line_32(uint8_t *d1, const uint8_t *src1,
785 int poffset, int w,
786 unsigned int color0, unsigned int color1,
787 unsigned int color_xor);
788
789extern const uint8_t sr_mask[8];
790extern const uint8_t gr_mask[16];
791#endif /* !VBOX */
792
793#endif /* !VBOX_INCLUDED_SRC_Graphics_DevVGA_h */
794
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