VirtualBox

source: vbox/trunk/include/VBox/dis.h@ 8149

Last change on this file since 8149 was 8149, checked in by vboxsync, 16 years ago

More 64 bits disassembler updates
  • Property svn:eol-style set to native
  • Property svn:keywords set to Author Date Id Revision
File size: 21.3 KB
Line 
1/** @file
2 * DIS - The VirtualBox Disassembler.
3 */
4
5/*
6 * Copyright (C) 2006-2007 innotek GmbH
7 *
8 * This file is part of VirtualBox Open Source Edition (OSE), as
9 * available from http://www.virtualbox.org. This file is free software;
10 * you can redistribute it and/or modify it under the terms of the GNU
11 * General Public License (GPL) as published by the Free Software
12 * Foundation, in version 2 as it comes in the "COPYING" file of the
13 * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
14 * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
15 *
16 * The contents of this file may alternatively be used under the terms
17 * of the Common Development and Distribution License Version 1.0
18 * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
19 * VirtualBox OSE distribution, in which case the provisions of the
20 * CDDL are applicable instead of those of the GPL.
21 *
22 * You may elect to license modified versions of this file under the
23 * terms and conditions of either the GPL or the CDDL or both.
24 */
25
26#ifndef ___VBox_disasm_h
27#define ___VBox_disasm_h
28
29#include <VBox/cdefs.h>
30#include <VBox/types.h>
31#include <VBox/disopcode.h>
32
33#if defined(__L4ENV__)
34#include <setjmp.h>
35#endif
36
37__BEGIN_DECLS
38
39
40/** CPU mode flags (DISCPUSTATE::mode).
41 * @{
42 */
43typedef enum
44{
45 CPUMODE_16BIT = 1,
46 CPUMODE_32BIT = 2,
47 CPUMODE_64BIT = 3,
48 /** hack forcing the size of the enum to 32-bits. */
49 CPUMODE_MAKE_32BIT_HACK = 0x7fffffff
50} DISCPUMODE;
51/** @} */
52
53/** Prefix byte flags
54 * @{
55 */
56#define PREFIX_NONE 0
57/** non-default address size. */
58#define PREFIX_ADDRSIZE 1
59/** non-default operand size. */
60#define PREFIX_OPSIZE 2
61/** lock prefix. */
62#define PREFIX_LOCK 4
63/** segment prefix. */
64#define PREFIX_SEG 8
65/** rep(e) prefix (not a prefix, but we'll treat is as one). */
66#define PREFIX_REP 16
67/** rep(e) prefix (not a prefix, but we'll treat is as one). */
68#define PREFIX_REPNE 32
69/** REX prefix (64 bits) */
70#define PREFIX_REX 64
71/** @} */
72
73/** 64 bits prefix byte flags
74 * @{
75 */
76#define PREFIX_REX_OP_2_FLAGS(a) (a - OP_REX)
77#define PREFIX_REX_FLAGS PREFIX_REX_OP_2_FLAGS(OP_REX)
78#define PREFIX_REX_FLAGS_B PREFIX_REX_OP_2_FLAGS(OP_REX_B)
79#define PREFIX_REX_FLAGS_X PREFIX_REX_OP_2_FLAGS(OP_REX_X)
80#define PREFIX_REX_FLAGS_XB PREFIX_REX_OP_2_FLAGS(OP_REX_XB)
81#define PREFIX_REX_FLAGS_R PREFIX_REX_OP_2_FLAGS(OP_REX_R)
82#define PREFIX_REX_FLAGS_RB PREFIX_REX_OP_2_FLAGS(OP_REX_RB)
83#define PREFIX_REX_FLAGS_RX PREFIX_REX_OP_2_FLAGS(OP_REX_RX)
84#define PREFIX_REX_FLAGS_RXB PREFIX_REX_OP_2_FLAGS(OP_REX_RXB)
85#define PREFIX_REX_FLAGS_W PREFIX_REX_OP_2_FLAGS(OP_REX_W)
86#define PREFIX_REX_FLAGS_WB PREFIX_REX_OP_2_FLAGS(OP_REX_WB)
87#define PREFIX_REX_FLAGS_WX PREFIX_REX_OP_2_FLAGS(OP_REX_WX)
88#define PREFIX_REX_FLAGS_WXB PREFIX_REX_OP_2_FLAGS(OP_REX_WXB)
89#define PREFIX_REX_FLAGS_WR PREFIX_REX_OP_2_FLAGS(OP_REX_WR)
90#define PREFIX_REX_FLAGS_WRB PREFIX_REX_OP_2_FLAGS(OP_REX_WRB)
91#define PREFIX_REX_FLAGS_WRX PREFIX_REX_OP_2_FLAGS(OP_REX_WRX)
92#define PREFIX_REX_FLAGS_WRXB PREFIX_REX_OP_2_FLAGS(OP_REX_WRXB)
93/** @} */
94
95/**
96 * Operand type.
97 */
98#define OPTYPE_INVALID RT_BIT(0)
99#define OPTYPE_HARMLESS RT_BIT(1)
100#define OPTYPE_CONTROLFLOW RT_BIT(2)
101#define OPTYPE_POTENTIALLY_DANGEROUS RT_BIT(3)
102#define OPTYPE_DANGEROUS RT_BIT(4)
103#define OPTYPE_PORTIO RT_BIT(5)
104#define OPTYPE_PRIVILEGED RT_BIT(6)
105#define OPTYPE_PRIVILEGED_NOTRAP RT_BIT(7)
106#define OPTYPE_UNCOND_CONTROLFLOW RT_BIT(8)
107#define OPTYPE_RELATIVE_CONTROLFLOW RT_BIT(9)
108#define OPTYPE_COND_CONTROLFLOW RT_BIT(10)
109#define OPTYPE_INTERRUPT RT_BIT(11)
110#define OPTYPE_ILLEGAL RT_BIT(12)
111#define OPTYPE_RRM_DANGEROUS RT_BIT(14) /**< Some additional dangerouse ones when recompiling raw r0. */
112#define OPTYPE_RRM_DANGEROUS_16 RT_BIT(15) /**< Some additional dangerouse ones when recompiling 16-bit raw r0. */
113#define OPTYPE_RRM_MASK (OPTYPE_RRM_DANGEROUS | OPTYPE_RRM_DANGEROUS_16)
114#define OPTYPE_INHIBIT_IRQS RT_BIT(16) /**< Will or can inhibit irqs (sti, pop ss, mov ss) */
115#define OPTYPE_PORTIO_READ RT_BIT(17)
116#define OPTYPE_PORTIO_WRITE RT_BIT(18)
117#define OPTYPE_INVALID_64 RT_BIT(19) /**< Invalid in 64 bits mode */
118#define OPTYPE_ONLY_64 RT_BIT(20) /**< Only valid in 64 bits mode */
119#define OPTYPE_DEFAULT_64_OP_SIZE RT_BIT(21) /**< Default 64 bits operand size */
120#define OPTYPE_FORCED_64_OP_SIZE RT_BIT(22) /**< Forced 64 bits operand size; regardless of prefix bytes */
121#define OPTYPE_ALL (0xffffffff)
122
123/** Parameter usage flags.
124 * @{
125 */
126#define USE_BASE RT_BIT_64(0)
127#define USE_INDEX RT_BIT_64(1)
128#define USE_SCALE RT_BIT_64(2)
129#define USE_REG_GEN8 RT_BIT_64(3)
130#define USE_REG_GEN16 RT_BIT_64(4)
131#define USE_REG_GEN32 RT_BIT_64(5)
132#define USE_REG_GEN64 RT_BIT_64(6)
133#define USE_REG_FP RT_BIT_64(7)
134#define USE_REG_MMX RT_BIT_64(8)
135#define USE_REG_XMM RT_BIT_64(9)
136#define USE_REG_CR RT_BIT_64(10)
137#define USE_REG_DBG RT_BIT_64(11)
138#define USE_REG_SEG RT_BIT_64(12)
139#define USE_REG_TEST RT_BIT_64(13)
140#define USE_DISPLACEMENT8 RT_BIT_64(14)
141#define USE_DISPLACEMENT16 RT_BIT_64(15)
142#define USE_DISPLACEMENT32 RT_BIT_64(16)
143#define USE_IMMEDIATE8 RT_BIT_64(17)
144#define USE_IMMEDIATE8_REL RT_BIT_64(18)
145#define USE_IMMEDIATE16 RT_BIT_64(19)
146#define USE_IMMEDIATE16_REL RT_BIT_64(20)
147#define USE_IMMEDIATE32 RT_BIT_64(21)
148#define USE_IMMEDIATE32_REL RT_BIT_64(22)
149#define USE_IMMEDIATE64 RT_BIT_64(23)
150#define USE_IMMEDIATE_ADDR_0_32 RT_BIT_64(24)
151#define USE_IMMEDIATE_ADDR_16_32 RT_BIT_64(25)
152#define USE_IMMEDIATE_ADDR_0_16 RT_BIT_64(26)
153#define USE_IMMEDIATE_ADDR_16_16 RT_BIT_64(27)
154/** DS:ESI */
155#define USE_POINTER_DS_BASED RT_BIT_64(28)
156/** ES:EDI */
157#define USE_POINTER_ES_BASED RT_BIT_64(29)
158#define USE_IMMEDIATE16_SX8 RT_BIT_64(30)
159#define USE_IMMEDIATE32_SX8 RT_BIT_64(31)
160
161#define USE_IMMEDIATE (USE_IMMEDIATE8|USE_IMMEDIATE16|USE_IMMEDIATE32|USE_IMMEDIATE64|USE_IMMEDIATE8_REL|USE_IMMEDIATE16_REL|USE_IMMEDIATE32_REL|USE_IMMEDIATE_ADDR_0_32|USE_IMMEDIATE_ADDR_16_32|USE_IMMEDIATE_ADDR_0_16|USE_IMMEDIATE_ADDR_16_16|USE_IMMEDIATE16_SX8|USE_IMMEDIATE32_SX8)
162
163/** @} */
164
165/** index in {"RAX", "RCX", "RDX", "RBX", "RSP", "RBP", "RSI", "RDI", "R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15"}
166 * @{
167 */
168#define USE_REG_RAX 0
169#define USE_REG_RCX 1
170#define USE_REG_RDX 2
171#define USE_REG_RBX 3
172#define USE_REG_RSP 4
173#define USE_REG_RBP 5
174#define USE_REG_RSI 6
175#define USE_REG_RDI 7
176#define USE_REG_R8 8
177#define USE_REG_R9 9
178#define USE_REG_R10 10
179#define USE_REG_R11 11
180#define USE_REG_R12 12
181#define USE_REG_R13 13
182#define USE_REG_R14 14
183#define USE_REG_R15 15
184/** @} */
185
186/** index in {"EAX", "ECX", "EDX", "EBX", "ESP", "EBP", "ESI", "EDI"}
187 * @{
188 */
189#define USE_REG_EAX 0
190#define USE_REG_ECX 1
191#define USE_REG_EDX 2
192#define USE_REG_EBX 3
193#define USE_REG_ESP 4
194#define USE_REG_EBP 5
195#define USE_REG_ESI 6
196#define USE_REG_EDI 7
197/** @} */
198/** index in {"AX", "CX", "DX", "BX", "SP", "BP", "SI", "DI"}
199 * @{
200 */
201#define USE_REG_AX 0
202#define USE_REG_CX 1
203#define USE_REG_DX 2
204#define USE_REG_BX 3
205#define USE_REG_SP 4
206#define USE_REG_BP 5
207#define USE_REG_SI 6
208#define USE_REG_DI 7
209/** @} */
210
211/** index in {"AL", "CL", "DL", "BL", "AH", "CH", "DH", "BH"}
212 * @{
213 */
214#define USE_REG_AL 0
215#define USE_REG_CL 1
216#define USE_REG_DL 2
217#define USE_REG_BL 3
218#define USE_REG_AH 4
219#define USE_REG_CH 5
220#define USE_REG_DH 6
221#define USE_REG_BH 7
222/** @} */
223
224/** index in {ES, CS, SS, DS, FS, GS}
225 * @{
226 */
227#define USE_REG_ES 0
228#define USE_REG_CS 1
229#define USE_REG_SS 2
230#define USE_REG_DS 3
231#define USE_REG_FS 4
232#define USE_REG_GS 5
233/** @} */
234
235#define USE_REG_FP0 0
236#define USE_REG_FP1 1
237#define USE_REG_FP2 2
238#define USE_REG_FP3 3
239#define USE_REG_FP4 4
240#define USE_REG_FP5 5
241#define USE_REG_FP6 6
242#define USE_REG_FP7 7
243
244#define USE_REG_CR0 0
245#define USE_REG_CR1 1
246#define USE_REG_CR2 2
247#define USE_REG_CR3 3
248#define USE_REG_CR4 4
249
250#define USE_REG_DR0 0
251#define USE_REG_DR1 1
252#define USE_REG_DR2 2
253#define USE_REG_DR3 3
254#define USE_REG_DR4 4
255#define USE_REG_DR5 5
256#define USE_REG_DR6 6
257#define USE_REG_DR7 7
258
259#define USE_REG_MMX0 0
260#define USE_REG_MMX1 1
261#define USE_REG_MMX2 2
262#define USE_REG_MMX3 3
263#define USE_REG_MMX4 4
264#define USE_REG_MMX5 5
265#define USE_REG_MMX6 6
266#define USE_REG_MMX7 7
267
268#define USE_REG_XMM0 0
269#define USE_REG_XMM1 1
270#define USE_REG_XMM2 2
271#define USE_REG_XMM3 3
272#define USE_REG_XMM4 4
273#define USE_REG_XMM5 5
274#define USE_REG_XMM6 6
275#define USE_REG_XMM7 7
276
277/** Used by DISQueryParamVal & EMIQueryParamVal
278 * @{
279 */
280#define PARAM_VAL8 RT_BIT(0)
281#define PARAM_VAL16 RT_BIT(1)
282#define PARAM_VAL32 RT_BIT(2)
283#define PARAM_VAL64 RT_BIT(3)
284#define PARAM_VALFARPTR16 RT_BIT(4)
285#define PARAM_VALFARPTR32 RT_BIT(5)
286
287#define PARMTYPE_REGISTER 1
288#define PARMTYPE_ADDRESS 2
289#define PARMTYPE_IMMEDIATE 3
290
291typedef struct
292{
293 uint32_t type;
294 uint32_t size;
295 uint64_t flags;
296
297 union
298 {
299 uint8_t val8;
300 uint16_t val16;
301 uint32_t val32;
302 uint64_t val64;
303
304 struct
305 {
306 uint16_t sel;
307 uint32_t offset;
308 } farptr;
309 } val;
310
311} OP_PARAMVAL;
312/** Pointer to opcode parameter value. */
313typedef OP_PARAMVAL *POP_PARAMVAL;
314
315typedef enum
316{
317 PARAM_DEST,
318 PARAM_SOURCE
319} PARAM_TYPE;
320
321/** @} */
322
323/**
324 * Operand Parameter.
325 */
326typedef struct _OP_PARAMETER
327{
328 int param;
329 uint64_t parval;
330 char szParam[32];
331
332 int32_t disp8, disp16, disp32;
333
334 uint32_t size;
335
336 uint64_t flags;
337
338 union
339 {
340 uint32_t reg_gen8;
341 uint32_t reg_gen16;
342 uint32_t reg_gen32;
343 uint64_t reg_gen64;
344 /** ST(0) - ST(7) */
345 uint32_t reg_fp;
346 /** MMX0 - MMX7 */
347 uint32_t reg_mmx;
348 /** XMM0 - XMM7 */
349 uint32_t reg_xmm;
350 /** {ES, CS, SS, DS, FS, GS} */
351 uint32_t reg_seg;
352 /** TR0-TR7 (?) */
353 uint32_t reg_test;
354 /** CR0-CR4 */
355 uint64_t reg_ctrl;
356 /** DR0-DR7 */
357 uint32_t reg_dbg;
358 } base;
359 union
360 {
361 uint32_t reg_gen;
362 } index;
363
364 /** 2, 4 or 8. */
365 uint32_t scale;
366
367} OP_PARAMETER;
368/** Pointer to opcode parameter. */
369typedef OP_PARAMETER *POP_PARAMETER;
370/** Pointer to opcode parameter. */
371typedef const OP_PARAMETER *PCOP_PARAMETER;
372
373
374struct _OPCODE;
375/** Pointer to opcode. */
376typedef struct _OPCODE *POPCODE;
377/** Pointer to const opcode. */
378typedef const struct _OPCODE *PCOPCODE;
379
380typedef DECLCALLBACK(int) FN_DIS_READBYTES(RTUINTPTR pSrc, uint8_t *pDest, uint32_t size, void *pvUserdata);
381typedef FN_DIS_READBYTES *PFN_DIS_READBYTES;
382
383/* forward decl */
384struct _DISCPUSTATE;
385/** Pointer to the disassembler CPU state. */
386typedef struct _DISCPUSTATE *PDISCPUSTATE;
387
388/** Parser callback.
389 * @remark no DECLCALLBACK() here because it's considered to be internal (really, I'm too lazy to update all the functions). */
390typedef unsigned FNDISPARSE(RTUINTPTR pu8CodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu);
391typedef FNDISPARSE *PFNDISPARSE;
392
393typedef struct _DISCPUSTATE
394{
395 /* Global setting */
396 DISCPUMODE mode;
397
398 /* Per instruction prefix settings */
399 uint32_t prefix;
400 /** segment prefix value. */
401 uint32_t prefix_seg;
402 /** rex prefix value (64 bits only */
403 uint32_t prefix_rex;
404 /** addressing mode (16 or 32 bits). (CPUMODE_*) */
405 DISCPUMODE addrmode;
406 /** operand mode (16 or 32 bits). (CPUMODE_*) */
407 DISCPUMODE opmode;
408
409 OP_PARAMETER param1;
410 OP_PARAMETER param2;
411 OP_PARAMETER param3;
412
413 /** ModRM byte. */
414 uint32_t ModRM;
415 /** scalar, index, base byte. */
416 uint32_t SIB;
417
418 int32_t disp;
419
420 /** First opcode byte of instruction. */
421 uint8_t opcode;
422 /** Last prefix byte (for SSE2 extension tables) */
423 uint8_t lastprefix;
424 RTUINTPTR opaddr;
425 uint32_t opsize;
426#ifndef DIS_CORE_ONLY
427 /** Opcode format string for current instruction. */
428 const char *pszOpcode;
429#endif
430
431 /** Internal: pointer to disassembly function table */
432 PFNDISPARSE *pfnDisasmFnTable;
433 /** Internal: instruction filter */
434 uint32_t uFilter;
435
436 /** Pointer to the current instruction. */
437 PCOPCODE pCurInstr;
438
439 void *apvUserData[3];
440
441 /** Optional read function */
442 PFN_DIS_READBYTES pfnReadBytes;
443#ifdef __L4ENV__
444 jmp_buf *pJumpBuffer;
445#endif /* __L4ENV__ */
446} DISCPUSTATE;
447
448/** Opcode. */
449#pragma pack(4)
450typedef struct _OPCODE
451{
452#ifndef DIS_CORE_ONLY
453 const char *pszOpcode;
454#endif
455 uint8_t idxParse1;
456 uint8_t idxParse2;
457 uint8_t idxParse3;
458 uint16_t opcode;
459 uint16_t param1;
460 uint16_t param2;
461 uint16_t param3;
462
463 uint32_t optype;
464} OPCODE;
465#pragma pack()
466
467
468/**
469 * Disassembles a code block.
470 *
471 * @returns VBox error code
472 * @param pCpu Pointer to cpu structure which have DISCPUSTATE::mode
473 * set correctly.
474 * @param pvCodeBlock Pointer to the strunction to disassemble.
475 * @param cbMax Maximum number of bytes to disassemble.
476 * @param pcbSize Where to store the size of the instruction.
477 * NULL is allowed.
478 *
479 *
480 * @todo Define output callback.
481 * @todo Using signed integers as sizes is a bit odd. There are still
482 * some GCC warnings about mixing signed and unsigend integers.
483 * @todo Need to extend this interface to include a code address so we
484 * can dissassemble GC code. Perhaps a new function is better...
485 * @remark cbMax isn't respected as a boundry. DISInstr() will read beyond cbMax.
486 * This means *pcbSize >= cbMax sometimes.
487 */
488DISDECL(int) DISBlock(PDISCPUSTATE pCpu, RTUINTPTR pvCodeBlock, unsigned cbMax, unsigned *pSize);
489
490/**
491 * Disassembles one instruction
492 *
493 * @returns VBox error code
494 * @param pCpu Pointer to cpu structure which have DISCPUSTATE::mode
495 * set correctly.
496 * @param pu8Instruction Pointer to the instrunction to disassemble.
497 * @param u32EipOffset Offset to add to instruction address to get the real virtual address
498 * @param pcbSize Where to store the size of the instruction.
499 * NULL is allowed.
500 * @param pszOutput Storage for disassembled instruction
501 *
502 * @todo Define output callback.
503 */
504DISDECL(int) DISInstr(PDISCPUSTATE pCpu, RTUINTPTR pu8Instruction, unsigned u32EipOffset, unsigned *pcbSize, char *pszOutput);
505
506/**
507 * Disassembles one instruction
508 *
509 * @returns VBox error code
510 * @param pCpu Pointer to cpu structure which have DISCPUSTATE::mode
511 * set correctly.
512 * @param pu8Instruction Pointer to the strunction to disassemble.
513 * @param u32EipOffset Offset to add to instruction address to get the real virtual address
514 * @param pcbSize Where to store the size of the instruction.
515 * NULL is allowed.
516 * @param pszOutput Storage for disassembled instruction
517 * @param uFilter Instruction type filter
518 *
519 * @todo Define output callback.
520 */
521DISDECL(int) DISInstrEx(PDISCPUSTATE pCpu, RTUINTPTR pu8Instruction, uint32_t u32EipOffset, uint32_t *pcbSize,
522 char *pszOutput, unsigned uFilter);
523
524/**
525 * Parses one instruction.
526 * The result is found in pCpu.
527 *
528 * @returns VBox error code
529 * @param pCpu Pointer to cpu structure which has DISCPUSTATE::mode set correctly.
530 * @param InstructionAddr Pointer to the instruction to parse.
531 * @param pcbInstruction Where to store the size of the instruction.
532 * NULL is allowed.
533 */
534DISDECL(int) DISCoreOne(PDISCPUSTATE pCpu, RTUINTPTR InstructionAddr, unsigned *pcbInstruction);
535
536/**
537 * Parses one guest instruction.
538 * The result is found in pCpu and pcbInstruction.
539 *
540 * @returns VBox status code.
541 * @param InstructionAddr Address of the instruction to decode. What this means
542 * is left to the pfnReadBytes function.
543 * @param enmCpuMode The CPU mode. CPUMODE_32BIT, CPUMODE_16BIT, or CPUMODE_64BIT.
544 * @param pfnReadBytes Callback for reading instruction bytes.
545 * @param pvUser User argument for the instruction reader. (Ends up in apvUserData[0].)
546 * @param pCpu Pointer to cpu structure. Will be initialized.
547 * @param pcbInstruction Where to store the size of the instruction.
548 * NULL is allowed.
549 */
550DISDECL(int) DISCoreOneEx(RTUINTPTR InstructionAddr, DISCPUMODE enmCpuMode, PFN_DIS_READBYTES pfnReadBytes, void *pvUser,
551 PDISCPUSTATE pCpu, unsigned *pcbInstruction);
552
553DISDECL(int) DISGetParamSize(PDISCPUSTATE pCpu, POP_PARAMETER pParam);
554DISDECL(int) DISDetectSegReg(PDISCPUSTATE pCpu, POP_PARAMETER pParam);
555DISDECL(uint8_t) DISQuerySegPrefixByte(PDISCPUSTATE pCpu);
556
557/**
558 * Returns the value of the parameter in pParam
559 *
560 * @returns VBox error code
561 * @param pCtx Exception structure pointer
562 * @param pCpu Pointer to cpu structure which have DISCPUSTATE::mode
563 * set correctly.
564 * @param pParam Pointer to the parameter to parse
565 * @param pParamVal Pointer to parameter value (OUT)
566 * @param parmtype Parameter type
567 *
568 * @note Currently doesn't handle FPU/XMM/MMX/3DNow! parameters correctly!!
569 *
570 */
571DISDECL(int) DISQueryParamVal(PCPUMCTXCORE pCtx, PDISCPUSTATE pCpu, POP_PARAMETER pParam, POP_PARAMVAL pParamVal, PARAM_TYPE parmtype);
572DISDECL(int) DISQueryParamRegPtr(PCPUMCTXCORE pCtx, PDISCPUSTATE pCpu, POP_PARAMETER pParam, void **ppReg, size_t *pcbSize);
573
574DISDECL(int) DISFetchReg8(PCPUMCTXCORE pCtx, unsigned reg8, uint8_t *pVal);
575DISDECL(int) DISFetchReg16(PCPUMCTXCORE pCtx, unsigned reg16, uint16_t *pVal);
576DISDECL(int) DISFetchReg32(PCPUMCTXCORE pCtx, unsigned reg32, uint32_t *pVal);
577DISDECL(int) DISFetchReg64(PCPUMCTXCORE pCtx, unsigned reg64, uint64_t *pVal);
578DISDECL(int) DISFetchRegSeg(PCPUMCTXCORE pCtx, unsigned sel, RTSEL *pVal);
579DISDECL(int) DISFetchRegSegEx(PCPUMCTXCORE pCtx, unsigned sel, RTSEL *pVal, PCPUMSELREGHID *ppSelHidReg);
580DISDECL(int) DISWriteReg8(PCPUMCTXCORE pRegFrame, unsigned reg8, uint8_t val8);
581DISDECL(int) DISWriteReg16(PCPUMCTXCORE pRegFrame, unsigned reg32, uint16_t val16);
582DISDECL(int) DISWriteReg32(PCPUMCTXCORE pRegFrame, unsigned reg32, uint32_t val32);
583DISDECL(int) DISWriteReg64(PCPUMCTXCORE pRegFrame, unsigned reg64, uint64_t val64);
584DISDECL(int) DISWriteRegSeg(PCPUMCTXCORE pCtx, unsigned sel, RTSEL val);
585DISDECL(int) DISPtrReg8(PCPUMCTXCORE pCtx, unsigned reg8, uint8_t **ppReg);
586DISDECL(int) DISPtrReg16(PCPUMCTXCORE pCtx, unsigned reg16, uint16_t **ppReg);
587DISDECL(int) DISPtrReg32(PCPUMCTXCORE pCtx, unsigned reg32, uint32_t **ppReg);
588DISDECL(int) DISPtrReg64(PCPUMCTXCORE pCtx, unsigned reg64, uint64_t **ppReg);
589
590__END_DECLS
591
592#endif
593
Note: See TracBrowser for help on using the repository browser.

© 2023 Oracle
Contact – Privacy policy – Terms of Use