[1] | 1 | /** @file
|
---|
| 2 | * DIS - The VirtualBox Disassembler.
|
---|
| 3 | */
|
---|
| 4 |
|
---|
| 5 | /*
|
---|
[8155] | 6 | * Copyright (C) 2006-2007 Sun Microsystems, Inc.
|
---|
[1] | 7 | *
|
---|
| 8 | * This file is part of VirtualBox Open Source Edition (OSE), as
|
---|
| 9 | * available from http://www.virtualbox.org. This file is free software;
|
---|
| 10 | * you can redistribute it and/or modify it under the terms of the GNU
|
---|
[5999] | 11 | * General Public License (GPL) as published by the Free Software
|
---|
| 12 | * Foundation, in version 2 as it comes in the "COPYING" file of the
|
---|
| 13 | * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
|
---|
| 14 | * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
|
---|
| 15 | *
|
---|
| 16 | * The contents of this file may alternatively be used under the terms
|
---|
| 17 | * of the Common Development and Distribution License Version 1.0
|
---|
| 18 | * (CDDL) only, as it comes in the "COPYING.CDDL" file of the
|
---|
| 19 | * VirtualBox OSE distribution, in which case the provisions of the
|
---|
| 20 | * CDDL are applicable instead of those of the GPL.
|
---|
| 21 | *
|
---|
| 22 | * You may elect to license modified versions of this file under the
|
---|
| 23 | * terms and conditions of either the GPL or the CDDL or both.
|
---|
[8155] | 24 | *
|
---|
| 25 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa
|
---|
| 26 | * Clara, CA 95054 USA or visit http://www.sun.com if you need
|
---|
| 27 | * additional information or have any questions.
|
---|
[1] | 28 | */
|
---|
| 29 |
|
---|
[3632] | 30 | #ifndef ___VBox_disasm_h
|
---|
| 31 | #define ___VBox_disasm_h
|
---|
[1] | 32 |
|
---|
| 33 | #include <VBox/cdefs.h>
|
---|
| 34 | #include <VBox/types.h>
|
---|
[1829] | 35 | #include <VBox/disopcode.h>
|
---|
[1] | 36 |
|
---|
[3783] | 37 | #if defined(__L4ENV__)
|
---|
[1] | 38 | #include <setjmp.h>
|
---|
| 39 | #endif
|
---|
| 40 |
|
---|
| 41 | __BEGIN_DECLS
|
---|
| 42 |
|
---|
| 43 |
|
---|
| 44 | /** CPU mode flags (DISCPUSTATE::mode).
|
---|
| 45 | * @{
|
---|
| 46 | */
|
---|
[4953] | 47 | typedef enum
|
---|
| 48 | {
|
---|
| 49 | CPUMODE_16BIT = 1,
|
---|
| 50 | CPUMODE_32BIT = 2,
|
---|
[7015] | 51 | CPUMODE_64BIT = 3,
|
---|
| 52 | /** hack forcing the size of the enum to 32-bits. */
|
---|
| 53 | CPUMODE_MAKE_32BIT_HACK = 0x7fffffff
|
---|
[4953] | 54 | } DISCPUMODE;
|
---|
[1] | 55 | /** @} */
|
---|
| 56 |
|
---|
| 57 | /** Prefix byte flags
|
---|
| 58 | * @{
|
---|
| 59 | */
|
---|
| 60 | #define PREFIX_NONE 0
|
---|
| 61 | /** non-default address size. */
|
---|
| 62 | #define PREFIX_ADDRSIZE 1
|
---|
| 63 | /** non-default operand size. */
|
---|
| 64 | #define PREFIX_OPSIZE 2
|
---|
| 65 | /** lock prefix. */
|
---|
| 66 | #define PREFIX_LOCK 4
|
---|
| 67 | /** segment prefix. */
|
---|
| 68 | #define PREFIX_SEG 8
|
---|
| 69 | /** rep(e) prefix (not a prefix, but we'll treat is as one). */
|
---|
| 70 | #define PREFIX_REP 16
|
---|
| 71 | /** rep(e) prefix (not a prefix, but we'll treat is as one). */
|
---|
| 72 | #define PREFIX_REPNE 32
|
---|
[7000] | 73 | /** REX prefix (64 bits) */
|
---|
| 74 | #define PREFIX_REX 64
|
---|
[1] | 75 | /** @} */
|
---|
| 76 |
|
---|
[7134] | 77 | /** 64 bits prefix byte flags
|
---|
[7000] | 78 | * @{
|
---|
| 79 | */
|
---|
| 80 | #define PREFIX_REX_OP_2_FLAGS(a) (a - OP_REX)
|
---|
| 81 | #define PREFIX_REX_FLAGS PREFIX_REX_OP_2_FLAGS(OP_REX)
|
---|
| 82 | #define PREFIX_REX_FLAGS_B PREFIX_REX_OP_2_FLAGS(OP_REX_B)
|
---|
| 83 | #define PREFIX_REX_FLAGS_X PREFIX_REX_OP_2_FLAGS(OP_REX_X)
|
---|
| 84 | #define PREFIX_REX_FLAGS_XB PREFIX_REX_OP_2_FLAGS(OP_REX_XB)
|
---|
| 85 | #define PREFIX_REX_FLAGS_R PREFIX_REX_OP_2_FLAGS(OP_REX_R)
|
---|
| 86 | #define PREFIX_REX_FLAGS_RB PREFIX_REX_OP_2_FLAGS(OP_REX_RB)
|
---|
| 87 | #define PREFIX_REX_FLAGS_RX PREFIX_REX_OP_2_FLAGS(OP_REX_RX)
|
---|
| 88 | #define PREFIX_REX_FLAGS_RXB PREFIX_REX_OP_2_FLAGS(OP_REX_RXB)
|
---|
| 89 | #define PREFIX_REX_FLAGS_W PREFIX_REX_OP_2_FLAGS(OP_REX_W)
|
---|
| 90 | #define PREFIX_REX_FLAGS_WB PREFIX_REX_OP_2_FLAGS(OP_REX_WB)
|
---|
| 91 | #define PREFIX_REX_FLAGS_WX PREFIX_REX_OP_2_FLAGS(OP_REX_WX)
|
---|
| 92 | #define PREFIX_REX_FLAGS_WXB PREFIX_REX_OP_2_FLAGS(OP_REX_WXB)
|
---|
| 93 | #define PREFIX_REX_FLAGS_WR PREFIX_REX_OP_2_FLAGS(OP_REX_WR)
|
---|
| 94 | #define PREFIX_REX_FLAGS_WRB PREFIX_REX_OP_2_FLAGS(OP_REX_WRB)
|
---|
| 95 | #define PREFIX_REX_FLAGS_WRX PREFIX_REX_OP_2_FLAGS(OP_REX_WRX)
|
---|
| 96 | #define PREFIX_REX_FLAGS_WRXB PREFIX_REX_OP_2_FLAGS(OP_REX_WRXB)
|
---|
| 97 | /** @} */
|
---|
| 98 |
|
---|
[1] | 99 | /**
|
---|
| 100 | * Operand type.
|
---|
| 101 | */
|
---|
[7000] | 102 | #define OPTYPE_INVALID RT_BIT(0)
|
---|
| 103 | #define OPTYPE_HARMLESS RT_BIT(1)
|
---|
| 104 | #define OPTYPE_CONTROLFLOW RT_BIT(2)
|
---|
| 105 | #define OPTYPE_POTENTIALLY_DANGEROUS RT_BIT(3)
|
---|
| 106 | #define OPTYPE_DANGEROUS RT_BIT(4)
|
---|
| 107 | #define OPTYPE_PORTIO RT_BIT(5)
|
---|
| 108 | #define OPTYPE_PRIVILEGED RT_BIT(6)
|
---|
| 109 | #define OPTYPE_PRIVILEGED_NOTRAP RT_BIT(7)
|
---|
| 110 | #define OPTYPE_UNCOND_CONTROLFLOW RT_BIT(8)
|
---|
| 111 | #define OPTYPE_RELATIVE_CONTROLFLOW RT_BIT(9)
|
---|
| 112 | #define OPTYPE_COND_CONTROLFLOW RT_BIT(10)
|
---|
| 113 | #define OPTYPE_INTERRUPT RT_BIT(11)
|
---|
| 114 | #define OPTYPE_ILLEGAL RT_BIT(12)
|
---|
| 115 | #define OPTYPE_RRM_DANGEROUS RT_BIT(14) /**< Some additional dangerouse ones when recompiling raw r0. */
|
---|
| 116 | #define OPTYPE_RRM_DANGEROUS_16 RT_BIT(15) /**< Some additional dangerouse ones when recompiling 16-bit raw r0. */
|
---|
| 117 | #define OPTYPE_RRM_MASK (OPTYPE_RRM_DANGEROUS | OPTYPE_RRM_DANGEROUS_16)
|
---|
| 118 | #define OPTYPE_INHIBIT_IRQS RT_BIT(16) /**< Will or can inhibit irqs (sti, pop ss, mov ss) */
|
---|
| 119 | #define OPTYPE_PORTIO_READ RT_BIT(17)
|
---|
| 120 | #define OPTYPE_PORTIO_WRITE RT_BIT(18)
|
---|
| 121 | #define OPTYPE_INVALID_64 RT_BIT(19) /**< Invalid in 64 bits mode */
|
---|
| 122 | #define OPTYPE_ONLY_64 RT_BIT(20) /**< Only valid in 64 bits mode */
|
---|
| 123 | #define OPTYPE_DEFAULT_64_OP_SIZE RT_BIT(21) /**< Default 64 bits operand size */
|
---|
[7134] | 124 | #define OPTYPE_FORCED_64_OP_SIZE RT_BIT(22) /**< Forced 64 bits operand size; regardless of prefix bytes */
|
---|
[7000] | 125 | #define OPTYPE_ALL (0xffffffff)
|
---|
[1] | 126 |
|
---|
| 127 | /** Parameter usage flags.
|
---|
| 128 | * @{
|
---|
| 129 | */
|
---|
[8149] | 130 | #define USE_BASE RT_BIT_64(0)
|
---|
| 131 | #define USE_INDEX RT_BIT_64(1)
|
---|
| 132 | #define USE_SCALE RT_BIT_64(2)
|
---|
| 133 | #define USE_REG_GEN8 RT_BIT_64(3)
|
---|
| 134 | #define USE_REG_GEN16 RT_BIT_64(4)
|
---|
| 135 | #define USE_REG_GEN32 RT_BIT_64(5)
|
---|
| 136 | #define USE_REG_GEN64 RT_BIT_64(6)
|
---|
| 137 | #define USE_REG_FP RT_BIT_64(7)
|
---|
| 138 | #define USE_REG_MMX RT_BIT_64(8)
|
---|
| 139 | #define USE_REG_XMM RT_BIT_64(9)
|
---|
| 140 | #define USE_REG_CR RT_BIT_64(10)
|
---|
| 141 | #define USE_REG_DBG RT_BIT_64(11)
|
---|
| 142 | #define USE_REG_SEG RT_BIT_64(12)
|
---|
| 143 | #define USE_REG_TEST RT_BIT_64(13)
|
---|
| 144 | #define USE_DISPLACEMENT8 RT_BIT_64(14)
|
---|
| 145 | #define USE_DISPLACEMENT16 RT_BIT_64(15)
|
---|
| 146 | #define USE_DISPLACEMENT32 RT_BIT_64(16)
|
---|
| 147 | #define USE_IMMEDIATE8 RT_BIT_64(17)
|
---|
| 148 | #define USE_IMMEDIATE8_REL RT_BIT_64(18)
|
---|
| 149 | #define USE_IMMEDIATE16 RT_BIT_64(19)
|
---|
| 150 | #define USE_IMMEDIATE16_REL RT_BIT_64(20)
|
---|
| 151 | #define USE_IMMEDIATE32 RT_BIT_64(21)
|
---|
| 152 | #define USE_IMMEDIATE32_REL RT_BIT_64(22)
|
---|
| 153 | #define USE_IMMEDIATE64 RT_BIT_64(23)
|
---|
| 154 | #define USE_IMMEDIATE_ADDR_0_32 RT_BIT_64(24)
|
---|
| 155 | #define USE_IMMEDIATE_ADDR_16_32 RT_BIT_64(25)
|
---|
| 156 | #define USE_IMMEDIATE_ADDR_0_16 RT_BIT_64(26)
|
---|
| 157 | #define USE_IMMEDIATE_ADDR_16_16 RT_BIT_64(27)
|
---|
[1] | 158 | /** DS:ESI */
|
---|
[8149] | 159 | #define USE_POINTER_DS_BASED RT_BIT_64(28)
|
---|
[1] | 160 | /** ES:EDI */
|
---|
[8149] | 161 | #define USE_POINTER_ES_BASED RT_BIT_64(29)
|
---|
| 162 | #define USE_IMMEDIATE16_SX8 RT_BIT_64(30)
|
---|
| 163 | #define USE_IMMEDIATE32_SX8 RT_BIT_64(31)
|
---|
[1] | 164 |
|
---|
| 165 | #define USE_IMMEDIATE (USE_IMMEDIATE8|USE_IMMEDIATE16|USE_IMMEDIATE32|USE_IMMEDIATE64|USE_IMMEDIATE8_REL|USE_IMMEDIATE16_REL|USE_IMMEDIATE32_REL|USE_IMMEDIATE_ADDR_0_32|USE_IMMEDIATE_ADDR_16_32|USE_IMMEDIATE_ADDR_0_16|USE_IMMEDIATE_ADDR_16_16|USE_IMMEDIATE16_SX8|USE_IMMEDIATE32_SX8)
|
---|
| 166 |
|
---|
| 167 | /** @} */
|
---|
| 168 |
|
---|
[8142] | 169 | /** index in {"RAX", "RCX", "RDX", "RBX", "RSP", "RBP", "RSI", "RDI", "R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15"}
|
---|
| 170 | * @{
|
---|
| 171 | */
|
---|
| 172 | #define USE_REG_RAX 0
|
---|
| 173 | #define USE_REG_RCX 1
|
---|
| 174 | #define USE_REG_RDX 2
|
---|
| 175 | #define USE_REG_RBX 3
|
---|
| 176 | #define USE_REG_RSP 4
|
---|
| 177 | #define USE_REG_RBP 5
|
---|
| 178 | #define USE_REG_RSI 6
|
---|
| 179 | #define USE_REG_RDI 7
|
---|
| 180 | #define USE_REG_R8 8
|
---|
| 181 | #define USE_REG_R9 9
|
---|
| 182 | #define USE_REG_R10 10
|
---|
| 183 | #define USE_REG_R11 11
|
---|
| 184 | #define USE_REG_R12 12
|
---|
| 185 | #define USE_REG_R13 13
|
---|
| 186 | #define USE_REG_R14 14
|
---|
| 187 | #define USE_REG_R15 15
|
---|
| 188 | /** @} */
|
---|
| 189 |
|
---|
[1] | 190 | /** index in {"EAX", "ECX", "EDX", "EBX", "ESP", "EBP", "ESI", "EDI"}
|
---|
| 191 | * @{
|
---|
| 192 | */
|
---|
| 193 | #define USE_REG_EAX 0
|
---|
| 194 | #define USE_REG_ECX 1
|
---|
| 195 | #define USE_REG_EDX 2
|
---|
| 196 | #define USE_REG_EBX 3
|
---|
| 197 | #define USE_REG_ESP 4
|
---|
| 198 | #define USE_REG_EBP 5
|
---|
| 199 | #define USE_REG_ESI 6
|
---|
| 200 | #define USE_REG_EDI 7
|
---|
| 201 | /** @} */
|
---|
| 202 | /** index in {"AX", "CX", "DX", "BX", "SP", "BP", "SI", "DI"}
|
---|
| 203 | * @{
|
---|
| 204 | */
|
---|
| 205 | #define USE_REG_AX 0
|
---|
| 206 | #define USE_REG_CX 1
|
---|
| 207 | #define USE_REG_DX 2
|
---|
| 208 | #define USE_REG_BX 3
|
---|
| 209 | #define USE_REG_SP 4
|
---|
| 210 | #define USE_REG_BP 5
|
---|
| 211 | #define USE_REG_SI 6
|
---|
| 212 | #define USE_REG_DI 7
|
---|
| 213 | /** @} */
|
---|
| 214 |
|
---|
| 215 | /** index in {"AL", "CL", "DL", "BL", "AH", "CH", "DH", "BH"}
|
---|
| 216 | * @{
|
---|
| 217 | */
|
---|
| 218 | #define USE_REG_AL 0
|
---|
| 219 | #define USE_REG_CL 1
|
---|
| 220 | #define USE_REG_DL 2
|
---|
| 221 | #define USE_REG_BL 3
|
---|
| 222 | #define USE_REG_AH 4
|
---|
| 223 | #define USE_REG_CH 5
|
---|
| 224 | #define USE_REG_DH 6
|
---|
| 225 | #define USE_REG_BH 7
|
---|
| 226 | /** @} */
|
---|
| 227 |
|
---|
| 228 | /** index in {ES, CS, SS, DS, FS, GS}
|
---|
| 229 | * @{
|
---|
| 230 | */
|
---|
| 231 | #define USE_REG_ES 0
|
---|
| 232 | #define USE_REG_CS 1
|
---|
| 233 | #define USE_REG_SS 2
|
---|
| 234 | #define USE_REG_DS 3
|
---|
| 235 | #define USE_REG_FS 4
|
---|
| 236 | #define USE_REG_GS 5
|
---|
| 237 | /** @} */
|
---|
| 238 |
|
---|
| 239 | #define USE_REG_FP0 0
|
---|
| 240 | #define USE_REG_FP1 1
|
---|
| 241 | #define USE_REG_FP2 2
|
---|
| 242 | #define USE_REG_FP3 3
|
---|
| 243 | #define USE_REG_FP4 4
|
---|
| 244 | #define USE_REG_FP5 5
|
---|
| 245 | #define USE_REG_FP6 6
|
---|
| 246 | #define USE_REG_FP7 7
|
---|
| 247 |
|
---|
| 248 | #define USE_REG_CR0 0
|
---|
| 249 | #define USE_REG_CR1 1
|
---|
| 250 | #define USE_REG_CR2 2
|
---|
| 251 | #define USE_REG_CR3 3
|
---|
| 252 | #define USE_REG_CR4 4
|
---|
| 253 |
|
---|
| 254 | #define USE_REG_DR0 0
|
---|
| 255 | #define USE_REG_DR1 1
|
---|
| 256 | #define USE_REG_DR2 2
|
---|
| 257 | #define USE_REG_DR3 3
|
---|
| 258 | #define USE_REG_DR4 4
|
---|
| 259 | #define USE_REG_DR5 5
|
---|
| 260 | #define USE_REG_DR6 6
|
---|
| 261 | #define USE_REG_DR7 7
|
---|
| 262 |
|
---|
| 263 | #define USE_REG_MMX0 0
|
---|
| 264 | #define USE_REG_MMX1 1
|
---|
| 265 | #define USE_REG_MMX2 2
|
---|
| 266 | #define USE_REG_MMX3 3
|
---|
| 267 | #define USE_REG_MMX4 4
|
---|
| 268 | #define USE_REG_MMX5 5
|
---|
| 269 | #define USE_REG_MMX6 6
|
---|
| 270 | #define USE_REG_MMX7 7
|
---|
| 271 |
|
---|
| 272 | #define USE_REG_XMM0 0
|
---|
| 273 | #define USE_REG_XMM1 1
|
---|
| 274 | #define USE_REG_XMM2 2
|
---|
| 275 | #define USE_REG_XMM3 3
|
---|
| 276 | #define USE_REG_XMM4 4
|
---|
| 277 | #define USE_REG_XMM5 5
|
---|
| 278 | #define USE_REG_XMM6 6
|
---|
| 279 | #define USE_REG_XMM7 7
|
---|
| 280 |
|
---|
| 281 | /** Used by DISQueryParamVal & EMIQueryParamVal
|
---|
| 282 | * @{
|
---|
| 283 | */
|
---|
[5605] | 284 | #define PARAM_VAL8 RT_BIT(0)
|
---|
| 285 | #define PARAM_VAL16 RT_BIT(1)
|
---|
| 286 | #define PARAM_VAL32 RT_BIT(2)
|
---|
| 287 | #define PARAM_VAL64 RT_BIT(3)
|
---|
| 288 | #define PARAM_VALFARPTR16 RT_BIT(4)
|
---|
| 289 | #define PARAM_VALFARPTR32 RT_BIT(5)
|
---|
[1] | 290 |
|
---|
| 291 | #define PARMTYPE_REGISTER 1
|
---|
| 292 | #define PARMTYPE_ADDRESS 2
|
---|
| 293 | #define PARMTYPE_IMMEDIATE 3
|
---|
| 294 |
|
---|
| 295 | typedef struct
|
---|
| 296 | {
|
---|
| 297 | uint32_t type;
|
---|
| 298 | uint32_t size;
|
---|
[8149] | 299 | uint64_t flags;
|
---|
[1] | 300 |
|
---|
| 301 | union
|
---|
| 302 | {
|
---|
| 303 | uint8_t val8;
|
---|
| 304 | uint16_t val16;
|
---|
| 305 | uint32_t val32;
|
---|
| 306 | uint64_t val64;
|
---|
| 307 |
|
---|
| 308 | struct
|
---|
| 309 | {
|
---|
| 310 | uint16_t sel;
|
---|
| 311 | uint32_t offset;
|
---|
| 312 | } farptr;
|
---|
| 313 | } val;
|
---|
| 314 |
|
---|
| 315 | } OP_PARAMVAL;
|
---|
| 316 | /** Pointer to opcode parameter value. */
|
---|
| 317 | typedef OP_PARAMVAL *POP_PARAMVAL;
|
---|
| 318 |
|
---|
| 319 | typedef enum
|
---|
| 320 | {
|
---|
| 321 | PARAM_DEST,
|
---|
| 322 | PARAM_SOURCE
|
---|
| 323 | } PARAM_TYPE;
|
---|
| 324 |
|
---|
| 325 | /** @} */
|
---|
| 326 |
|
---|
| 327 | /**
|
---|
| 328 | * Operand Parameter.
|
---|
| 329 | */
|
---|
| 330 | typedef struct _OP_PARAMETER
|
---|
| 331 | {
|
---|
| 332 | int param;
|
---|
| 333 | uint64_t parval;
|
---|
| 334 | char szParam[32];
|
---|
| 335 |
|
---|
| 336 | int32_t disp8, disp16, disp32;
|
---|
| 337 |
|
---|
| 338 | uint32_t size;
|
---|
| 339 |
|
---|
[8149] | 340 | uint64_t flags;
|
---|
| 341 |
|
---|
[1] | 342 | union
|
---|
| 343 | {
|
---|
| 344 | uint32_t reg_gen8;
|
---|
| 345 | uint32_t reg_gen16;
|
---|
| 346 | uint32_t reg_gen32;
|
---|
[8149] | 347 | uint64_t reg_gen64;
|
---|
[1] | 348 | /** ST(0) - ST(7) */
|
---|
| 349 | uint32_t reg_fp;
|
---|
| 350 | /** MMX0 - MMX7 */
|
---|
| 351 | uint32_t reg_mmx;
|
---|
| 352 | /** XMM0 - XMM7 */
|
---|
| 353 | uint32_t reg_xmm;
|
---|
| 354 | /** {ES, CS, SS, DS, FS, GS} */
|
---|
| 355 | uint32_t reg_seg;
|
---|
| 356 | /** TR0-TR7 (?) */
|
---|
| 357 | uint32_t reg_test;
|
---|
| 358 | /** CR0-CR4 */
|
---|
[8149] | 359 | uint64_t reg_ctrl;
|
---|
[1] | 360 | /** DR0-DR7 */
|
---|
| 361 | uint32_t reg_dbg;
|
---|
| 362 | } base;
|
---|
| 363 | union
|
---|
| 364 | {
|
---|
| 365 | uint32_t reg_gen;
|
---|
| 366 | } index;
|
---|
| 367 |
|
---|
| 368 | /** 2, 4 or 8. */
|
---|
| 369 | uint32_t scale;
|
---|
| 370 |
|
---|
| 371 | } OP_PARAMETER;
|
---|
| 372 | /** Pointer to opcode parameter. */
|
---|
| 373 | typedef OP_PARAMETER *POP_PARAMETER;
|
---|
| 374 | /** Pointer to opcode parameter. */
|
---|
| 375 | typedef const OP_PARAMETER *PCOP_PARAMETER;
|
---|
| 376 |
|
---|
| 377 |
|
---|
| 378 | struct _OPCODE;
|
---|
| 379 | /** Pointer to opcode. */
|
---|
| 380 | typedef struct _OPCODE *POPCODE;
|
---|
| 381 | /** Pointer to const opcode. */
|
---|
| 382 | typedef const struct _OPCODE *PCOPCODE;
|
---|
| 383 |
|
---|
[4953] | 384 | typedef DECLCALLBACK(int) FN_DIS_READBYTES(RTUINTPTR pSrc, uint8_t *pDest, uint32_t size, void *pvUserdata);
|
---|
[1] | 385 | typedef FN_DIS_READBYTES *PFN_DIS_READBYTES;
|
---|
| 386 |
|
---|
| 387 | /* forward decl */
|
---|
| 388 | struct _DISCPUSTATE;
|
---|
| 389 | /** Pointer to the disassembler CPU state. */
|
---|
| 390 | typedef struct _DISCPUSTATE *PDISCPUSTATE;
|
---|
| 391 |
|
---|
| 392 | /** Parser callback.
|
---|
| 393 | * @remark no DECLCALLBACK() here because it's considered to be internal (really, I'm too lazy to update all the functions). */
|
---|
[4953] | 394 | typedef unsigned FNDISPARSE(RTUINTPTR pu8CodeBlock, PCOPCODE pOp, POP_PARAMETER pParam, PDISCPUSTATE pCpu);
|
---|
[1] | 395 | typedef FNDISPARSE *PFNDISPARSE;
|
---|
| 396 |
|
---|
| 397 | typedef struct _DISCPUSTATE
|
---|
| 398 | {
|
---|
| 399 | /* Global setting */
|
---|
[7015] | 400 | DISCPUMODE mode;
|
---|
[1] | 401 |
|
---|
| 402 | /* Per instruction prefix settings */
|
---|
| 403 | uint32_t prefix;
|
---|
| 404 | /** segment prefix value. */
|
---|
| 405 | uint32_t prefix_seg;
|
---|
[7000] | 406 | /** rex prefix value (64 bits only */
|
---|
| 407 | uint32_t prefix_rex;
|
---|
[1] | 408 | /** addressing mode (16 or 32 bits). (CPUMODE_*) */
|
---|
[7015] | 409 | DISCPUMODE addrmode;
|
---|
[1] | 410 | /** operand mode (16 or 32 bits). (CPUMODE_*) */
|
---|
[7015] | 411 | DISCPUMODE opmode;
|
---|
[1] | 412 |
|
---|
| 413 | OP_PARAMETER param1;
|
---|
| 414 | OP_PARAMETER param2;
|
---|
| 415 | OP_PARAMETER param3;
|
---|
| 416 |
|
---|
| 417 | /** ModRM byte. */
|
---|
| 418 | uint32_t ModRM;
|
---|
| 419 | /** scalar, index, base byte. */
|
---|
| 420 | uint32_t SIB;
|
---|
| 421 |
|
---|
| 422 | int32_t disp;
|
---|
| 423 |
|
---|
| 424 | /** First opcode byte of instruction. */
|
---|
| 425 | uint8_t opcode;
|
---|
| 426 | /** Last prefix byte (for SSE2 extension tables) */
|
---|
| 427 | uint8_t lastprefix;
|
---|
| 428 | RTUINTPTR opaddr;
|
---|
| 429 | uint32_t opsize;
|
---|
| 430 | #ifndef DIS_CORE_ONLY
|
---|
| 431 | /** Opcode format string for current instruction. */
|
---|
[2333] | 432 | const char *pszOpcode;
|
---|
[1] | 433 | #endif
|
---|
| 434 |
|
---|
| 435 | /** Internal: pointer to disassembly function table */
|
---|
| 436 | PFNDISPARSE *pfnDisasmFnTable;
|
---|
| 437 | /** Internal: instruction filter */
|
---|
| 438 | uint32_t uFilter;
|
---|
| 439 |
|
---|
| 440 | /** Pointer to the current instruction. */
|
---|
| 441 | PCOPCODE pCurInstr;
|
---|
| 442 |
|
---|
[4953] | 443 | void *apvUserData[3];
|
---|
[1] | 444 |
|
---|
| 445 | /** Optional read function */
|
---|
| 446 | PFN_DIS_READBYTES pfnReadBytes;
|
---|
| 447 | #ifdef __L4ENV__
|
---|
| 448 | jmp_buf *pJumpBuffer;
|
---|
| 449 | #endif /* __L4ENV__ */
|
---|
| 450 | } DISCPUSTATE;
|
---|
| 451 |
|
---|
| 452 | /** Opcode. */
|
---|
| 453 | #pragma pack(4)
|
---|
| 454 | typedef struct _OPCODE
|
---|
| 455 | {
|
---|
| 456 | #ifndef DIS_CORE_ONLY
|
---|
[2333] | 457 | const char *pszOpcode;
|
---|
[1] | 458 | #endif
|
---|
| 459 | uint8_t idxParse1;
|
---|
| 460 | uint8_t idxParse2;
|
---|
| 461 | uint8_t idxParse3;
|
---|
| 462 | uint16_t opcode;
|
---|
| 463 | uint16_t param1;
|
---|
| 464 | uint16_t param2;
|
---|
| 465 | uint16_t param3;
|
---|
| 466 |
|
---|
| 467 | uint32_t optype;
|
---|
| 468 | } OPCODE;
|
---|
| 469 | #pragma pack()
|
---|
| 470 |
|
---|
| 471 |
|
---|
| 472 | /**
|
---|
| 473 | * Disassembles a code block.
|
---|
| 474 | *
|
---|
[4953] | 475 | * @returns VBox error code
|
---|
[1] | 476 | * @param pCpu Pointer to cpu structure which have DISCPUSTATE::mode
|
---|
| 477 | * set correctly.
|
---|
| 478 | * @param pvCodeBlock Pointer to the strunction to disassemble.
|
---|
| 479 | * @param cbMax Maximum number of bytes to disassemble.
|
---|
| 480 | * @param pcbSize Where to store the size of the instruction.
|
---|
| 481 | * NULL is allowed.
|
---|
| 482 | *
|
---|
| 483 | *
|
---|
| 484 | * @todo Define output callback.
|
---|
| 485 | * @todo Using signed integers as sizes is a bit odd. There are still
|
---|
| 486 | * some GCC warnings about mixing signed and unsigend integers.
|
---|
| 487 | * @todo Need to extend this interface to include a code address so we
|
---|
| 488 | * can dissassemble GC code. Perhaps a new function is better...
|
---|
| 489 | * @remark cbMax isn't respected as a boundry. DISInstr() will read beyond cbMax.
|
---|
| 490 | * This means *pcbSize >= cbMax sometimes.
|
---|
| 491 | */
|
---|
[4953] | 492 | DISDECL(int) DISBlock(PDISCPUSTATE pCpu, RTUINTPTR pvCodeBlock, unsigned cbMax, unsigned *pSize);
|
---|
[1] | 493 |
|
---|
| 494 | /**
|
---|
| 495 | * Disassembles one instruction
|
---|
| 496 | *
|
---|
[4953] | 497 | * @returns VBox error code
|
---|
[1] | 498 | * @param pCpu Pointer to cpu structure which have DISCPUSTATE::mode
|
---|
| 499 | * set correctly.
|
---|
| 500 | * @param pu8Instruction Pointer to the instrunction to disassemble.
|
---|
| 501 | * @param u32EipOffset Offset to add to instruction address to get the real virtual address
|
---|
| 502 | * @param pcbSize Where to store the size of the instruction.
|
---|
| 503 | * NULL is allowed.
|
---|
| 504 | * @param pszOutput Storage for disassembled instruction
|
---|
| 505 | *
|
---|
| 506 | * @todo Define output callback.
|
---|
| 507 | */
|
---|
[4953] | 508 | DISDECL(int) DISInstr(PDISCPUSTATE pCpu, RTUINTPTR pu8Instruction, unsigned u32EipOffset, unsigned *pcbSize, char *pszOutput);
|
---|
[1] | 509 |
|
---|
| 510 | /**
|
---|
| 511 | * Disassembles one instruction
|
---|
| 512 | *
|
---|
[4953] | 513 | * @returns VBox error code
|
---|
[1] | 514 | * @param pCpu Pointer to cpu structure which have DISCPUSTATE::mode
|
---|
| 515 | * set correctly.
|
---|
| 516 | * @param pu8Instruction Pointer to the strunction to disassemble.
|
---|
| 517 | * @param u32EipOffset Offset to add to instruction address to get the real virtual address
|
---|
| 518 | * @param pcbSize Where to store the size of the instruction.
|
---|
| 519 | * NULL is allowed.
|
---|
| 520 | * @param pszOutput Storage for disassembled instruction
|
---|
| 521 | * @param uFilter Instruction type filter
|
---|
| 522 | *
|
---|
| 523 | * @todo Define output callback.
|
---|
| 524 | */
|
---|
[4953] | 525 | DISDECL(int) DISInstrEx(PDISCPUSTATE pCpu, RTUINTPTR pu8Instruction, uint32_t u32EipOffset, uint32_t *pcbSize,
|
---|
| 526 | char *pszOutput, unsigned uFilter);
|
---|
[1] | 527 |
|
---|
| 528 | /**
|
---|
| 529 | * Parses one instruction.
|
---|
| 530 | * The result is found in pCpu.
|
---|
| 531 | *
|
---|
[4953] | 532 | * @returns VBox error code
|
---|
[1] | 533 | * @param pCpu Pointer to cpu structure which has DISCPUSTATE::mode set correctly.
|
---|
| 534 | * @param InstructionAddr Pointer to the instruction to parse.
|
---|
| 535 | * @param pcbInstruction Where to store the size of the instruction.
|
---|
| 536 | * NULL is allowed.
|
---|
| 537 | */
|
---|
[4953] | 538 | DISDECL(int) DISCoreOne(PDISCPUSTATE pCpu, RTUINTPTR InstructionAddr, unsigned *pcbInstruction);
|
---|
[1] | 539 |
|
---|
| 540 | /**
|
---|
| 541 | * Parses one guest instruction.
|
---|
[7015] | 542 | * The result is found in pCpu and pcbInstruction.
|
---|
[1] | 543 | *
|
---|
| 544 | * @returns VBox status code.
|
---|
| 545 | * @param InstructionAddr Address of the instruction to decode. What this means
|
---|
| 546 | * is left to the pfnReadBytes function.
|
---|
[7015] | 547 | * @param enmCpuMode The CPU mode. CPUMODE_32BIT, CPUMODE_16BIT, or CPUMODE_64BIT.
|
---|
[1] | 548 | * @param pfnReadBytes Callback for reading instruction bytes.
|
---|
[7015] | 549 | * @param pvUser User argument for the instruction reader. (Ends up in apvUserData[0].)
|
---|
[1] | 550 | * @param pCpu Pointer to cpu structure. Will be initialized.
|
---|
| 551 | * @param pcbInstruction Where to store the size of the instruction.
|
---|
| 552 | * NULL is allowed.
|
---|
| 553 | */
|
---|
[7015] | 554 | DISDECL(int) DISCoreOneEx(RTUINTPTR InstructionAddr, DISCPUMODE enmCpuMode, PFN_DIS_READBYTES pfnReadBytes, void *pvUser,
|
---|
[1] | 555 | PDISCPUSTATE pCpu, unsigned *pcbInstruction);
|
---|
| 556 |
|
---|
| 557 | DISDECL(int) DISGetParamSize(PDISCPUSTATE pCpu, POP_PARAMETER pParam);
|
---|
| 558 | DISDECL(int) DISDetectSegReg(PDISCPUSTATE pCpu, POP_PARAMETER pParam);
|
---|
[1463] | 559 | DISDECL(uint8_t) DISQuerySegPrefixByte(PDISCPUSTATE pCpu);
|
---|
[1] | 560 |
|
---|
| 561 | /**
|
---|
| 562 | * Returns the value of the parameter in pParam
|
---|
| 563 | *
|
---|
| 564 | * @returns VBox error code
|
---|
| 565 | * @param pCtx Exception structure pointer
|
---|
| 566 | * @param pCpu Pointer to cpu structure which have DISCPUSTATE::mode
|
---|
| 567 | * set correctly.
|
---|
| 568 | * @param pParam Pointer to the parameter to parse
|
---|
| 569 | * @param pParamVal Pointer to parameter value (OUT)
|
---|
| 570 | * @param parmtype Parameter type
|
---|
| 571 | *
|
---|
| 572 | * @note Currently doesn't handle FPU/XMM/MMX/3DNow! parameters correctly!!
|
---|
| 573 | *
|
---|
| 574 | */
|
---|
| 575 | DISDECL(int) DISQueryParamVal(PCPUMCTXCORE pCtx, PDISCPUSTATE pCpu, POP_PARAMETER pParam, POP_PARAMVAL pParamVal, PARAM_TYPE parmtype);
|
---|
[8149] | 576 | DISDECL(int) DISQueryParamRegPtr(PCPUMCTXCORE pCtx, PDISCPUSTATE pCpu, POP_PARAMETER pParam, void **ppReg, size_t *pcbSize);
|
---|
[1] | 577 |
|
---|
[8142] | 578 | DISDECL(int) DISFetchReg8(PCPUMCTXCORE pCtx, unsigned reg8, uint8_t *pVal);
|
---|
| 579 | DISDECL(int) DISFetchReg16(PCPUMCTXCORE pCtx, unsigned reg16, uint16_t *pVal);
|
---|
| 580 | DISDECL(int) DISFetchReg32(PCPUMCTXCORE pCtx, unsigned reg32, uint32_t *pVal);
|
---|
| 581 | DISDECL(int) DISFetchReg64(PCPUMCTXCORE pCtx, unsigned reg64, uint64_t *pVal);
|
---|
| 582 | DISDECL(int) DISFetchRegSeg(PCPUMCTXCORE pCtx, unsigned sel, RTSEL *pVal);
|
---|
| 583 | DISDECL(int) DISFetchRegSegEx(PCPUMCTXCORE pCtx, unsigned sel, RTSEL *pVal, PCPUMSELREGHID *ppSelHidReg);
|
---|
| 584 | DISDECL(int) DISWriteReg8(PCPUMCTXCORE pRegFrame, unsigned reg8, uint8_t val8);
|
---|
| 585 | DISDECL(int) DISWriteReg16(PCPUMCTXCORE pRegFrame, unsigned reg32, uint16_t val16);
|
---|
| 586 | DISDECL(int) DISWriteReg32(PCPUMCTXCORE pRegFrame, unsigned reg32, uint32_t val32);
|
---|
| 587 | DISDECL(int) DISWriteReg64(PCPUMCTXCORE pRegFrame, unsigned reg64, uint64_t val64);
|
---|
| 588 | DISDECL(int) DISWriteRegSeg(PCPUMCTXCORE pCtx, unsigned sel, RTSEL val);
|
---|
| 589 | DISDECL(int) DISPtrReg8(PCPUMCTXCORE pCtx, unsigned reg8, uint8_t **ppReg);
|
---|
| 590 | DISDECL(int) DISPtrReg16(PCPUMCTXCORE pCtx, unsigned reg16, uint16_t **ppReg);
|
---|
| 591 | DISDECL(int) DISPtrReg32(PCPUMCTXCORE pCtx, unsigned reg32, uint32_t **ppReg);
|
---|
| 592 | DISDECL(int) DISPtrReg64(PCPUMCTXCORE pCtx, unsigned reg64, uint64_t **ppReg);
|
---|
[1] | 593 |
|
---|
| 594 | __END_DECLS
|
---|
| 595 |
|
---|
| 596 | #endif
|
---|
| 597 |
|
---|