[vbox-dev] Patch for PCI prefetch alignment issue

Vilbig, Ric ric_vilbig at mentor.com
Tue Oct 3 18:36:32 UTC 2017


I found a problem in the ICH9 fake bios prefetch space address management, and I would like to submit my patch in hopes you will merge it into the mainstream.  I am submitting the patch under the MIT license terms.  Please find attached the diff file showing the patch as well as the actual (one) source file that was changed.  These are based on the 5.1.28 source code tarball.

The problem arises when the first prefetchable BAR has a size greater than the 1M alignment that is applied to the Prefetch Base register.  In this case, the Prefetch Base register is aligned differently than the BAR register.  This leads to VERR_MM_HYPER_NO_MEMORY being returned when the range is registered with PDMDevHlpMMIORegister().  Specifically, the error originates in mmHyperAllocInternal().

This patch resolves the problem by changing the hard-coded 1M alignment applied to the Prefetch Base register into a variable which is the greater of 1M or the alignment requirement indicated in the BAR registers.  The result is that the Prefetch Base register and BAR are aligned the same way, and the memory registration is successful.

//  RicV

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