[vbox-dev] ICH9 MSI handling

Michal Necasek michal.necasek at oracle.com
Wed Dec 30 19:52:12 GMT 2015

Please take a look at this: https://www.virtualbox.org/wiki/Contributor_information 

For a small patch, I highly recommend submitting it under the MIT license. Basically you post the patch on this list and state that it's provided under the MIT license. We'll take a look at it, possibly modify it, and apply (if we're happy with it). 

A patch has higher chance of being accepted when it follows the VirtualBox coding standards and is reasonably well designed. For example requiring the user to directly modify the PCI config registers sounds like something that should be avoided for MSIs. But let's see the patch first. 


----- Original Message ----- 
From: apallapothu at gmail.com 
To: michal.necasek at oracle.com 
Cc: vbox-dev at virtualbox.org 
Sent: Wednesday, December 30, 2015 12:30:02 AM GMT +01:00 Amsterdam / Berlin / Bern / Rome / Stockholm / Vienna 
Subject: Re: [vbox-dev] ICH9 MSI handling 

2 things that I do 1) Directly write to control config register for 64 bit using *setbyte or *setword function calls 2) I set " pMsiReg->fMsi64bit" during MSI registration. 

I presume changes might help other users, so would be glad to submit changes. N ever submitted patches before, what is the process to do so ? 


On Tue, Dec 29, 2015 at 5:36 AM, Michal Necasek < michal.necasek at oracle.com > wrote: 

I can't say much without seeing exactly what you changed. But just two questions: 

- Do you call pciDevSetMsi64Capable() anywhere? Perhaps MsiInit() should be doing that. 
- Did you set pMsiReg->fMsi64bit before registering the MSI capability? 

It is entirely possible that the 64-bit MSI support is not as good as it could be since VirtualBox does not ship with any devices which use that. 

Are you going to submit patches for VirtualBox or are you happy with maintaining local changes? 

- Michal 

On 12/29/2015 5:44 AM, Ananth Pallapothu wrote: 

Hi Michal, 

I was able to get my device working for MSI Interrupts Non-masking. 

Problem was 3 folded. 
1) A) Added new msiMaskEnabled function to do appropriate checkings 
B) Existing check conditions inside MsiNotify are specifically 
isolated incase of Non-Masking. 
2) I invoke exclusive register write access to MSI control at the 
very end of my constructor (after MSI registration call) 
3) msiIs64Bit never returned functionally appropriate/true value. So 
I modified this function to return appropriate value by reading control 
config & 0x80 


On Mon, Dec 28, 2015 at 4:50 AM, Michal Necasek 
< michal.necasek at oracle.com <mailto: michal.necasek at oracle.com >> wrote: 

Hmm, that doesn't make sense to me. The mask bits do not overlap 
anything else. I'm looking at figure 6-9 on page 233 of the PCI 3.0 

The code in MsiCommon.cpp is clear enough. Are you failing to set 
the fMsi64bit flag when registering the MSI capability? 

You probably also noticed that MsiInit() always sets the 
BOX_PCI_MSI_FLAGS_MASKBIT and there is currently no way to register 
an emulated device without MSI per-vector masking. That should not 
cause trouble since guest software does not have to use masking. 

- Michal 

----- Original Message ----- 
From: apallapothu at gmail.com <mailto: apallapothu at gmail.com > 
To: vbox-dev at virtualbox.org <mailto: vbox-dev at virtualbox.org > 
Sent: Monday, December 21, 2015 5:16:15 AM GMT +01:00 Amsterdam / 
Berlin / Bern / Rome / Stockholm / Vienna 
Subject: [vbox-dev] ICH9 MSI handling 

Hello Developers, 

I am experimenting on ICH9 with a pluggable device. Reason 
for using ICH9 is MSI support. 
Following through AHCI, HPET device I see that code is aligned for 
specific mode of MSI configuration, "Per-Vector Masking Capable". 

MsiNotify function reads Mask Bits, Pending Bits without 
conditionally checking whether device is Per-Vector Masking Capable. 
So, by default code thinks offset 0xC reg as mask data where infact 
it is MSI data with Interrupt Vector ID incase of masking disabled. 
iVector value seems to be confusing too. 

My particular device needs to be configured for 64 bit MSI 
address capable and Mask disabled, so, MSI_MSG_CNTL @ MSI capability 
offset 0x02 = 0x0081 

Can someone please suggest, recommend changes to handle this 
mode of MSI operation ? 


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