;; @file ; CPUM - CPU Monitor, Assembly header file. ; ; ; Copyright (C) 2006-2009 Sun Microsystems, Inc. ; ; This file is part of VirtualBox Open Source Edition (OSE), as ; available from http://www.virtualbox.org. This file is free software; ; you can redistribute it and/or modify it under the terms of the GNU ; General Public License (GPL) as published by the Free Software ; Foundation, in version 2 as it comes in the "COPYING" file of the ; VirtualBox OSE distribution. VirtualBox OSE is distributed in the ; hope that it will be useful, but WITHOUT ANY WARRANTY of any kind. ; ; The contents of this file may alternatively be used under the terms ; of the Common Development and Distribution License Version 1.0 ; (CDDL) only, as it comes in the "COPYING.CDDL" file of the ; VirtualBox OSE distribution, in which case the provisions of the ; CDDL are applicable instead of those of the GPL. ; ; You may elect to license modified versions of this file under the ; terms and conditions of either the GPL or the CDDL or both. ; ; Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa ; Clara, CA 95054 USA or visit http://www.sun.com if you need ; additional information or have any questions. ; %ifndef __VBox_cpum_mac__ %define __VBox_cpum_mac__ ;; ; Registers frame. ; This is used internally in TRPM, VMMSwitcher_GuestToHost_GuestCtx ; and other places. struc CPUMCTXCORE .edi resq 1 .esi resq 1 .ebp resq 1 .eax resq 1 .ebx resq 1 .edx resq 1 .ecx resq 1 .esp resq 1 .lss_esp resd 1 .ss resw 1 .ssPadding resw 1 .gs resw 1 .gsPadding resw 1 .fs resw 1 .fsPadding resw 1 .es resw 1 .esPadding resw 1 .ds resw 1 .dsPadding resw 1 .cs resw 1 .csPadding resw 3 .eflags resq 1 .eip resq 1 .r8 resq 1 .r9 resq 1 .r10 resq 1 .r11 resq 1 .r12 resq 1 .r13 resq 1 .r14 resq 1 .r15 resq 1 .esHid.u64Base resq 1 .esHid.u32Limit resd 1 .esHid.Attr resd 1 .csHid.u64Base resq 1 .csHid.u32Limit resd 1 .csHid.Attr resd 1 .ssHid.u64Base resq 1 .ssHid.u32Limit resd 1 .ssHid.Attr resd 1 .dsHid.u64Base resq 1 .dsHid.u32Limit resd 1 .dsHid.Attr resd 1 .fsHid.u64Base resq 1 .fsHid.u32Limit resd 1 .fsHid.Attr resd 1 .gsHid.u64Base resq 1 .gsHid.u32Limit resd 1 .gsHid.Attr resd 1 endstruc struc CPUMCTX .fpu resb 512 .edi resq 1 .esi resq 1 .ebp resq 1 .eax resq 1 .ebx resq 1 .edx resq 1 .ecx resq 1 .esp resq 1 .lss_esp resd 1 .ss resw 1 .ssPadding resw 1 .gs resw 1 .gsPadding resw 1 .fs resw 1 .fsPadding resw 1 .es resw 1 .esPadding resw 1 .ds resw 1 .dsPadding resw 1 .cs resw 1 .csPadding resw 3 .eflags resq 1 .eip resq 1 .r8 resq 1 .r9 resq 1 .r10 resq 1 .r11 resq 1 .r12 resq 1 .r13 resq 1 .r14 resq 1 .r15 resq 1 .esHid.u64Base resq 1 .esHid.u32Limit resd 1 .esHid.Attr resd 1 .csHid.u64Base resq 1 .csHid.u32Limit resd 1 .csHid.Attr resd 1 .ssHid.u64Base resq 1 .ssHid.u32Limit resd 1 .ssHid.Attr resd 1 .dsHid.u64Base resq 1 .dsHid.u32Limit resd 1 .dsHid.Attr resd 1 .fsHid.u64Base resq 1 .fsHid.u32Limit resd 1 .fsHid.Attr resd 1 .gsHid.u64Base resq 1 .gsHid.u32Limit resd 1 .gsHid.Attr resd 1 .cr0 resq 1 .cr2 resq 1 .cr3 resq 1 .cr4 resq 1 .dr resq 8 .gdtr.cbGdt resw 1 .gdtr.pGdt resq 1 .gdtrPadding resw 1 .idtr.cbIdt resw 1 .idtr.pIdt resq 1 .idtrPadding resw 1 .ldtr resw 1 .ldtrPadding resw 1 .tr resw 1 .trPadding resw 1 .SysEnter.cs resb 8 .SysEnter.eip resb 8 .SysEnter.esp resb 8 .msrEFER resb 8 .msrSTAR resb 8 .msrPAT resb 8 .msrLSTAR resb 8 .msrCSTAR resb 8 .msrSFMASK resb 8 .msrKERNELGSBASE resb 8 .ldtrHid.u64Base resq 1 .ldtrHid.u32Limit resd 1 .ldtrHid.Attr resd 1 .trHid.u64Base resq 1 .trHid.u32Limit resd 1 .trHid.Attr resd 1 ; padding ;;; .padding resd 6 endstruc ;;/* Guest MSR state. */ struc CPUMCTXMSR .au64 resq 64 endstruc ;; ; FPU/XMM state ;; struc X86FXSTATE ;/** Control word. */ .FCW resw 1 ;/** Status word. */ .FSW resw 1 ;/** Tag word (it's a byte actually). */ .FTW resb 1 .huh1 resb 1 ;/** Opcode. */ .FOP resw 1 ;/** Instruction pointer. */ .FPUIP resd 1 ;/** Code selector. */ .CS resw 1 .Rsvrd1 resw 1 ;/* - offset 16 - */ ;/** Data pointer. */ .FPUDP resd 1 ;/** Data segment */ .DS resw 1 .Rsrvd2 resw 1 .MXCSR resd 1 .MXCSR_MASK resd 1 ;/* - offset 32 - */ ; FPU & MMX registers .aRegs resq 8*2 ;/* - offset 160 - */ ;/* 8 XMM registers in 32 bits mode; 16 in long mode */ .aXMM resq 16*2 ;/* - offset 416 - */ .au32RsrvdRest resd (512 - 416) / 4 endstruc %endif