Changeset 99296 in vbox
- Timestamp:
- Apr 5, 2023 10:15:47 AM (18 months ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 3 edited
-
VMMAll/IEMAllInstructionsPython.py (modified) (1 diff)
-
VMMAll/IEMAllThreadedPython.py (modified) (7 diffs)
-
include/IEMInline.h (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
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trunk/src/VBox/VMM/VMMAll/IEMAllInstructionsPython.py
r99288 r99296 2000 2000 # Note! We split this one up into IEM_MC_LOCAL_VAR and IEM_MC_ARG_LOCAL_REF. 2001 2001 return ( 2002 McStmtVar('IEM_MC_LOCAL _VAR', ['uint32_t', asParams[1],], 'uint32_t', asParams[1]),2003 McStmtArg('IEM_MC_ARG_LOCAL_REF', ['uint32_t *', asParams[0], asParams[ 2], asParams[1]],2002 McStmtVar('IEM_MC_LOCAL', ['uint32_t', asParams[1],], 'uint32_t', asParams[1]), 2003 McStmtArg('IEM_MC_ARG_LOCAL_REF', ['uint32_t *', asParams[0], asParams[1], asParams[2]], 2004 2004 'uint32_t *', asParams[0], int(asParams[2]), sRef = asParams[1], sRefType = 'local'), 2005 2005 ); -
trunk/src/VBox/VMM/VMMAll/IEMAllThreadedPython.py
r99291 r99296 50 50 51 51 ## Number of generic parameters for the thread functions. 52 g_kcThreadedParams = 3;52 g_kcThreadedParams = 4; ## @todo 3 53 53 54 54 g_kdTypeInfo = { … … 101 101 """ 102 102 103 def __init__(self, sOrgRef, sType, oStmt, iParam = None, offParam = 0): 104 self.sOrgRef = sOrgRef; ##< The name / reference in the original code. 105 self.sStdRef = ''.join(sOrgRef.split()); ##< Normalized name to deal with spaces in macro invocations and such. 106 self.sType = sType; ##< The type (typically derived). 107 self.oStmt = oStmt; ##< The statement making the reference. 108 self.iParam = iParam; ##< The parameter containing the references. None if implicit. 109 self.offParam = offParam; ##< The offset in the parameter of the reference. 110 111 self.sNewName = 'x'; ##< The variable name in the threaded function. 112 self.iNewParam = 99; ##< The this is packed into. 113 self.offNewParam = 1024 ##< The bit offset in iNewParam. 103 def __init__(self, sOrgRef, sType, oStmt, iParam = None, offParam = 0, sStdRef = None): 104 ## The name / reference in the original code. 105 self.sOrgRef = sOrgRef; 106 ## Normalized name to deal with spaces in macro invocations and such. 107 self.sStdRef = sStdRef if sStdRef else ''.join(sOrgRef.split()); 108 ## Indicates that sOrgRef may not match the parameter. 109 self.fCustomRef = sStdRef is not None; 110 ## The type (typically derived). 111 self.sType = sType; 112 ## The statement making the reference. 113 self.oStmt = oStmt; 114 ## The parameter containing the references. None if implicit. 115 self.iParam = iParam; 116 ## The offset in the parameter of the reference. 117 self.offParam = offParam; 118 119 ## The variable name in the threaded function. 120 self.sNewName = 'x'; 121 ## The this is packed into. 122 self.iNewParam = 99; 123 ## The bit offset in iNewParam. 124 self.offNewParam = 1024 114 125 115 126 … … 258 269 sBaseType = self.analyzeCallToType('pImpl'); 259 270 offBits = sMember.rfind('U') + 1; 260 if sBaseType == 'PCIEMOPBINSIZES': return 'PFNIEMAIMPLBIN '+ sMember[offBits:];261 if sBaseType == 'PCIEMOPUNARYSIZES': return 'PFNIEMAIMPLBIN '+ sMember[offBits:];262 if sBaseType == 'PCIEMOPSHIFTSIZES': return 'PFNIEMAIMPLSHIFT '+ sMember[offBits:];271 if sBaseType == 'PCIEMOPBINSIZES': return 'PFNIEMAIMPLBINU' + sMember[offBits:]; 272 if sBaseType == 'PCIEMOPUNARYSIZES': return 'PFNIEMAIMPLBINU' + sMember[offBits:]; 273 if sBaseType == 'PCIEMOPSHIFTSIZES': return 'PFNIEMAIMPLSHIFTU' + sMember[offBits:]; 263 274 if sBaseType == 'PCIEMOPSHIFTDBLSIZES': return 'PFNIEMAIMPLSHIFTDBLU' + sMember[offBits:]; 264 275 if sBaseType == 'PCIEMOPMULDIVSIZES': return 'PFNIEMAIMPLMULDIVU' + sMember[offBits:]; … … 273 284 self.raiseProblem('Unknown call reference: %s' % (sFnRef,)); 274 285 return None; # Shut up pylint 2.16.2. 286 287 def analyze8BitGRegStmt(self, oStmt): 288 """ 289 Gets the 8-bit general purpose register access details of the given statement. 290 ASSUMES the statement is one accessing an 8-bit GREG. 291 """ 292 idxReg = 0; 293 if ( oStmt.sName.find('_STORE_') > 0 294 or oStmt.sName.find('_REF_') > 0 295 or oStmt.sName.find('_TO_LOCAL') > 0): 296 idxReg = 1; 297 298 sRegRef = oStmt.asParams[idxReg]; 299 sOrgExpr = '((%s) < 4 || (pVCpu->iem.s.fPrefixes & IEM_OP_PRF_REX) ? (%s) : (%s) | 16)' % (sRegRef, sRegRef, sRegRef); 300 301 if sRegRef.find('IEM_GET_MODRM_RM') > 0: sStdRef = 'bRmRm8Ex'; 302 elif sRegRef.find('IEM_GET_MODRM_REG') > 0: sStdRef = 'bRmReg8Ex'; 303 else: sStdRef = 'bOther8Ex'; 304 305 return (idxReg, sOrgExpr, sStdRef); 306 275 307 276 308 def analyzeMorphStmtForThreaded(self, aoStmts, iParamRef = 0): … … 312 344 #print('iCurRef=%s iParam=%s sOrgRef=%s' % (iCurRef, oCurRef.iParam, oCurRef.sOrgRef)); 313 345 sSrcParam = oNewStmt.asParams[oCurRef.iParam]; 314 assert sSrcParam[oCurRef.offParam : oCurRef.offParam + len(oCurRef.sOrgRef)] == oCurRef.sOrgRef, \ 346 assert ( sSrcParam[oCurRef.offParam : oCurRef.offParam + len(oCurRef.sOrgRef)] == oCurRef.sOrgRef 347 or oCurRef.fCustomRef), \ 315 348 'offParam=%s sOrgRef=%s sSrcParam=%s<eos>' % (oCurRef.offParam, oCurRef.sOrgRef, sSrcParam); 316 349 oNewStmt.asParams[oCurRef.iParam] = sSrcParam[0 : oCurRef.offParam] \ … … 345 378 oNewStmt.sName += '_THREADED'; 346 379 380 # ... and IEM_MC_*_GREG_U8 into *_THREADED w/ reworked index taking REX into account 381 elif oNewStmt.sName.startswith('IEM_MC_') and oNewStmt.sName.find('_GREG_U8') > 0: 382 (idxReg, sOrgRef, sStdRef) = self.analyze8BitGRegStmt(oNewStmt); 383 oNewStmt.asParams[idxReg] = self.dParamRefs[sStdRef][0].sNewName; 384 oNewStmt.sName += '_THREADED'; 385 347 386 # ... and IEM_MC_CALL_CIMPL_[0-5] into *_THREADED ... 348 387 elif oNewStmt.sName.startswith('IEM_MC_CALL_CIMPL_'): … … 483 522 self.aoParamRefs.append(ThreadedParamRef('u32Disp', 'uint32_t', oStmt)); 484 523 self.aoParamRefs.append(ThreadedParamRef('cbInstr', 'uint4_t', oStmt)); 524 525 # 8-bit register accesses needs to have their index argument reworked to take REX into account. 526 # ... and IEM_MC_*_GREG_U8 into *_THREADED w/ reworked index taking REX into account 527 if oStmt.sName.startswith('IEM_MC_') and oStmt.sName.find('_GREG_U8') > 0: 528 (idxReg, sOrgRef, sStdRef) = self.analyze8BitGRegStmt(oStmt); 529 self.aoParamRefs.append(ThreadedParamRef(sOrgRef, 'uint4_t', oStmt, idxReg, sStdRef = sStdRef)); 485 530 486 531 # Inspect the target of calls to see if we need to pass down a -
trunk/src/VBox/VMM/include/IEMInline.h
r98969 r99296 1549 1549 1550 1550 /** 1551 * Gets a reference (pointer) to the specified 8-bit general purpose register, 1552 * alternative version with extended register index. 1553 * 1554 * @returns Register reference. 1555 * @param pVCpu The cross context virtual CPU structure of the calling thread. 1556 * @param iRegEx The register. The 16 first are regular ones, 1557 * whereas 16 thru 19 maps to AH, CH, DH and BH. 1558 */ 1559 DECLINLINE(uint8_t *) iemGRegRefU8Ex(PVMCPUCC pVCpu, uint8_t iRegEx) RT_NOEXCEPT 1560 { 1561 if (iRegEx < 16) 1562 return &pVCpu->cpum.GstCtx.aGRegs[iRegEx].u8; 1563 1564 /* high 8-bit register. */ 1565 Assert(iRegEx < 20); 1566 return &pVCpu->cpum.GstCtx.aGRegs[iRegEx & 3].bHi; 1567 } 1568 1569 1570 /** 1551 1571 * Gets a reference (pointer) to the specified 16-bit general purpose register. 1552 1572 *
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