Changeset 99208 in vbox
- Timestamp:
- Mar 29, 2023 2:13:56 PM (18 months ago)
- Location:
- trunk
- Files:
-
- 26 edited
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include/VBox/dis.h (modified) (1 diff)
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include/VBox/types.h (modified) (1 diff)
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include/VBox/vmm/cpumdis.h (modified) (1 diff)
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include/VBox/vmm/em.h (modified) (1 diff)
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include/VBox/vmm/gcm.h (modified) (1 diff)
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include/VBox/vmm/gim.h (modified) (1 diff)
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src/VBox/Devices/BiosCommonCode/MakeAlternativeSource.cpp (modified) (5 diffs)
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src/VBox/Runtime/testcase/tstLdr-2.cpp (modified) (2 diffs)
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src/VBox/Runtime/testcase/tstLdr-3.cpp (modified) (5 diffs)
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src/VBox/Runtime/testcase/tstLdrDisasmTest.cpp (modified) (4 diffs)
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src/VBox/Runtime/testcase/tstLdrObjR0.cpp (modified) (1 diff)
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src/VBox/VMM/VMMAll/EMAll.cpp (modified) (5 diffs)
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src/VBox/VMM/VMMAll/GCMAll.cpp (modified) (2 diffs)
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src/VBox/VMM/VMMAll/GIMAll.cpp (modified) (3 diffs)
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src/VBox/VMM/VMMAll/GIMAllHv.cpp (modified) (2 diffs)
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src/VBox/VMM/VMMAll/GIMAllKvm.cpp (modified) (2 diffs)
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src/VBox/VMM/VMMAll/PGMAllPhys.cpp (modified) (1 diff)
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src/VBox/VMM/VMMAll/PGMAllPool.cpp (modified) (6 diffs)
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src/VBox/VMM/VMMR3/CPUM.cpp (modified) (5 diffs)
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src/VBox/VMM/VMMR3/HM.cpp (modified) (2 diffs)
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src/VBox/VMM/include/EMInternal.h (modified) (1 diff)
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src/VBox/VMM/include/GIMHvInternal.h (modified) (1 diff)
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src/VBox/VMM/include/GIMKvmInternal.h (modified) (1 diff)
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src/VBox/VMM/include/HMInternal.h (modified) (1 diff)
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src/VBox/VMM/include/PGMInternal.h (modified) (1 diff)
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src/VBox/VMM/testcase/tstVMStructSize.cpp (modified) (2 diffs)
Legend:
- Unmodified
- Added
- Removed
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trunk/include/VBox/dis.h
r98103 r99208 700 700 AssertCompileSize(DISSTATE, 0xd8); 701 701 702 /** @deprecated Use DISSTATE and change Cpu and DisState to Dis. */703 typedef DISSTATE DISCPUSTATE;704 705 702 706 703 -
trunk/include/VBox/types.h
r98972 r99208 1223 1223 typedef struct DISSTATE const *PCDISSTATE; 1224 1224 1225 /** @deprecated PDISSTATE and change pCpu and pDisState to pDis. */1226 typedef PDISSTATE PDISCPUSTATE;1227 /** @deprecated PCDISSTATE and change pCpu and pDisState to pDis. */1228 typedef PCDISSTATE PCDISCPUSTATE;1229 1230 1225 1231 1226 /** -
trunk/include/VBox/vmm/cpumdis.h
r98103 r99208 51 51 52 52 #ifdef IN_RING3 53 VMMR3DECL(int) CPUMR3DisasmInstrCPU(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, RTGCPTR GCPtrPC, PDIS CPUSTATE pCpu, const char *pszPrefix);53 VMMR3DECL(int) CPUMR3DisasmInstrCPU(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, RTGCPTR GCPtrPC, PDISSTATE pDis, const char *pszPrefix); 54 54 #endif 55 55 -
trunk/include/VBox/vmm/em.h
r98103 r99208 268 268 /** @name Deprecated interpretation related APIs (use IEM). 269 269 * @{ */ 270 VMM_INT_DECL(int) EMInterpretDisasCurrent(PVMCPUCC pVCpu, PDIS CPUSTATE pCpu, unsigned *pcbInstr);270 VMM_INT_DECL(int) EMInterpretDisasCurrent(PVMCPUCC pVCpu, PDISSTATE pDis, unsigned *pcbInstr); 271 271 VMM_INT_DECL(int) EMInterpretDisasOneEx(PVMCPUCC pVCpu, RTGCUINTPTR GCPtrInstr, 272 PDIS CPUSTATE pDISState, unsigned *pcbInstr);272 PDISSTATE pDis, unsigned *pcbInstr); 273 273 VMM_INT_DECL(VBOXSTRICTRC) EMInterpretInstruction(PVMCPUCC pVCpu); 274 VMM_INT_DECL(VBOXSTRICTRC) EMInterpretInstructionDisasState(PVMCPUCC pVCpu, PDIS CPUSTATE pDis, uint64_t rip);274 VMM_INT_DECL(VBOXSTRICTRC) EMInterpretInstructionDisasState(PVMCPUCC pVCpu, PDISSTATE pDis, uint64_t rip); 275 275 /** @} */ 276 276 -
trunk/include/VBox/vmm/gcm.h
r98103 r99208 87 87 VMMDECL(bool) GCMIsEnabled(PVM pVM); 88 88 VMM_INT_DECL(bool) GCMShouldTrapXcptDE(PVMCPUCC pVCpu); 89 VMM_INT_DECL(VBOXSTRICTRC) GCMXcptDE(PVMCPUCC pVCpu, PCPUMCTX pCtx, PDIS CPUSTATE pDis, uint8_t *pcbInstr);89 VMM_INT_DECL(VBOXSTRICTRC) GCMXcptDE(PVMCPUCC pVCpu, PCPUMCTX pCtx, PDISSTATE pDis, uint8_t *pcbInstr); 90 90 /** @} */ 91 91 -
trunk/include/VBox/vmm/gim.h
r98980 r99208 205 205 VMM_INT_DECL(VBOXSTRICTRC) GIMHypercallEx(PVMCPUCC pVCpu, PCPUMCTX pCtx, unsigned uDisOpcode, uint8_t cbInstr); 206 206 VMM_INT_DECL(VBOXSTRICTRC) GIMExecHypercallInstr(PVMCPUCC pVCpu, PCPUMCTX pCtx, uint8_t *pcbInstr); 207 VMM_INT_DECL(VBOXSTRICTRC) GIMXcptUD(PVMCPUCC pVCpu, PCPUMCTX pCtx, PDIS CPUSTATE pDis, uint8_t *pcbInstr);207 VMM_INT_DECL(VBOXSTRICTRC) GIMXcptUD(PVMCPUCC pVCpu, PCPUMCTX pCtx, PDISSTATE pDis, uint8_t *pcbInstr); 208 208 VMM_INT_DECL(bool) GIMShouldTrapXcptUD(PVMCPUCC pVCpu); 209 209 #if !defined(VBOX_VMM_TARGET_ARMV8) -
trunk/src/VBox/Devices/BiosCommonCode/MakeAlternativeSource.cpp
r98103 r99208 910 910 911 911 912 static bool disAccessesMemory(PCDIS CPUSTATE pCpuState)913 { 914 PCDISOPCODE pCurInstr = p CpuState->pCurInstr;915 return disIsMemoryParameter(&p CpuState->Param1, pCurInstr->fParam1)916 || disIsMemoryParameter(&p CpuState->Param2, pCurInstr->fParam2)917 || disIsMemoryParameter(&p CpuState->Param3, pCurInstr->fParam3)918 || disIsMemoryParameter(&p CpuState->Param4, pCurInstr->fParam4);912 static bool disAccessesMemory(PCDISSTATE pDis) 913 { 914 PCDISOPCODE pCurInstr = pDis->pCurInstr; 915 return disIsMemoryParameter(&pDis->Param1, pCurInstr->fParam1) 916 || disIsMemoryParameter(&pDis->Param2, pCurInstr->fParam2) 917 || disIsMemoryParameter(&pDis->Param3, pCurInstr->fParam3) 918 || disIsMemoryParameter(&pDis->Param4, pCurInstr->fParam4); 919 919 } 920 920 … … 923 923 * Deals with instructions that YASM will assemble differently than WASM/WCC. 924 924 */ 925 static size_t disHandleYasmDifferences(PDIS CPUSTATE pCpuState, uint32_t uFlatAddr, uint32_t cbInstr,925 static size_t disHandleYasmDifferences(PDISSTATE pDis, uint32_t uFlatAddr, uint32_t cbInstr, 926 926 char *pszBuf, size_t cbBuf, size_t cchUsed) 927 927 { 928 bool fDifferent = DISFormatYasmIsOddEncoding(p CpuState);928 bool fDifferent = DISFormatYasmIsOddEncoding(pDis); 929 929 uint8_t const *pb = &g_pbImg[uFlatAddr - g_uBiosFlatBase]; 930 930 … … 935 935 * modrm.reg != 0. Those encodings should be invalid AFAICT. */ 936 936 937 if ( ( p CpuState->bOpCode == 0x8f /* group 1a */938 || p CpuState->bOpCode == 0xc7 /* group 11 */939 || p CpuState->bOpCode == 0xc6 /* group 11 - not verified */937 if ( ( pDis->bOpCode == 0x8f /* group 1a */ 938 || pDis->bOpCode == 0xc7 /* group 11 */ 939 || pDis->bOpCode == 0xc6 /* group 11 - not verified */ 940 940 ) 941 && p CpuState->ModRM.Bits.Reg != 0)941 && pDis->ModRM.Bits.Reg != 0) 942 942 fDifferent = true; 943 943 /* … … 986 986 * @remarks @a uSrcAddr is the flat address. 987 987 */ 988 static DECLCALLBACK(int) disReadOpcodeBytes(PDIS CPUSTATE pDis, uint8_t offInstr, uint8_t cbMinRead, uint8_t cbMaxRead)988 static DECLCALLBACK(int) disReadOpcodeBytes(PDISSTATE pDis, uint8_t offInstr, uint8_t cbMinRead, uint8_t cbMaxRead) 989 989 { 990 990 RT_NOREF_PV(cbMinRead); … … 1136 1136 else 1137 1137 { 1138 unsigned cbInstr;1139 DIS CPUSTATE CpuState;1140 CpuState.ModRM.Bits.Mod = 3;1138 unsigned cbInstr; 1139 DISSTATE Dis; 1140 Dis.ModRM.Bits.Mod = 3; 1141 1141 int rc = DISInstrWithReader(uFlatAddr, fIs16Bit ? DISCPUMODE_16BIT : DISCPUMODE_32BIT, 1142 disReadOpcodeBytes, NULL, & CpuState, &cbInstr);1142 disReadOpcodeBytes, NULL, &Dis, &cbInstr); 1143 1143 if ( RT_SUCCESS(rc) 1144 1144 && cbInstr <= cb 1145 && CpuState.pCurInstr1146 && CpuState.pCurInstr->uOpcode != OP_INVALID1147 && CpuState.pCurInstr->uOpcode != OP_ILLUD21148 && ( !( CpuState.fPrefix & DISPREFIX_ADDRSIZE)1149 || disAccessesMemory(& CpuState)))1145 && Dis.pCurInstr 1146 && Dis.pCurInstr->uOpcode != OP_INVALID 1147 && Dis.pCurInstr->uOpcode != OP_ILLUD2 1148 && ( !(Dis.fPrefix & DISPREFIX_ADDRSIZE) 1149 || disAccessesMemory(&Dis))) 1150 1150 { 1151 1151 char szTmp[4096]; 1152 size_t cch = DISFormatYasmEx(& CpuState, szTmp, sizeof(szTmp),1152 size_t cch = DISFormatYasmEx(&Dis, szTmp, sizeof(szTmp), 1153 1153 DIS_FMT_FLAGS_STRICT 1154 1154 | DIS_FMT_FLAGS_BYTES_RIGHT | DIS_FMT_FLAGS_BYTES_COMMENT | DIS_FMT_FLAGS_BYTES_SPACED, 1155 1155 NULL, NULL); 1156 cch = disHandleYasmDifferences(& CpuState, uFlatAddr, cbInstr, szTmp, sizeof(szTmp), cch);1156 cch = disHandleYasmDifferences(&Dis, uFlatAddr, cbInstr, szTmp, sizeof(szTmp), cch); 1157 1157 Assert(cch < sizeof(szTmp)); 1158 1158 -
trunk/src/VBox/Runtime/testcase/tstLdr-2.cpp
r98103 r99208 51 51 bool MyDisBlock(uint8_t const *pbCodeBlock, int32_t cbMax) 52 52 { 53 DIS CPUSTATE Cpu;53 DISSTATE Dis; 54 54 int32_t i = 0; 55 55 while (i < cbMax) … … 57 57 char szOutput[256]; 58 58 uint32_t cbInstr; 59 if (RT_FAILURE(DISInstrToStr(pbCodeBlock + i, DISCPUMODE_32BIT, & Cpu, &cbInstr, szOutput, sizeof(szOutput))))59 if (RT_FAILURE(DISInstrToStr(pbCodeBlock + i, DISCPUMODE_32BIT, &Dis, &cbInstr, szOutput, sizeof(szOutput)))) 60 60 return false; 61 61 -
trunk/src/VBox/Runtime/testcase/tstLdr-3.cpp
r98103 r99208 137 137 } 138 138 139 static DECLCALLBACK(int) MyGetSymbol(PCDIS CPUSTATE pCpu, uint32_t u32Sel, RTUINTPTR uAddress,139 static DECLCALLBACK(int) MyGetSymbol(PCDISSTATE pDis, uint32_t u32Sel, RTUINTPTR uAddress, 140 140 char *pszBuf, size_t cchBuf, RTINTPTR *poff, 141 141 void *pvUser) 142 142 { 143 RT_NOREF3(p Cpu, u32Sel, pvUser);143 RT_NOREF3(pDis, u32Sel, pvUser); 144 144 145 145 if ( uAddress > RTLdrSize(g_hLdrMod) + g_uLoadAddr … … 161 161 * @callback_method_impl{FNDISREADBYTES} 162 162 */ 163 static DECLCALLBACK(int) MyReadBytes(PDIS CPUSTATE pDis, uint8_t offInstr, uint8_t cbMinRead, uint8_t cbMaxRead)163 static DECLCALLBACK(int) MyReadBytes(PDISSTATE pDis, uint8_t offInstr, uint8_t cbMinRead, uint8_t cbMaxRead) 164 164 { 165 165 RT_NOREF1(cbMaxRead); … … 174 174 RTUINTPTR uNearAddr, RTUINTPTR uSearchAddr) 175 175 { 176 DIS CPUSTATE Cpu;177 int32_t i = 0;176 DISSTATE Dis; 177 int32_t i = 0; 178 178 while (i < cbMax) 179 179 { … … 184 184 int rc = DISInstrWithReader(uNearAddr + i, enmCpuMode, 185 185 MyReadBytes, (uint8_t *)pvCodeBlock - (uintptr_t)uNearAddr, 186 & Cpu, &cbInstr);186 &Dis, &cbInstr); 187 187 RTAssertSetMayPanic(fMayPanic); 188 188 RTAssertSetQuiet(fQuiet); … … 195 195 RTPrintf("%s:\n", NearSym.aSyms[0].szName); 196 196 197 DISFormatYasmEx(& Cpu, szOutput, sizeof(szOutput),197 DISFormatYasmEx(&Dis, szOutput, sizeof(szOutput), 198 198 DIS_FMT_FLAGS_RELATIVE_BRANCH | DIS_FMT_FLAGS_BYTES_RIGHT | DIS_FMT_FLAGS_ADDR_LEFT | DIS_FMT_FLAGS_BYTES_SPACED, 199 199 MyGetSymbol, NULL); -
trunk/src/VBox/Runtime/testcase/tstLdrDisasmTest.cpp
r98103 r99208 93 93 * @callback_method_impl{FNDISREADBYTES} 94 94 */ 95 static DECLCALLBACK(int) DisasmTest1ReadCode(PDIS CPUSTATE pDis, uint8_t offInstr, uint8_t cbMinRead, uint8_t cbMaxRead)95 static DECLCALLBACK(int) DisasmTest1ReadCode(PDISSTATE pDis, uint8_t offInstr, uint8_t cbMinRead, uint8_t cbMaxRead) 96 96 { 97 97 size_t cb = cbMaxRead; … … 107 107 * Use an inline function here just to test '__textcoal_nt' sections on darwin. 108 108 */ 109 inline int MyDisasm(uintptr_t CodeIndex, PDIS CPUSTATE pCpu, uint32_t *pcb)109 inline int MyDisasm(uintptr_t CodeIndex, PDISSTATE pDis, uint32_t *pcb) 110 110 { 111 111 uint32_t cb; 112 int rc = DISInstrWithReader(CodeIndex, DISCPUMODE_32BIT, DisasmTest1ReadCode, 0, p Cpu, &cb);112 int rc = DISInstrWithReader(CodeIndex, DISCPUMODE_32BIT, DisasmTest1ReadCode, 0, pDis, &cb); 113 113 *pcb = cb; 114 114 MY_PRINTF(("DISCoreOneEx -> rc=%d cb=%d Cpu: bOpCode=%#x pCurInstr=%p (42=%d)\n", \ 115 rc, cb, p Cpu->bOpCode, pCpu->pCurInstr, 42)); \115 rc, cb, pDis->bOpCode, pDis->pCurInstr, 42)); \ 116 116 return rc; 117 117 } … … 120 120 extern "C" DECLEXPORT(int) DisasmTest1(void) 121 121 { 122 DIS CPUSTATE Cpu;122 DISSTATE Dis; 123 123 uintptr_t CodeIndex = 0; 124 124 uint32_t cb; … … 140 140 #endif 141 141 142 memset(& Cpu, 0, sizeof(Cpu));142 memset(&Dis, 0, sizeof(Dis)); 143 143 144 144 #define DISAS_AND_CHECK(cbInstr, enmOp) \ 145 145 do { \ 146 rc = MyDisasm(CodeIndex, & Cpu, &cb); \146 rc = MyDisasm(CodeIndex, &Dis, &cb); \ 147 147 if (RT_FAILURE(rc)) \ 148 148 return CodeIndex | 0xf000; \ 149 if ( Cpu.pCurInstr->uOpcode != (enmOp)) \149 if (Dis.pCurInstr->uOpcode != (enmOp)) \ 150 150 return CodeIndex| 0xe000; \ 151 151 if (cb != (cbInstr)) \ -
trunk/src/VBox/Runtime/testcase/tstLdrObjR0.cpp
r98103 r99208 103 103 { 104 104 static unsigned cb; 105 DIS CPUSTATE Cpu;105 DISSTATE Dis; 106 106 107 memset(& Cpu, 0, sizeof(Cpu));107 memset(&Dis, 0, sizeof(Dis)); 108 108 109 DISInstr((void *)(uintptr_t)SomeExportFunction3, DISCPUMODE_32BIT, & Cpu, &cb);109 DISInstr((void *)(uintptr_t)SomeExportFunction3, DISCPUMODE_32BIT, &Dis, &cb); 110 110 return (void *)(uintptr_t)&SomeExportFunction1; 111 111 } -
trunk/src/VBox/VMM/VMMAll/EMAll.cpp
r99051 r99208 854 854 * @callback_method_impl{FNDISREADBYTES} 855 855 */ 856 static DECLCALLBACK(int) emReadBytes(PDIS CPUSTATE pDis, uint8_t offInstr, uint8_t cbMinRead, uint8_t cbMaxRead)856 static DECLCALLBACK(int) emReadBytes(PDISSTATE pDis, uint8_t offInstr, uint8_t cbMinRead, uint8_t cbMaxRead) 857 857 { 858 858 PVMCPUCC pVCpu = (PVMCPUCC)pDis->pvUser; … … 911 911 * @param pcbInstr Where to return the instruction size. (optional) 912 912 */ 913 VMM_INT_DECL(int) EMInterpretDisasCurrent(PVMCPUCC pVCpu, PDIS CPUSTATE pDis, unsigned *pcbInstr)913 VMM_INT_DECL(int) EMInterpretDisasCurrent(PVMCPUCC pVCpu, PDISSTATE pDis, unsigned *pcbInstr) 914 914 { 915 915 #if defined(VBOX_VMM_TARGET_ARMV8) … … 947 947 * @param pcbInstr Where to return the instruction size. (optional) 948 948 */ 949 VMM_INT_DECL(int) EMInterpretDisasOneEx(PVMCPUCC pVCpu, RTGCUINTPTR GCPtrInstr, PDIS CPUSTATE pDis, unsigned *pcbInstr)949 VMM_INT_DECL(int) EMInterpretDisasOneEx(PVMCPUCC pVCpu, RTGCUINTPTR GCPtrInstr, PDISSTATE pDis, unsigned *pcbInstr) 950 950 { 951 951 DISCPUMODE enmCpuMode = CPUMGetGuestDisMode(pVCpu); … … 994 994 995 995 /** 996 * Interprets the current instruction using the supplied DIS CPUSTATE structure.996 * Interprets the current instruction using the supplied DISSTATE structure. 997 997 * 998 998 * IP/EIP/RIP *IS* updated! … … 1017 1017 * Make sure this can't happen!! (will add some assertions/checks later) 1018 1018 */ 1019 VMM_INT_DECL(VBOXSTRICTRC) EMInterpretInstructionDisasState(PVMCPUCC pVCpu, PDIS CPUSTATE pDis, uint64_t rip)1019 VMM_INT_DECL(VBOXSTRICTRC) EMInterpretInstructionDisasState(PVMCPUCC pVCpu, PDISSTATE pDis, uint64_t rip) 1020 1020 { 1021 1021 LogFlow(("EMInterpretInstructionDisasState %RGv\n", (RTGCPTR)rip)); -
trunk/src/VBox/VMM/VMMAll/GCMAll.cpp
r98103 r99208 35 35 #include <VBox/vmm/vmcc.h> 36 36 37 #include <VBox/dis.h> /* For DIS CPUSTATE */37 #include <VBox/dis.h> /* For DISSTATE */ 38 38 #include <iprt/errcore.h> 39 39 #include <iprt/string.h> … … 113 113 * @thread EMT(pVCpu). 114 114 */ 115 VMM_INT_DECL(VBOXSTRICTRC) GCMXcptDE(PVMCPUCC pVCpu, PCPUMCTX pCtx, PDIS CPUSTATE pDis, uint8_t *pcbInstr)115 VMM_INT_DECL(VBOXSTRICTRC) GCMXcptDE(PVMCPUCC pVCpu, PCPUMCTX pCtx, PDISSTATE pDis, uint8_t *pcbInstr) 116 116 { 117 117 PVMCC pVM = pVCpu->CTX_SUFF(pVM); -
trunk/src/VBox/VMM/VMMAll/GIMAll.cpp
r99051 r99208 36 36 #include <VBox/vmm/vmcc.h> 37 37 38 #include <VBox/dis.h> /* For DIS CPUSTATE */38 #include <VBox/dis.h> /* For DISSTATE */ 39 39 #include <VBox/err.h> 40 40 #include <iprt/string.h> … … 249 249 return VERR_GIM_NOT_ENABLED; 250 250 251 unsigned cbInstr;252 DIS CPUSTATE Dis;251 unsigned cbInstr; 252 DISSTATE Dis; 253 253 int rc = EMInterpretDisasCurrent(pVCpu, &Dis, &cbInstr); 254 254 if (RT_SUCCESS(rc)) … … 363 363 * @thread EMT(pVCpu). 364 364 */ 365 VMM_INT_DECL(VBOXSTRICTRC) GIMXcptUD(PVMCPUCC pVCpu, PCPUMCTX pCtx, PDIS CPUSTATE pDis, uint8_t *pcbInstr)365 VMM_INT_DECL(VBOXSTRICTRC) GIMXcptUD(PVMCPUCC pVCpu, PCPUMCTX pCtx, PDISSTATE pDis, uint8_t *pcbInstr) 366 366 { 367 367 PVMCC pVM = pVCpu->CTX_SUFF(pVM); -
trunk/src/VBox/VMM/VMMAll/GIMAllHv.cpp
r98103 r99208 1461 1461 * @thread EMT(pVCpu). 1462 1462 */ 1463 VMM_INT_DECL(VBOXSTRICTRC) gimHvXcptUD(PVMCPUCC pVCpu, PCPUMCTX pCtx, PDIS CPUSTATE pDis, uint8_t *pcbInstr)1463 VMM_INT_DECL(VBOXSTRICTRC) gimHvXcptUD(PVMCPUCC pVCpu, PCPUMCTX pCtx, PDISSTATE pDis, uint8_t *pcbInstr) 1464 1464 { 1465 1465 VMCPU_ASSERT_EMT(pVCpu); … … 1477 1477 * or the AMD VMMCALL instruction and if so, handle it as a hypercall. 1478 1478 */ 1479 unsigned cbInstr;1480 DIS CPUSTATE Dis;1479 unsigned cbInstr; 1480 DISSTATE Dis; 1481 1481 int rc = EMInterpretDisasCurrent(pVCpu, &Dis, &cbInstr); 1482 1482 if (RT_SUCCESS(rc)) -
trunk/src/VBox/VMM/VMMAll/GIMAllKvm.cpp
r98103 r99208 420 420 * @thread EMT(pVCpu). 421 421 */ 422 VMM_INT_DECL(VBOXSTRICTRC) gimKvmXcptUD(PVMCC pVM, PVMCPUCC pVCpu, PCPUMCTX pCtx, PDIS CPUSTATE pDis, uint8_t *pcbInstr)422 VMM_INT_DECL(VBOXSTRICTRC) gimKvmXcptUD(PVMCC pVM, PVMCPUCC pVCpu, PCPUMCTX pCtx, PDISSTATE pDis, uint8_t *pcbInstr) 423 423 { 424 424 VMCPU_ASSERT_EMT(pVCpu); … … 432 432 if (!pDis) 433 433 { 434 unsigned cbInstr;435 DIS CPUSTATE Dis;434 unsigned cbInstr; 435 DISSTATE Dis; 436 436 int rc = EMInterpretDisasCurrent(pVCpu, &Dis, &cbInstr); 437 437 if (RT_SUCCESS(rc)) -
trunk/src/VBox/VMM/VMMAll/PGMAllPhys.cpp
r98572 r99208 222 222 * we will simply skip it. Otherwise we'll have to defer it to REM. 223 223 */ 224 uint32_t cbOp;225 PDIS CPUSTATE pDis = &pVCpu->pgm.s.DisState;224 uint32_t cbOp; 225 PDISSTATE pDis = &pVCpu->pgm.s.Dis; 226 226 rc = EMInterpretDisasCurrent(pVCpu, pDis, &cbOp); 227 227 if ( RT_SUCCESS(rc) -
trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp
r99132 r99208 727 727 * @param offFault The access offset. 728 728 */ 729 DECLINLINE(bool) pgmRZPoolMonitorIsForking(PPGMPOOL pPool, PDIS CPUSTATE pDis, unsigned offFault)729 DECLINLINE(bool) pgmRZPoolMonitorIsForking(PPGMPOOL pPool, PDISSTATE pDis, unsigned offFault) 730 730 { 731 731 /* … … 771 771 * @remark The REP prefix check is left to the caller because of STOSD/W. 772 772 */ 773 DECLINLINE(bool) pgmRZPoolMonitorIsReused(PVMCC pVM, PVMCPUCC pVCpu, PCPUMCTX pCtx, PDIS CPUSTATE pDis, RTGCPTR pvFault,773 DECLINLINE(bool) pgmRZPoolMonitorIsReused(PVMCC pVM, PVMCPUCC pVCpu, PCPUMCTX pCtx, PDISSTATE pDis, RTGCPTR pvFault, 774 774 PPGMPOOLPAGE pPage) 775 775 { … … 885 885 * @todo VBOXSTRICTRC 886 886 */ 887 static int pgmRZPoolAccessPfHandlerFlush(PVMCC pVM, PVMCPUCC pVCpu, PPGMPOOL pPool, PPGMPOOLPAGE pPage, PDIS CPUSTATE pDis,887 static int pgmRZPoolAccessPfHandlerFlush(PVMCC pVM, PVMCPUCC pVCpu, PPGMPOOL pPool, PPGMPOOLPAGE pPage, PDISSTATE pDis, 888 888 PCPUMCTX pCtx, RTGCPHYS GCPhysFault) 889 889 { … … 937 937 * @param pvFault The fault address. 938 938 */ 939 DECLINLINE(int) pgmRZPoolAccessPfHandlerSTOSD(PVMCC pVM, PPGMPOOL pPool, PPGMPOOLPAGE pPage, PDIS CPUSTATE pDis,939 DECLINLINE(int) pgmRZPoolAccessPfHandlerSTOSD(PVMCC pVM, PPGMPOOL pPool, PPGMPOOLPAGE pPage, PDISSTATE pDis, 940 940 PCPUMCTX pCtx, RTGCPHYS GCPhysFault, RTGCPTR pvFault) 941 941 { … … 999 999 * @param pfReused Reused state (in/out) 1000 1000 */ 1001 DECLINLINE(int) pgmRZPoolAccessPfHandlerSimple(PVMCC pVM, PVMCPUCC pVCpu, PPGMPOOL pPool, PPGMPOOLPAGE pPage, PDIS CPUSTATE pDis,1001 DECLINLINE(int) pgmRZPoolAccessPfHandlerSimple(PVMCC pVM, PVMCPUCC pVCpu, PPGMPOOL pPool, PPGMPOOLPAGE pPage, PDISSTATE pDis, 1002 1002 PCPUMCTX pCtx, RTGCPHYS GCPhysFault, bool *pfReused) 1003 1003 { … … 1150 1150 * Disassemble the faulting instruction. 1151 1151 */ 1152 PDIS CPUSTATE pDis = &pVCpu->pgm.s.DisState;1152 PDISSTATE pDis = &pVCpu->pgm.s.Dis; 1153 1153 int rc = EMInterpretDisasCurrent(pVCpu, pDis, NULL); 1154 1154 if (RT_UNLIKELY(rc != VINF_SUCCESS)) -
trunk/src/VBox/VMM/VMMR3/CPUM.cpp
r99163 r99208 4287 4287 { 4288 4288 /** Pointer to the CPU structure. */ 4289 PDIS CPUSTATE pCpu;4289 PDISSTATE pDis; 4290 4290 /** Pointer to the VM. */ 4291 4291 PVM pVM; … … 4314 4314 * @callback_method_impl{FNDISREADBYTES} 4315 4315 */ 4316 static DECLCALLBACK(int) cpumR3DisasInstrRead(PDIS CPUSTATE pDis, uint8_t offInstr, uint8_t cbMinRead, uint8_t cbMaxRead)4316 static DECLCALLBACK(int) cpumR3DisasInstrRead(PDISSTATE pDis, uint8_t offInstr, uint8_t cbMinRead, uint8_t cbMaxRead) 4317 4317 { 4318 4318 PCPUMDISASSTATE pState = (PCPUMDISASSTATE)pDis->pvUser; … … 4387 4387 * @param pCtx Pointer to the guest CPU context. 4388 4388 * @param GCPtrPC Program counter (relative to CS) to disassemble from. 4389 * @param p CpuDisassembly state.4389 * @param pDis Disassembly state. 4390 4390 * @param pszPrefix String prefix for logging (debug only). 4391 4391 * 4392 4392 */ 4393 VMMR3DECL(int) CPUMR3DisasmInstrCPU(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, RTGCPTR GCPtrPC, PDIS CPUSTATE pCpu,4393 VMMR3DECL(int) CPUMR3DisasmInstrCPU(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, RTGCPTR GCPtrPC, PDISSTATE pDis, 4394 4394 const char *pszPrefix) 4395 4395 { … … 4398 4398 4399 4399 const PGMMODE enmMode = PGMGetGuestMode(pVCpu); 4400 State.p Cpu = pCpu;4400 State.pDis = pDis; 4401 4401 State.pvPageGC = 0; 4402 4402 State.pvPageR3 = NULL; … … 4446 4446 char szOutput[160]; 4447 4447 rc = DISInstrToStrWithReader(GCPtrPC, enmDisCpuMode, cpumR3DisasInstrRead, &State, 4448 p Cpu, &cbInstr, szOutput, sizeof(szOutput));4448 pDis, &cbInstr, szOutput, sizeof(szOutput)); 4449 4449 if (RT_SUCCESS(rc)) 4450 4450 { -
trunk/src/VBox/VMM/VMMR3/HM.cpp
r98103 r99208 2295 2295 */ 2296 2296 DBGFR3_DISAS_INSTR_CUR_LOG(pVCpu, "hmR3ReplaceTprInstr"); 2297 DIS CPUSTATEDis;2297 DISSTATE Dis; 2298 2298 uint32_t cbOp; 2299 2299 int rc = EMInterpretDisasCurrent(pVCpu, &Dis, &cbOp); … … 2471 2471 * Disassemble the instruction and get cracking. 2472 2472 */ 2473 DIS CPUSTATEDis;2473 DISSTATE Dis; 2474 2474 uint32_t cbOp; 2475 2475 int rc = EMInterpretDisasCurrent(pVCpu, &Dis, &cbOp); -
trunk/src/VBox/VMM/include/EMInternal.h
r98103 r99208 211 211 /** For saving stack space, the disassembler state is allocated here instead of 212 212 * on the stack. */ 213 DIS CPUSTATE DisState;213 DISSTATE Dis; 214 214 215 215 /** @name Execution profiling. -
trunk/src/VBox/VMM/include/GIMHvInternal.h
r98980 r99208 1367 1367 VMM_INT_DECL(bool) gimHvAreHypercallsEnabled(PCVM pVM); 1368 1368 VMM_INT_DECL(bool) gimHvShouldTrapXcptUD(PVMCPU pVCpu); 1369 VMM_INT_DECL(VBOXSTRICTRC) gimHvXcptUD(PVMCPUCC pVCpu, PCPUMCTX pCtx, PDIS CPUSTATE pDis, uint8_t *pcbInstr);1369 VMM_INT_DECL(VBOXSTRICTRC) gimHvXcptUD(PVMCPUCC pVCpu, PCPUMCTX pCtx, PDISSTATE pDis, uint8_t *pcbInstr); 1370 1370 VMM_INT_DECL(VBOXSTRICTRC) gimHvHypercall(PVMCPUCC pVCpu, PCPUMCTX pCtx); 1371 1371 VMM_INT_DECL(VBOXSTRICTRC) gimHvHypercallEx(PVMCPUCC pVCpu, PCPUMCTX pCtx, unsigned uDisOpcode, uint8_t cbInstr); -
trunk/src/VBox/VMM/include/GIMKvmInternal.h
r98980 r99208 276 276 #endif 277 277 VMM_INT_DECL(bool) gimKvmShouldTrapXcptUD(PVM pVM); 278 VMM_INT_DECL(VBOXSTRICTRC) gimKvmXcptUD(PVMCC pVM, PVMCPUCC pVCpu, PCPUMCTX pCtx, PDIS CPUSTATE pDis, uint8_t *pcbInstr);278 VMM_INT_DECL(VBOXSTRICTRC) gimKvmXcptUD(PVMCC pVM, PVMCPUCC pVCpu, PCPUMCTX pCtx, PDISSTATE pDis, uint8_t *pcbInstr); 279 279 VMM_INT_DECL(VBOXSTRICTRC) gimKvmHypercallEx(PVMCPUCC pVCpu, PCPUMCTX pCtx, unsigned uDisOpcode, uint8_t cbInstr); 280 280 -
trunk/src/VBox/VMM/include/HMInternal.h
r98103 r99208 1145 1145 /** For saving stack space, the disassembler state is allocated here 1146 1146 * instead of on the stack. */ 1147 DIS CPUSTATE DisState;1147 DISSTATE Dis; 1148 1148 } svm; 1149 1149 } HMR0PERVCPU; -
trunk/src/VBox/VMM/include/PGMInternal.h
r99051 r99208 3594 3594 /** For saving stack space, the disassembler state is allocated here instead of 3595 3595 * on the stack. */ 3596 DIS CPUSTATE DisState;3596 DISSTATE Dis; 3597 3597 3598 3598 /** Counts the number of times the netware WP0+RO+US hack has been applied. */ -
trunk/src/VBox/VMM/testcase/tstVMStructSize.cpp
r98103 r99208 318 318 CHECK_MEMBER_ALIGNMENT(PGMCPU, GCPhysCR3, sizeof(RTGCPHYS)); 319 319 CHECK_MEMBER_ALIGNMENT(PGMCPU, aGCPhysGstPaePDs, sizeof(RTGCPHYS)); 320 CHECK_MEMBER_ALIGNMENT(PGMCPU, Dis State, 8);320 CHECK_MEMBER_ALIGNMENT(PGMCPU, Dis, 8); 321 321 CHECK_MEMBER_ALIGNMENT(PGMCPU, cPoolAccessHandler, 8); 322 322 CHECK_MEMBER_ALIGNMENT(PGMPOOLPAGE, idx, sizeof(uint16_t)); … … 363 363 CHECK_MEMBER_ALIGNMENT(HMCPU, Event, 8); 364 364 CHECK_MEMBER_ALIGNMENT(HMCPU, Event.u64IntInfo, 8); 365 CHECK_MEMBER_ALIGNMENT(HMR0PERVCPU, svm.Dis State, 8);365 CHECK_MEMBER_ALIGNMENT(HMR0PERVCPU, svm.Dis, 8); 366 366 CHECK_MEMBER_ALIGNMENT(HMCPU, StatEntry, 8); 367 367
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