- Timestamp:
- Nov 21, 2022 11:03:36 PM (23 months ago)
- Location:
- trunk/src/VBox/VMM
- Files:
-
- 4 edited
-
VMMAll/IEMAll.cpp (modified) (26 diffs)
-
VMMAll/IEMAllCImpl.cpp (modified) (2 diffs)
-
VMMAll/IEMAllCImplStrInstr.cpp.h (modified) (9 diffs)
-
include/IEMInternal.h (modified) (2 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/VMM/VMMAll/IEMAll.cpp
r97641 r97642 425 425 IEM_VMX_VMEXIT_EPT_RET(pVCpu, &Walk, IEM_ACCESS_INSTRUCTION, IEM_SLAT_FAIL_LINEAR_TO_PHYS_ADDR, 0 /* cbInstr */); 426 426 #endif 427 return iemRaisePageFault(pVCpu, GCPtrPC, IEM_ACCESS_INSTRUCTION, rc);427 return iemRaisePageFault(pVCpu, GCPtrPC, 1, IEM_ACCESS_INSTRUCTION, rc); 428 428 } 429 429 if ((Walk.fEffective & X86_PTE_US) || pVCpu->iem.s.uCpl != 3) { /* likely */ } … … 435 435 IEM_VMX_VMEXIT_EPT_RET(pVCpu, &Walk, IEM_ACCESS_INSTRUCTION, IEM_SLAT_FAIL_LINEAR_TO_PAGE_TABLE, 0 /* cbInstr */); 436 436 #endif 437 return iemRaisePageFault(pVCpu, GCPtrPC, IEM_ACCESS_INSTRUCTION, VERR_ACCESS_DENIED);437 return iemRaisePageFault(pVCpu, GCPtrPC, 1, IEM_ACCESS_INSTRUCTION, VERR_ACCESS_DENIED); 438 438 } 439 439 if (!(Walk.fEffective & X86_PTE_PAE_NX) || !(pVCpu->cpum.GstCtx.msrEFER & MSR_K6_EFER_NXE)) { /* likely */ } … … 445 445 IEM_VMX_VMEXIT_EPT_RET(pVCpu, &Walk, IEM_ACCESS_INSTRUCTION, IEM_SLAT_FAIL_LINEAR_TO_PAGE_TABLE, 0 /* cbInstr */); 446 446 #endif 447 return iemRaisePageFault(pVCpu, GCPtrPC, IEM_ACCESS_INSTRUCTION, VERR_ACCESS_DENIED);447 return iemRaisePageFault(pVCpu, GCPtrPC, 1, IEM_ACCESS_INSTRUCTION, VERR_ACCESS_DENIED); 448 448 } 449 449 RTGCPHYS const GCPhys = Walk.GCPhys | (GCPtrPC & GUEST_PAGE_OFFSET_MASK); … … 810 810 #endif 811 811 Log(("iemOpcodeFetchMoreBytes: %RGv - rc=%Rrc\n", GCPtrFirst, rc)); 812 iemRaisePageFaultJmp(pVCpu, GCPtrFirst, IEM_ACCESS_INSTRUCTION, rc);812 iemRaisePageFaultJmp(pVCpu, GCPtrFirst, 1, IEM_ACCESS_INSTRUCTION, rc); 813 813 } 814 814 … … 830 830 { 831 831 Log(("iemOpcodeFetchBytesJmp: %RGv - supervisor page\n", GCPtrFirst)); 832 iemRaisePageFaultJmp(pVCpu, GCPtrFirst, IEM_ACCESS_INSTRUCTION, VERR_ACCESS_DENIED);832 iemRaisePageFaultJmp(pVCpu, GCPtrFirst, 1, IEM_ACCESS_INSTRUCTION, VERR_ACCESS_DENIED); 833 833 } 834 834 if ((pTlbe->fFlagsAndPhysRev & IEMTLBE_F_PT_NO_EXEC) && (pVCpu->cpum.GstCtx.msrEFER & MSR_K6_EFER_NXE)) 835 835 { 836 836 Log(("iemOpcodeFetchMoreBytes: %RGv - NX\n", GCPtrFirst)); 837 iemRaisePageFaultJmp(pVCpu, GCPtrFirst, IEM_ACCESS_INSTRUCTION, VERR_ACCESS_DENIED);837 iemRaisePageFaultJmp(pVCpu, GCPtrFirst, 1, IEM_ACCESS_INSTRUCTION, VERR_ACCESS_DENIED); 838 838 } 839 839 } … … 1039 1039 IEM_VMX_VMEXIT_EPT_RET(pVCpu, &Walk, IEM_ACCESS_INSTRUCTION, IEM_SLAT_FAIL_LINEAR_TO_PHYS_ADDR, 0 /* cbInstr */); 1040 1040 #endif 1041 return iemRaisePageFault(pVCpu, GCPtrNext, IEM_ACCESS_INSTRUCTION, rc);1041 return iemRaisePageFault(pVCpu, GCPtrNext, 1, IEM_ACCESS_INSTRUCTION, rc); 1042 1042 } 1043 1043 if (!(Walk.fEffective & X86_PTE_US) && pVCpu->iem.s.uCpl == 3) … … 1048 1048 IEM_VMX_VMEXIT_EPT_RET(pVCpu, &Walk, IEM_ACCESS_INSTRUCTION, IEM_SLAT_FAIL_LINEAR_TO_PAGE_TABLE, 0 /* cbInstr */); 1049 1049 #endif 1050 return iemRaisePageFault(pVCpu, GCPtrNext, IEM_ACCESS_INSTRUCTION, VERR_ACCESS_DENIED);1050 return iemRaisePageFault(pVCpu, GCPtrNext, 1, IEM_ACCESS_INSTRUCTION, VERR_ACCESS_DENIED); 1051 1051 } 1052 1052 if ((Walk.fEffective & X86_PTE_PAE_NX) && (pVCpu->cpum.GstCtx.msrEFER & MSR_K6_EFER_NXE)) … … 1057 1057 IEM_VMX_VMEXIT_EPT_RET(pVCpu, &Walk, IEM_ACCESS_INSTRUCTION, IEM_SLAT_FAIL_LINEAR_TO_PAGE_TABLE, 0 /* cbInstr */); 1058 1058 #endif 1059 return iemRaisePageFault(pVCpu, GCPtrNext, IEM_ACCESS_INSTRUCTION, VERR_ACCESS_DENIED);1059 return iemRaisePageFault(pVCpu, GCPtrNext, 1, IEM_ACCESS_INSTRUCTION, VERR_ACCESS_DENIED); 1060 1060 } 1061 1061 RTGCPHYS const GCPhys = Walk.GCPhys | (GCPtrNext & GUEST_PAGE_OFFSET_MASK); … … 4106 4106 4107 4107 /** \#PF(n) - 0e. */ 4108 VBOXSTRICTRC iemRaisePageFault(PVMCPUCC pVCpu, RTGCPTR GCPtrWhere, uint32_t fAccess, int rc) RT_NOEXCEPT4108 VBOXSTRICTRC iemRaisePageFault(PVMCPUCC pVCpu, RTGCPTR GCPtrWhere, uint32_t cbAccess, uint32_t fAccess, int rc) RT_NOEXCEPT 4109 4109 { 4110 4110 uint16_t uErr; … … 4152 4152 #endif 4153 4153 4154 /* For FXSAVE and FRSTOR the #PF is typically reported at the max address 4155 of the memory operand rather than at the start of it. (Not sure what 4156 happens if it crosses a page boundrary.) The current heuristics for 4157 this is to report the #PF for the last byte if the access is more than 4158 64 bytes. This is probably not correct, but we can work that out later, 4159 main objective now is to get FXSAVE to work like for real hardware and 4160 make bs3-cpu-basic2 work. */ 4161 if (cbAccess <= 64) 4162 { /* likely*/ } 4163 else 4164 GCPtrWhere += cbAccess - 1; 4165 4154 4166 return iemRaiseXcptOrInt(pVCpu, 0, X86_XCPT_PF, IEM_XCPT_FLAGS_T_CPU_XCPT | IEM_XCPT_FLAGS_ERR | IEM_XCPT_FLAGS_CR2, 4155 4167 uErr, GCPtrWhere); … … 4158 4170 #ifdef IEM_WITH_SETJMP 4159 4171 /** \#PF(n) - 0e, longjmp. */ 4160 DECL_NO_RETURN(void) iemRaisePageFaultJmp(PVMCPUCC pVCpu, RTGCPTR GCPtrWhere, uint32_t fAccess, int rc) IEM_NOEXCEPT_MAY_LONGJMP 4161 { 4162 IEM_DO_LONGJMP(pVCpu, VBOXSTRICTRC_VAL(iemRaisePageFault(pVCpu, GCPtrWhere, fAccess, rc))); 4172 DECL_NO_RETURN(void) iemRaisePageFaultJmp(PVMCPUCC pVCpu, RTGCPTR GCPtrWhere, uint32_t cbAccess, 4173 uint32_t fAccess, int rc) IEM_NOEXCEPT_MAY_LONGJMP 4174 { 4175 IEM_DO_LONGJMP(pVCpu, VBOXSTRICTRC_VAL(iemRaisePageFault(pVCpu, GCPtrWhere, cbAccess, fAccess, rc))); 4163 4176 } 4164 4177 #endif … … 5379 5392 * @param pVCpu The cross context virtual CPU structure of the calling thread. 5380 5393 * @param GCPtrMem The virtual address. 5394 * @param cbAccess The access size, for raising \#PF correctly for 5395 * FXSAVE and such. 5381 5396 * @param fAccess The intended access. 5382 5397 * @param pGCPhysMem Where to return the physical address. 5383 5398 */ 5384 VBOXSTRICTRC iemMemPageTranslateAndCheckAccess(PVMCPUCC pVCpu, RTGCPTR GCPtrMem, uint32_t fAccess, PRTGCPHYS pGCPhysMem) RT_NOEXCEPT 5399 VBOXSTRICTRC iemMemPageTranslateAndCheckAccess(PVMCPUCC pVCpu, RTGCPTR GCPtrMem, uint32_t cbAccess, 5400 uint32_t fAccess, PRTGCPHYS pGCPhysMem) RT_NOEXCEPT 5385 5401 { 5386 5402 /** @todo Need a different PGM interface here. We're currently using … … 5401 5417 #endif 5402 5418 *pGCPhysMem = NIL_RTGCPHYS; 5403 return iemRaisePageFault(pVCpu, GCPtrMem, fAccess, rc);5419 return iemRaisePageFault(pVCpu, GCPtrMem, cbAccess, fAccess, rc); 5404 5420 } 5405 5421 … … 5421 5437 IEM_VMX_VMEXIT_EPT_RET(pVCpu, &Walk, fAccess, IEM_SLAT_FAIL_LINEAR_TO_PAGE_TABLE, 0 /* cbInstr */); 5422 5438 #endif 5423 return iemRaisePageFault(pVCpu, GCPtrMem, fAccess & ~IEM_ACCESS_TYPE_READ, VERR_ACCESS_DENIED);5439 return iemRaisePageFault(pVCpu, GCPtrMem, cbAccess, fAccess & ~IEM_ACCESS_TYPE_READ, VERR_ACCESS_DENIED); 5424 5440 } 5425 5441 … … 5435 5451 IEM_VMX_VMEXIT_EPT_RET(pVCpu, &Walk, fAccess, IEM_SLAT_FAIL_LINEAR_TO_PAGE_TABLE, 0 /* cbInstr */); 5436 5452 #endif 5437 return iemRaisePageFault(pVCpu, GCPtrMem, fAccess, VERR_ACCESS_DENIED);5453 return iemRaisePageFault(pVCpu, GCPtrMem, cbAccess, fAccess, VERR_ACCESS_DENIED); 5438 5454 } 5439 5455 … … 5449 5465 IEM_VMX_VMEXIT_EPT_RET(pVCpu, &Walk, fAccess, IEM_SLAT_FAIL_LINEAR_TO_PAGE_TABLE, 0 /* cbInstr */); 5450 5466 #endif 5451 return iemRaisePageFault(pVCpu, GCPtrMem, fAccess & ~(IEM_ACCESS_TYPE_READ | IEM_ACCESS_TYPE_WRITE),5467 return iemRaisePageFault(pVCpu, GCPtrMem, cbAccess, fAccess & ~(IEM_ACCESS_TYPE_READ | IEM_ACCESS_TYPE_WRITE), 5452 5468 VERR_ACCESS_DENIED); 5453 5469 } … … 5736 5752 iemMemBounceBufferMapCrossPage(PVMCPUCC pVCpu, int iMemMap, void **ppvMem, size_t cbMem, RTGCPTR GCPtrFirst, uint32_t fAccess) 5737 5753 { 5754 Assert(cbMem <= GUEST_PAGE_SIZE); 5755 5738 5756 /* 5739 5757 * Do the address translations. 5740 5758 */ 5759 uint32_t const cbFirstPage = GUEST_PAGE_SIZE - (uint32_t)(GCPtrFirst & GUEST_PAGE_OFFSET_MASK); 5741 5760 RTGCPHYS GCPhysFirst; 5742 VBOXSTRICTRC rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, GCPtrFirst, fAccess, &GCPhysFirst);5761 VBOXSTRICTRC rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, GCPtrFirst, cbFirstPage, fAccess, &GCPhysFirst); 5743 5762 if (rcStrict != VINF_SUCCESS) 5744 5763 return rcStrict; 5745 5764 Assert((GCPhysFirst & GUEST_PAGE_OFFSET_MASK) == (GCPtrFirst & GUEST_PAGE_OFFSET_MASK)); 5765 5766 uint32_t const cbSecondPage = (uint32_t)cbMem - cbFirstPage; 5746 5767 RTGCPHYS GCPhysSecond; 5747 5768 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, (GCPtrFirst + (cbMem - 1)) & ~(RTGCPTR)GUEST_PAGE_OFFSET_MASK, 5748 fAccess, &GCPhysSecond);5769 cbSecondPage, fAccess, &GCPhysSecond); 5749 5770 if (rcStrict != VINF_SUCCESS) 5750 5771 return rcStrict; 5751 GCPhysSecond &= ~(RTGCPHYS)GUEST_PAGE_OFFSET_MASK; 5772 Assert((GCPhysSecond & GUEST_PAGE_OFFSET_MASK) == 0); 5773 GCPhysSecond &= ~(RTGCPHYS)GUEST_PAGE_OFFSET_MASK; /** @todo why? */ 5752 5774 5753 5775 PVMCC pVM = pVCpu->CTX_SUFF(pVM); … … 5757 5779 * write access. 5758 5780 */ 5759 uint8_t *pbBuf = &pVCpu->iem.s.aBounceBuffers[iMemMap].ab[0]; 5760 uint32_t const cbFirstPage = GUEST_PAGE_SIZE - (GCPhysFirst & GUEST_PAGE_OFFSET_MASK); 5761 uint32_t const cbSecondPage = (uint32_t)(cbMem - cbFirstPage); 5781 uint8_t * const pbBuf = &pVCpu->iem.s.aBounceBuffers[iMemMap].ab[0]; 5762 5782 5763 5783 if (fAccess & (IEM_ACCESS_TYPE_READ | IEM_ACCESS_TYPE_EXEC | IEM_ACCESS_PARTIAL_WRITE)) … … 6074 6094 IEM_VMX_VMEXIT_EPT_RET(pVCpu, &Walk, fAccess, IEM_SLAT_FAIL_LINEAR_TO_PHYS_ADDR, 0 /* cbInstr */); 6075 6095 # endif 6076 return iemRaisePageFault(pVCpu, GCPtrMem, fAccess, rc);6096 return iemRaisePageFault(pVCpu, GCPtrMem, cbMem, fAccess, rc); 6077 6097 } 6078 6098 … … 6103 6123 IEM_VMX_VMEXIT_EPT_RET(pVCpu, &Walk, fAccess, IEM_SLAT_FAIL_LINEAR_TO_PAGE_TABLE, 0 /* cbInstr */); 6104 6124 # endif 6105 return iemRaisePageFault(pVCpu, GCPtrMem, fAccess & ~IEM_ACCESS_TYPE_READ, VERR_ACCESS_DENIED);6125 return iemRaisePageFault(pVCpu, GCPtrMem, cbMem, fAccess & ~IEM_ACCESS_TYPE_READ, VERR_ACCESS_DENIED); 6106 6126 } 6107 6127 … … 6116 6136 IEM_VMX_VMEXIT_EPT_RET(pVCpu, &Walk, fAccess, IEM_SLAT_FAIL_LINEAR_TO_PAGE_TABLE, 0 /* cbInstr */); 6117 6137 # endif 6118 return iemRaisePageFault(pVCpu, GCPtrMem, fAccess, VERR_ACCESS_DENIED);6138 return iemRaisePageFault(pVCpu, GCPtrMem, cbMem, fAccess, VERR_ACCESS_DENIED); 6119 6139 } 6120 6140 } … … 6207 6227 6208 6228 RTGCPHYS GCPhysFirst; 6209 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, GCPtrMem, fAccess, &GCPhysFirst);6229 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, GCPtrMem, cbMem, fAccess, &GCPhysFirst); 6210 6230 if (rcStrict != VINF_SUCCESS) 6211 6231 return rcStrict; … … 6401 6421 IEM_VMX_VMEXIT_EPT_RET(pVCpu, &Walk, fAccess, IEM_SLAT_FAIL_LINEAR_TO_PHYS_ADDR, 0 /* cbInstr */); 6402 6422 # endif 6403 iemRaisePageFaultJmp(pVCpu, GCPtrMem, fAccess, rc);6423 iemRaisePageFaultJmp(pVCpu, GCPtrMem, cbMem, fAccess, rc); 6404 6424 } 6405 6425 … … 6445 6465 IEM_VMX_VMEXIT_EPT_RET(pVCpu, &Walk, fAccess, IEM_SLAT_FAIL_LINEAR_TO_PAGE_TABLE, 0 /* cbInstr */); 6446 6466 # endif 6447 iemRaisePageFaultJmp(pVCpu, GCPtrMem, fAccess & ~IEM_ACCESS_TYPE_READ, VERR_ACCESS_DENIED);6467 iemRaisePageFaultJmp(pVCpu, GCPtrMem, cbMem, fAccess & ~IEM_ACCESS_TYPE_READ, VERR_ACCESS_DENIED); 6448 6468 } 6449 6469 … … 6456 6476 IEM_VMX_VMEXIT_EPT_RET(pVCpu, &Walk, fAccess, IEM_SLAT_FAIL_LINEAR_TO_PAGE_TABLE, 0 /* cbInstr */); 6457 6477 # endif 6458 iemRaisePageFaultJmp(pVCpu, GCPtrMem, fAccess, VERR_ACCESS_DENIED);6478 iemRaisePageFaultJmp(pVCpu, GCPtrMem, cbMem, fAccess, VERR_ACCESS_DENIED); 6459 6479 } 6460 6480 … … 6544 6564 6545 6565 RTGCPHYS GCPhysFirst; 6546 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, GCPtrMem, fAccess, &GCPhysFirst);6566 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, GCPtrMem, cbMem, fAccess, &GCPhysFirst); 6547 6567 if (rcStrict == VINF_SUCCESS) { /*likely*/ } 6548 6568 else IEM_DO_LONGJMP(pVCpu, VBOXSTRICTRC_VAL(rcStrict)); -
trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp
r97630 r97642 7663 7663 7664 7664 RTGCPHYS GCPhysMem; 7665 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, GCPtrMem, IEM_ACCESS_TYPE_READ | IEM_ACCESS_WHAT_DATA, &GCPhysMem); 7665 /** @todo access size */ 7666 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, GCPtrMem, 1, IEM_ACCESS_TYPE_READ | IEM_ACCESS_WHAT_DATA, &GCPhysMem); 7666 7667 if (rcStrict != VINF_SUCCESS) 7667 7668 return rcStrict; … … 8430 8431 { 8431 8432 RTGCPHYS GCPhysMem; 8432 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, GCPtrEff, IEM_ACCESS_TYPE_READ | IEM_ACCESS_WHAT_DATA, &GCPhysMem); 8433 /** @todo access size. */ 8434 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, GCPtrEff, 1, IEM_ACCESS_TYPE_READ | IEM_ACCESS_WHAT_DATA, &GCPhysMem); 8433 8435 if (rcStrict == VINF_SUCCESS) 8434 8436 { -
trunk/src/VBox/VMM/VMMAll/IEMAllCImplStrInstr.cpp.h
r97370 r97642 195 195 { 196 196 RTGCPHYS GCPhysSrc1Mem; 197 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, uVirtSrc1Addr, IEM_ACCESS_DATA_R, &GCPhysSrc1Mem);197 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, uVirtSrc1Addr, OP_SIZE / 8, IEM_ACCESS_DATA_R, &GCPhysSrc1Mem); 198 198 if (rcStrict != VINF_SUCCESS) 199 199 return rcStrict; 200 200 201 201 RTGCPHYS GCPhysSrc2Mem; 202 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, uVirtSrc2Addr, IEM_ACCESS_DATA_R, &GCPhysSrc2Mem);202 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, uVirtSrc2Addr, OP_SIZE / 8, IEM_ACCESS_DATA_R, &GCPhysSrc2Mem); 203 203 if (rcStrict != VINF_SUCCESS) 204 204 return rcStrict; … … 361 361 { 362 362 RTGCPHYS GCPhysSrc1Mem; 363 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, uVirtSrc1Addr, IEM_ACCESS_DATA_R, &GCPhysSrc1Mem);363 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, uVirtSrc1Addr, OP_SIZE / 8, IEM_ACCESS_DATA_R, &GCPhysSrc1Mem); 364 364 if (rcStrict != VINF_SUCCESS) 365 365 return rcStrict; 366 366 367 367 RTGCPHYS GCPhysSrc2Mem; 368 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, uVirtSrc2Addr, IEM_ACCESS_DATA_R, &GCPhysSrc2Mem);368 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, uVirtSrc2Addr, OP_SIZE / 8, IEM_ACCESS_DATA_R, &GCPhysSrc2Mem); 369 369 if (rcStrict != VINF_SUCCESS) 370 370 return rcStrict; … … 514 514 { 515 515 RTGCPHYS GCPhysMem; 516 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, uVirtAddr, IEM_ACCESS_DATA_R, &GCPhysMem);516 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, uVirtAddr, OP_SIZE / 8, IEM_ACCESS_DATA_R, &GCPhysMem); 517 517 if (rcStrict != VINF_SUCCESS) 518 518 return rcStrict; … … 642 642 { 643 643 RTGCPHYS GCPhysMem; 644 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, uVirtAddr, IEM_ACCESS_DATA_R, &GCPhysMem);644 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, uVirtAddr, OP_SIZE / 8, IEM_ACCESS_DATA_R, &GCPhysMem); 645 645 if (rcStrict != VINF_SUCCESS) 646 646 return rcStrict; … … 792 792 { 793 793 RTGCPHYS GCPhysSrcMem; 794 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, uVirtSrcAddr, IEM_ACCESS_DATA_R, &GCPhysSrcMem);794 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, uVirtSrcAddr, OP_SIZE / 8, IEM_ACCESS_DATA_R, &GCPhysSrcMem); 795 795 if (rcStrict != VINF_SUCCESS) 796 796 return rcStrict; 797 797 798 798 RTGCPHYS GCPhysDstMem; 799 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, uVirtDstAddr, IEM_ACCESS_DATA_W, &GCPhysDstMem);799 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, uVirtDstAddr, OP_SIZE / 8, IEM_ACCESS_DATA_W, &GCPhysDstMem); 800 800 if (rcStrict != VINF_SUCCESS) 801 801 return rcStrict; … … 937 937 { 938 938 RTGCPHYS GCPhysMem; 939 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, uVirtAddr, IEM_ACCESS_DATA_W, &GCPhysMem);939 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, uVirtAddr, OP_SIZE / 8, IEM_ACCESS_DATA_W, &GCPhysMem); 940 940 if (rcStrict != VINF_SUCCESS) 941 941 return rcStrict; … … 1071 1071 { 1072 1072 RTGCPHYS GCPhysMem; 1073 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, uVirtAddr, IEM_ACCESS_DATA_R, &GCPhysMem);1073 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, uVirtAddr, OP_SIZE / 8, IEM_ACCESS_DATA_R, &GCPhysMem); 1074 1074 if (rcStrict != VINF_SUCCESS) 1075 1075 return rcStrict; … … 1353 1353 { 1354 1354 RTGCPHYS GCPhysMem; 1355 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, uVirtAddr, IEM_ACCESS_DATA_W, &GCPhysMem);1355 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, uVirtAddr, OP_SIZE / 8, IEM_ACCESS_DATA_W, &GCPhysMem); 1356 1356 if (rcStrict != VINF_SUCCESS) 1357 1357 return rcStrict; … … 1643 1643 { 1644 1644 RTGCPHYS GCPhysMem; 1645 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, uVirtAddr, IEM_ACCESS_DATA_R, &GCPhysMem);1645 rcStrict = iemMemPageTranslateAndCheckAccess(pVCpu, uVirtAddr, OP_SIZE / 8, IEM_ACCESS_DATA_R, &GCPhysMem); 1646 1646 if (rcStrict != VINF_SUCCESS) 1647 1647 return rcStrict; -
trunk/src/VBox/VMM/include/IEMInternal.h
r97601 r97642 3752 3752 DECL_NO_RETURN(void) iemRaiseSelectorInvalidAccessJmp(PVMCPUCC pVCpu, uint32_t iSegReg, uint32_t fAccess) IEM_NOEXCEPT_MAY_LONGJMP; 3753 3753 #endif 3754 VBOXSTRICTRC iemRaisePageFault(PVMCPUCC pVCpu, RTGCPTR GCPtrWhere, uint32_t fAccess, int rc) RT_NOEXCEPT;3754 VBOXSTRICTRC iemRaisePageFault(PVMCPUCC pVCpu, RTGCPTR GCPtrWhere, uint32_t cbAccess, uint32_t fAccess, int rc) RT_NOEXCEPT; 3755 3755 #ifdef IEM_WITH_SETJMP 3756 DECL_NO_RETURN(void) iemRaisePageFaultJmp(PVMCPUCC pVCpu, RTGCPTR GCPtrWhere, uint32_t fAccess, int rc) IEM_NOEXCEPT_MAY_LONGJMP;3756 DECL_NO_RETURN(void) iemRaisePageFaultJmp(PVMCPUCC pVCpu, RTGCPTR GCPtrWhere, uint32_t cbAccess, uint32_t fAccess, int rc) IEM_NOEXCEPT_MAY_LONGJMP; 3757 3757 #endif 3758 3758 VBOXSTRICTRC iemRaiseMathFault(PVMCPUCC pVCpu) RT_NOEXCEPT; … … 3865 3865 VBOXSTRICTRC iemMemApplySegment(PVMCPUCC pVCpu, uint32_t fAccess, uint8_t iSegReg, size_t cbMem, PRTGCPTR pGCPtrMem) RT_NOEXCEPT; 3866 3866 VBOXSTRICTRC iemMemMarkSelDescAccessed(PVMCPUCC pVCpu, uint16_t uSel) RT_NOEXCEPT; 3867 VBOXSTRICTRC iemMemPageTranslateAndCheckAccess(PVMCPUCC pVCpu, RTGCPTR GCPtrMem, uint32_t fAccess, PRTGCPHYS pGCPhysMem) RT_NOEXCEPT;3867 VBOXSTRICTRC iemMemPageTranslateAndCheckAccess(PVMCPUCC pVCpu, RTGCPTR GCPtrMem, uint32_t cbAccess, uint32_t fAccess, PRTGCPHYS pGCPhysMem) RT_NOEXCEPT; 3868 3868 3869 3869 #ifdef IEM_WITH_CODE_TLB
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