- Timestamp:
- Nov 21, 2022 9:16:52 PM (23 months ago)
- File:
-
- 1 edited
-
trunk/src/VBox/VMM/VMMAll/IEMAll.cpp (modified) (2 diffs)
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- Added
- Removed
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trunk/src/VBox/VMM/VMMAll/IEMAll.cpp
r97522 r97641 6037 6037 } 6038 6038 else if ( (uAlignCtl & IEM_MEMMAP_F_ALIGN_GP_OR_AC) 6039 && iemMemAreAlignmentChecksEnabled(pVCpu) 6040 /** @todo may only apply to 2, 4 or 8 byte misalignments depending on the CPU 6041 * implementation. See FXSAVE/FRSTOR/XSAVE/XRSTOR/++. */ 6042 ) 6039 && (GCPtrMem & 3) /* The value 4 matches 10980xe's FXSAVE and helps make bs3-cpu-basic2 work. */ 6040 /** @todo may only apply to 2, 4 or 8 byte misalignments depending on the CPU 6041 * implementation. See FXSAVE/FRSTOR/XSAVE/XRSTOR/++. Using 4 for now as 6042 * that's what FXSAVE does on a 10980xe. */ 6043 && iemMemAreAlignmentChecksEnabled(pVCpu)) 6043 6044 return iemRaiseAlignmentCheckException(pVCpu); 6044 6045 else … … 6338 6339 } 6339 6340 else if ( (uAlignCtl & IEM_MEMMAP_F_ALIGN_GP_OR_AC) 6340 && iemMemAreAlignmentChecksEnabled(pVCpu) 6341 /** @todo may only apply to 2, 4 or 8 byte misalignments depending on the CPU 6342 * implementation. See FXSAVE/FRSTOR/XSAVE/XRSTOR/++. */ 6343 ) 6341 && (GCPtrMem & 3) /* The value 4 matches 10980xe's FXSAVE and helps make bs3-cpu-basic2 work. */ 6342 /** @todo may only apply to 2, 4 or 8 byte misalignments depending on the CPU 6343 * implementation. See FXSAVE/FRSTOR/XSAVE/XRSTOR/++. Using 4 for now as 6344 * that's what FXSAVE does on a 10980xe. */ 6345 && iemMemAreAlignmentChecksEnabled(pVCpu)) 6344 6346 iemRaiseAlignmentCheckExceptionJmp(pVCpu); 6345 6347 else
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