Changeset 97287 in vbox
- Timestamp:
- Oct 24, 2022 11:20:42 PM (2 years ago)
- Location:
- trunk
- Files:
-
- 3 edited
-
include/VBox/vmm/cpum.mac (modified) (2 diffs)
-
include/VBox/vmm/cpumctx.h (modified) (3 diffs)
-
src/VBox/VMM/include/CPUMInternal.mac (modified) (2 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/VBox/vmm/cpum.mac
r97286 r97287 163 163 .tr.u32Limit resd 1 164 164 .tr.Attr resd 1 165 alignb 8 165 166 .eip resq 1 166 167 .eflags resq 1 167 .abPadding resb 8 168 alignb 8 168 .fExtrn resq 1 169 169 .uRipInhibitInt resq 1 170 170 .cr0 resq 1 … … 192 192 .msrKERNELGSBASE resb 8 193 193 194 alignb 8195 .fExtrn resq 1196 197 194 alignb 32 198 195 .aPaePdpes resq 4 -
trunk/include/VBox/vmm/cpumctx.h
r97286 r97287 417 417 } CPUM_UNION_NM(rflags); 418 418 419 uint8_t abPadding[8]; 419 /** 0x150 - Externalized state tracker, CPUMCTX_EXTRN_XXX. */ 420 uint64_t fExtrn; 421 420 422 /** The RIP value an interrupt shadow is/was valid for. */ 421 423 uint64_t uRipInhibitInt; … … 464 466 /** @} */ 465 467 466 /** 0x230 - Externalized state tracker, CPUMCTX_EXTRN_XXX. 467 * @todo Move up after uRipInhibitInt after fInhibit moves into RFLAGS. 468 * That will put this in the same cacheline as RIP, RFLAGS and CR0 469 * which are typically always imported and exported again during an 470 * VM exit. */ 471 uint64_t fExtrn; 472 473 uint64_t u64Unused; 468 uint64_t au64Unused[2]; 474 469 475 470 /** 0x240 - PAE PDPTEs. */ … … 675 670 AssertCompileMemberOffset(CPUMCTX, rip, 0x0140); 676 671 AssertCompileMemberOffset(CPUMCTX, rflags, 0x0148); 672 AssertCompileMemberOffset(CPUMCTX, fExtrn, 0x0150); 677 673 AssertCompileMemberOffset(CPUMCTX, uRipInhibitInt, 0x0158); 678 674 AssertCompileMemberOffset(CPUMCTX, cr0, 0x0160); -
trunk/src/VBox/VMM/include/CPUMInternal.mac
r97286 r97287 188 188 .Guest.tr.u32Limit resd 1 189 189 .Guest.tr.Attr resd 1 190 alignb 8 190 191 .Guest.eip resq 1 191 192 .Guest.eflags resq 1 192 .Guest.abPadding resb 8 193 alignb 8 193 .Guest.fExtrn resq 1 194 194 .Guest.uRipInhibitInt resq 1 195 195 .Guest.cr0 resq 1 … … 216 216 .Guest.msrSFMASK resb 8 217 217 .Guest.msrKERNELGSBASE resb 8 218 219 alignb 8220 .Guest.fExtrn resq 1221 218 222 219 alignb 32
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