VirtualBox

Changeset 97243 in vbox for trunk


Ignore:
Timestamp:
Oct 20, 2022 6:02:21 AM (2 years ago)
Author:
vboxsync
Message:

VMM/Nested VMX: bugref:10092 Removed pgmGstSlatWalkPhys() as enmGuestSlatMode is now always updated in PGMHCChangeMode prior to any second-level address translation.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/src/VBox/VMM/VMMAll/PGMAll.cpp

    r97197 r97243  
    6464DECLINLINE(int) pgmGstMapCr3(PVMCPUCC pVCpu, RTGCPHYS GCPhysCr3, PRTHCPTR pHCPtrGuestCr3);
    6565#ifdef VBOX_WITH_NESTED_HWVIRT_VMX_EPT
    66 static int pgmGstSlatWalk(PVMCPUCC pVCpu, RTGCPHYS GCPhysNested, bool fIsLinearAddrValid, RTGCPTR GCPtrNested,
    67                           PPGMPTWALK pWalk, PPGMPTWALKGST pGstWalk);
    68 static int pgmGstSlatWalkPhys(PVMCPUCC pVCpu, PGMSLAT enmSlatMode, RTGCPHYS GCPhysNested, PPGMPTWALK pWalk,
    69                               PPGMPTWALKGST pGstWalk);
     66static int pgmGstSlatWalk(PVMCPUCC pVCpu, RTGCPHYS GCPhysNested, bool fIsLinearAddrValid, RTGCPTR GCPtrNested, PPGMPTWALK pWalk,
     67                          PPGMPTWALKGST pGstWalk);
    7068static int pgmGstSlatTranslateCr3(PVMCPUCC pVCpu, uint64_t uCr3, PRTGCPHYS pGCPhysCr3);
    7169static int pgmShwGetNestedEPTPDPtr(PVMCPUCC pVCpu, RTGCPTR64 GCPhysNested, PEPTPDPT *ppPdpt, PEPTPD *ppPD,
     
    20202018}
    20212019
     2020
    20222021#ifdef VBOX_WITH_NESTED_HWVIRT_VMX_EPT
    2023 
    20242022/**
    20252023 * Performs a guest second-level address translation (SLAT).
    2026  *
    2027  * The guest paging mode must be 32-bit, PAE or AMD64 when making a call to this
    2028  * function.
    20292024 *
    20302025 * @returns VBox status code.
     
    20352030 *
    20362031 * @param   pVCpu               The cross context virtual CPU structure of the calling EMT.
    2037  * @param   GCPhysNested        The nested-guest physical address being translated
    2038  *                              (input).
    2039  * @param   fIsLinearAddrValid  Whether the linear address in @a GCPtrNested is
    2040  *                              valid. This indicates the SLAT is caused when
    2041  *                              translating a nested-guest linear address.
     2032 * @param   GCPhysNested        The nested-guest physical address being translated.
     2033 * @param   fIsLinearAddrValid  Whether the linear address in @a GCPtrNested is the
     2034 *                              cause for this translation.
    20422035 * @param   GCPtrNested         The nested-guest virtual address that initiated the
    2043  *                              SLAT. If none, pass NIL_RTGCPTR.
    2044  * @param   pWalk               Where to return the walk result. This is valid for
    2045  *                              some error codes as well.
    2046  * @param   pGstWalk            The second-level paging-mode specific walk
    2047  *                              information.
     2036 *                              SLAT. If none, pass 0 (and not NIL_RTGCPTR).
     2037 * @param   pWalk               Where to return the walk result. This is updated for
     2038 *                              all error codes other than
     2039 *                              VERR_PGM_NOT_USED_IN_MODE.
     2040 * @param   pGstWalk            Where to store the second-level paging-mode specific
     2041 *                              walk info.
    20482042 */
    20492043static int pgmGstSlatWalk(PVMCPUCC pVCpu, RTGCPHYS GCPhysNested, bool fIsLinearAddrValid, RTGCPTR GCPtrNested,
     
    20532047    Assert(   pVCpu->pgm.s.enmGuestSlatMode != PGMSLAT_DIRECT
    20542048           && pVCpu->pgm.s.enmGuestSlatMode != PGMSLAT_INVALID);
     2049    AssertPtr(pWalk);
     2050    AssertPtr(pGstWalk);
    20552051    switch (pVCpu->pgm.s.enmGuestSlatMode)
    20562052    {
     
    20652061    }
    20662062}
    2067 
    2068 
    2069 /**
    2070  * Performs a guest second-level address translation (SLAT) for a nested-guest
    2071  * physical address.
    2072  *
    2073  * This version requires the SLAT mode to be provided by the caller because we could
    2074  * be in the process of switching paging modes (MOV CRX) and cannot presume control
    2075  * register values.
    2076  *
    2077  * @returns VBox status code.
    2078  * @param   pVCpu           The cross context virtual CPU structure of the calling EMT.
    2079  * @param   enmSlatMode     The second-level paging mode to use.
    2080  * @param   GCPhysNested    The nested-guest physical address to translate.
    2081  * @param   pWalk           Where to store the walk result.
    2082  * @param   pGstWalk        Where to store the second-level paging-mode specific
    2083  *                          walk information.
    2084  */
    2085 static int pgmGstSlatWalkPhys(PVMCPUCC pVCpu, PGMSLAT enmSlatMode, RTGCPHYS GCPhysNested, PPGMPTWALK pWalk,
    2086                               PPGMPTWALKGST pGstWalk)
    2087 {
    2088     AssertPtr(pWalk);
    2089     AssertPtr(pGstWalk);
    2090     switch (enmSlatMode)
    2091     {
    2092         case PGMSLAT_EPT:
    2093             pGstWalk->enmType = PGMPTWALKGSTTYPE_EPT;
    2094             return PGM_GST_SLAT_NAME_EPT(Walk)(pVCpu, GCPhysNested, false /* fIsLinearaddrValid */, 0 /* GCPtrNested */,
    2095                                                pWalk, &pGstWalk->u.Ept);
    2096 
    2097         default:
    2098             AssertFailed();
    2099             return VERR_PGM_NOT_USED_IN_MODE;
    2100     }
    2101 }
    2102 
    21032063#endif /* VBOX_WITH_NESTED_HWVIRT_VMX_EPT */
     2064
    21042065
    21052066/**
     
    25622523        PGMPTWALK    Walk;
    25632524        PGMPTWALKGST GstWalk;
    2564         int const rc = pgmGstSlatWalkPhys(pVCpu, PGMSLAT_EPT, uCr3, &Walk, &GstWalk);
     2525        int const rc = pgmGstSlatWalk(pVCpu, uCr3,  false /* fIsLinearAddrValid */,  0 /* GCPtrNested */, &Walk, &GstWalk);
    25652526        if (RT_SUCCESS(rc))
    25662527        {
     
    29562917                PGMPTWALKGST   GstWalk;
    29572918                RTGCPHYS const GCPhysNested = PaePdpe.u & X86_PDPE_PG_MASK;
    2958                 int const rc = pgmGstSlatWalkPhys(pVCpu, PGMSLAT_EPT, GCPhysNested, &Walk, &GstWalk);
     2919                int const rc = pgmGstSlatWalk(pVCpu, GCPhysNested, false /* fIsLinearAddrValid */, 0 /* GCPtrNested */,
     2920                                              &Walk, &GstWalk);
    29592921                if (RT_SUCCESS(rc))
    29602922                    GCPhys = Walk.GCPhys;
     
    35513513            PGMPTWALK    Walk;
    35523514            PGMPTWALKGST GstWalk;
    3553             int const rc = pgmGstSlatWalkPhys(pVCpu, PGMSLAT_EPT, GCPhysCR3, &Walk, &GstWalk);
     3515            int const rc = pgmGstSlatWalk(pVCpu, GCPhysCR3, false /* fIsLinearAddrValid */, 0 /* GCPtrNested */, &Walk,
     3516                                          &GstWalk);
    35543517            if (RT_SUCCESS(rc))
    35553518            { /* likely */ }
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