VirtualBox

Changeset 97196 in vbox for trunk


Ignore:
Timestamp:
Oct 18, 2022 10:42:52 AM (2 years ago)
Author:
vboxsync
Message:

VMM/DBGF: Changed the PCPUMCTXCORE arguments to PCPUMCTX for DBGFTrap01Handler and DBGFTrap03Handler.

Location:
trunk
Files:
5 edited

Legend:

Unmodified
Added
Removed
  • trunk/include/VBox/vmm/dbgf.h

    r96407 r97196  
    11271127VMM_INT_DECL(VBOXSTRICTRC)  DBGFEventGenericWithArgs(PVM pVM, PVMCPU pVCpu, DBGFEVENTTYPE enmEvent, DBGFEVENTCTX enmCtx,
    11281128                                                     unsigned cArgs, ...);
    1129 VMM_INT_DECL(int)           DBGFTrap01Handler(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCUINTREG uDr6, bool fAltStepping);
    1130 VMM_INT_DECL(VBOXSTRICTRC)  DBGFTrap03Handler(PVMCC pVM, PVMCPUCC pVCpu, PCPUMCTXCORE pRegFrame);
     1129VMM_INT_DECL(int)           DBGFTrap01Handler(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, RTGCUINTREG uDr6, bool fAltStepping);
     1130VMM_INT_DECL(VBOXSTRICTRC)  DBGFTrap03Handler(PVMCC pVM, PVMCPUCC pVCpu, PCPUMCTX pCtx);
    11311131
    11321132
  • trunk/src/VBox/VMM/VMMAll/DBGFAllBp.cpp

    r96407 r97196  
    154154 * @param   pVM         The cross context VM structure.
    155155 * @param   pVCpu       The cross context virtual CPU structure.
    156  * @param   pRegFrame   Pointer to the register frame for the trap.
     156 * @param   pCtx        Pointer to the register context for the CPU.
    157157 * @param   hBp         The breakpoint handle which hit.
    158158 * @param   pBp         The shared breakpoint state.
     
    160160 */
    161161#ifdef IN_RING0
    162 DECLINLINE(int) dbgfBpHit(PVMCC pVM, PVMCPUCC pVCpu, PCPUMCTXCORE pRegFrame, DBGFBP hBp, PDBGFBPINT pBp, PDBGFBPINTR0 pBpR0)
    163 #else
    164 DECLINLINE(int) dbgfBpHit(PVMCC pVM, PVMCPUCC pVCpu, PCPUMCTXCORE pRegFrame, DBGFBP hBp, PDBGFBPINT pBp)
     162DECLINLINE(int) dbgfBpHit(PVMCC pVM, PVMCPUCC pVCpu, PCPUMCTX pCtx, DBGFBP hBp, PDBGFBPINT pBp, PDBGFBPINTR0 pBpR0)
     163#else
     164DECLINLINE(int) dbgfBpHit(PVMCC pVM, PVMCPUCC pVCpu, PCPUMCTX pCtx, DBGFBP hBp, PDBGFBPINT pBp)
    165165#endif
    166166{
    167167    uint64_t cHits = ASMAtomicIncU64(&pBp->Pub.cHits); RT_NOREF(cHits);
    168168
    169     RT_NOREF(pRegFrame);
    170     LogFlow(("dbgfBpHit: hit breakpoint %u at %04x:%RGv cHits=0x%RX64\n",
    171              hBp, pRegFrame->cs.Sel, pRegFrame->rip, cHits));
     169    RT_NOREF(pCtx);
     170    LogFlow(("dbgfBpHit: hit breakpoint %u at %04x:%RGv cHits=0x%RX64\n", hBp, pCtx->cs.Sel, pCtx->rip, cHits));
    172171
    173172    int rc = VINF_EM_DBG_BREAKPOINT;
     
    335334 * @param   pVM         The cross context VM structure.
    336335 * @param   pVCpu       The cross context virtual CPU structure.
    337  * @param   pRegFrame   Pointer to the register frame for the trap.
     336 * @param   pCtx        Pointer to the register context for the CPU.
    338337 * @param   idxL2Root   L2 table index of the table root.
    339338 * @param   GCPtrKey    The key to search for.
    340339 */
    341 static int dbgfBpL2Walk(PVMCC pVM, PVMCPUCC pVCpu, PCPUMCTXCORE pRegFrame,
    342                         uint32_t idxL2Root, RTGCUINTPTR GCPtrKey)
     340static int dbgfBpL2Walk(PVMCC pVM, PVMCPUCC pVCpu, PCPUMCTX pCtx, uint32_t idxL2Root, RTGCUINTPTR GCPtrKey)
    343341{
    344342    /** @todo We don't use the depth right now but abort the walking after a fixed amount of levels. */
     
    369367                && DBGF_BP_PUB_GET_TYPE(&pBp->Pub) == DBGFBPTYPE_INT3)
    370368#ifdef IN_RING3
    371                 return dbgfBpHit(pVM, pVCpu, pRegFrame, hBp, pBp);
    372 #else
    373                 return dbgfBpHit(pVM, pVCpu, pRegFrame, hBp, pBp, pBpR0);
     369                return dbgfBpHit(pVM, pVCpu, pCtx, hBp, pBp);
     370#else
     371                return dbgfBpHit(pVM, pVCpu, pCtx, hBp, pBp, pBpR0);
    374372#endif
    375373
     
    483481 * @param   pVM             The cross context VM structure.
    484482 * @param   pVCpu           The cross context virtual CPU structure.
    485  * @param   pRegFrame       Pointer to the register frame for the trap.
     483 * @param   pCtx            Pointer to the register context for the CPU.
    486484 * @param   uDr6            The DR6 hypervisor register value.
    487485 * @param   fAltStepping    Alternative stepping indicator.
    488486 */
    489 VMM_INT_DECL(int) DBGFTrap01Handler(PVM pVM, PVMCPU pVCpu, PCPUMCTXCORE pRegFrame, RTGCUINTREG uDr6, bool fAltStepping)
     487VMM_INT_DECL(int) DBGFTrap01Handler(PVM pVM, PVMCPU pVCpu, PCPUMCTX pCtx, RTGCUINTREG uDr6, bool fAltStepping)
    490488{
    491489    /** @todo Intel docs say that X86_DR6_BS has the highest priority... */
    492     RT_NOREF(pRegFrame);
     490    RT_NOREF(pCtx);
    493491
    494492    /*
     
    506504                pVCpu->dbgf.s.fSingleSteppingRaw = false;
    507505                LogFlow(("DBGFRZTrap03Handler: hit hw breakpoint %x at %04x:%RGv\n",
    508                          pVM->dbgf.s.aHwBreakpoints[iBp].hBp, pRegFrame->cs.Sel, pRegFrame->rip));
     506                         pVM->dbgf.s.aHwBreakpoints[iBp].hBp, pCtx->cs.Sel, pCtx->rip));
    509507
    510508                return VINF_EM_DBG_BREAKPOINT;
     
    520518    {
    521519        pVCpu->dbgf.s.fSingleSteppingRaw = false;
    522         LogFlow(("DBGFRZTrap01Handler: single step at %04x:%RGv\n", pRegFrame->cs.Sel, pRegFrame->rip));
     520        LogFlow(("DBGFRZTrap01Handler: single step at %04x:%RGv\n", pCtx->cs.Sel, pCtx->rip));
    523521        return VINF_EM_DBG_STEPPED;
    524522    }
    525523
    526     LogFlow(("DBGFRZTrap01Handler: guest debug event %#x at %04x:%RGv!\n", (uint32_t)uDr6, pRegFrame->cs.Sel, pRegFrame->rip));
     524    LogFlow(("DBGFRZTrap01Handler: guest debug event %#x at %04x:%RGv!\n", (uint32_t)uDr6, pCtx->cs.Sel, pCtx->rip));
    527525    return VINF_EM_RAW_GUEST_TRAP;
    528526}
     
    538536 * @param   pVM         The cross context VM structure.
    539537 * @param   pVCpu       The cross context virtual CPU structure.
    540  * @param   pRegFrame   Pointer to the register frame for the trap.
    541  */
    542 VMM_INT_DECL(VBOXSTRICTRC) DBGFTrap03Handler(PVMCC pVM, PVMCPUCC pVCpu, PCPUMCTXCORE pRegFrame)
     538 * @param   pCtx        Pointer to the register context for the CPU.
     539 */
     540VMM_INT_DECL(VBOXSTRICTRC) DBGFTrap03Handler(PVMCC pVM, PVMCPUCC pVCpu, PCPUMCTX pCtx)
    543541{
    544542#if defined(IN_RING0)
     
    553551    {
    554552        RTGCPTR GCPtrBp;
    555         int rc = SELMValidateAndConvertCSAddr(pVCpu, pRegFrame->eflags, pRegFrame->ss.Sel, pRegFrame->cs.Sel, &pRegFrame->cs,
    556                                               pRegFrame->rip /* no -1 in R0 */,
    557                                               &GCPtrBp);
     553        int rc = SELMValidateAndConvertCSAddr(pVCpu, pCtx->eflags, pCtx->ss.Sel, pCtx->cs.Sel, &pCtx->cs,
     554                                              pCtx->rip /* no -1 outside non-rawmode */, &GCPtrBp);
    558555        AssertRCReturn(rc, rc);
    559556
     
    581578                    if (pBp->Pub.u.Int3.GCPtr == (RTGCUINTPTR)GCPtrBp)
    582579#ifdef IN_RING3
    583                         rc = dbgfBpHit(pVM, pVCpu, pRegFrame, hBp, pBp);
    584 #else
    585                         rc = dbgfBpHit(pVM, pVCpu, pRegFrame, hBp, pBp, pBpR0);
     580                        rc = dbgfBpHit(pVM, pVCpu, pCtx, hBp, pBp);
     581#else
     582                        rc = dbgfBpHit(pVM, pVCpu, pCtx, hBp, pBp, pBpR0);
    586583#endif
    587584                    else
     
    592589            }
    593590            else if (u8Type == DBGF_BP_INT3_L1_ENTRY_TYPE_L2_IDX)
    594                 rc = dbgfBpL2Walk(pVM, pVCpu, pRegFrame, DBGF_BP_INT3_L1_ENTRY_GET_L2_IDX(u32L1Entry),
     591                rc = dbgfBpL2Walk(pVM, pVCpu, pCtx, DBGF_BP_INT3_L1_ENTRY_GET_L2_IDX(u32L1Entry),
    595592                                  DBGF_BP_INT3_L2_KEY_EXTRACT_FROM_ADDR((RTGCUINTPTR)GCPtrBp));
    596593            else /* Some invalid type. */
  • trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp

    r97183 r97196  
    28982898        else
    28992899        {
    2900             VBOXSTRICTRC rcStrict = DBGFTrap03Handler(pVM, pVCpu, CPUMCTX2CORE(&pVCpu->cpum.GstCtx));
     2900            VBOXSTRICTRC rcStrict = DBGFTrap03Handler(pVM, pVCpu, &pVCpu->cpum.GstCtx);
    29012901            Log(("iemCImpl_int: DBGFTrap03Handler -> %Rrc\n", VBOXSTRICTRC_VAL(rcStrict) ));
    29022902            if (rcStrict != VINF_EM_RAW_GUEST_TRAP)
  • trunk/src/VBox/VMM/VMMAll/VMXAllTemplate.cpp.h

    r97188 r97196  
    69536953    VBOXSTRICTRC rcStrict;
    69546954    if (!pVmxTransient->fIsNestedGuest)
    6955         rcStrict = DBGFTrap03Handler(pVCpu->CTX_SUFF(pVM), pVCpu, CPUMCTX2CORE(&pVCpu->cpum.GstCtx));
     6955        rcStrict = DBGFTrap03Handler(pVCpu->CTX_SUFF(pVM), pVCpu, &pVCpu->cpum.GstCtx);
    69566956    else
    69576957        rcStrict = VINF_EM_RAW_GUEST_TRAP;
     
    71007100
    71017101    int rc;
    7102     PCPUMCTX pCtx = &pVCpu->cpum.GstCtx;
    71037102    if (!pVmxTransient->fIsNestedGuest)
    71047103    {
    7105         rc = DBGFTrap01Handler(pVCpu->CTX_SUFF(pVM), pVCpu, CPUMCTX2CORE(pCtx), uDR6, VCPU_2_VMXSTATE(pVCpu).fSingleInstruction);
     7104        rc = DBGFTrap01Handler(pVCpu->CTX_SUFF(pVM), pVCpu, &pVCpu->cpum.GstCtx, uDR6, VCPU_2_VMXSTATE(pVCpu).fSingleInstruction);
    71067105
    71077106        /*
     
    71317130        HM_DISABLE_PREEMPT(pVCpu);
    71327131
    7133         pCtx->dr[6] &= ~X86_DR6_B_MASK;
    7134         pCtx->dr[6] |= uDR6;
     7132        pVCpu->cpum.GstCtx.dr[6] &= ~X86_DR6_B_MASK;
     7133        pVCpu->cpum.GstCtx.dr[6] |= uDR6;
    71357134        if (CPUMIsGuestDebugStateActive(pVCpu))
    7136             ASMSetDR6(pCtx->dr[6]);
     7135            ASMSetDR6(pVCpu->cpum.GstCtx.dr[6]);
    71377136
    71387137        HM_RESTORE_PREEMPT();
     
    71467145
    71477146        /* X86_DR7_GD will be cleared if DRx accesses should be trapped inside the guest. */
    7148         pCtx->dr[7] &= ~(uint64_t)X86_DR7_GD;
     7147        pVCpu->cpum.GstCtx.dr[7] &= ~(uint64_t)X86_DR7_GD;
    71497148
    71507149        /* Paranoia. */
    7151         pCtx->dr[7] &= ~(uint64_t)X86_DR7_RAZ_MASK;
    7152         pCtx->dr[7] |= X86_DR7_RA1_MASK;
    7153 
    7154         rc = VMX_VMCS_WRITE_NW(pVCpu, VMX_VMCS_GUEST_DR7, pCtx->dr[7]);
     7150        pVCpu->cpum.GstCtx.dr[7] &= ~(uint64_t)X86_DR7_RAZ_MASK;
     7151        pVCpu->cpum.GstCtx.dr[7] |= X86_DR7_RA1_MASK;
     7152
     7153        rc = VMX_VMCS_WRITE_NW(pVCpu, VMX_VMCS_GUEST_DR7, pVCpu->cpum.GstCtx.dr[7]);
    71557154        AssertRC(rc);
    71567155
     
    71677166         */
    71687167        vmxHCSetPendingEvent(pVCpu, VMX_ENTRY_INT_INFO_FROM_EXIT_INT_INFO(pVmxTransient->uExitIntInfo),
    7169                                pVmxTransient->cbExitInstr, pVmxTransient->uExitIntErrorCode, 0 /* GCPtrFaultAddress */);
     7168                             pVmxTransient->cbExitInstr, pVmxTransient->uExitIntErrorCode, 0 /* GCPtrFaultAddress */);
    71707169        return VINF_SUCCESS;
    71717170    }
  • trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp

    r97193 r97196  
    85568556     * handler expects. See AMD spec. 15.12.2 "#DB (Debug)".
    85578557     */
    8558     PVMCC      pVM   = pVCpu->CTX_SUFF(pVM);
     8558    PVMCC    pVM   = pVCpu->CTX_SUFF(pVM);
    85598559    PSVMVMCB pVmcb = pVCpu->hmr0.s.svm.pVmcb;
    8560     PCPUMCTX pCtx  = &pVCpu->cpum.GstCtx;
    8561     int rc = DBGFTrap01Handler(pVM, pVCpu, CPUMCTX2CORE(pCtx), pVmcb->guest.u64DR6, pVCpu->hm.s.fSingleInstruction);
     8560    int rc = DBGFTrap01Handler(pVM, pVCpu, &pVCpu->cpum.GstCtx, pVmcb->guest.u64DR6, pVCpu->hm.s.fSingleInstruction);
    85628561    if (rc == VINF_EM_RAW_GUEST_TRAP)
    85638562    {
     
    86228621    STAM_COUNTER_INC(&pVCpu->hm.s.StatExitGuestBP);
    86238622
    8624     PCPUMCTX pCtx = &pVCpu->cpum.GstCtx;
    8625     VBOXSTRICTRC rc = DBGFTrap03Handler(pVCpu->CTX_SUFF(pVM), pVCpu, CPUMCTX2CORE(pCtx));
     8623    VBOXSTRICTRC rc = DBGFTrap03Handler(pVCpu->CTX_SUFF(pVM), pVCpu, &pVCpu->cpum.GstCtx);
    86268624    if (rc == VINF_EM_RAW_GUEST_TRAP)
    86278625    {
Note: See TracChangeset for help on using the changeset viewer.

© 2024 Oracle Support Privacy / Do Not Sell My Info Terms of Use Trademark Policy Automated Access Etiquette