VirtualBox

Changeset 96404 in vbox


Ignore:
Timestamp:
Aug 22, 2022 4:02:52 PM (2 years ago)
Author:
vboxsync
Message:

ValidationKit/bs3-cpu-instr-3: Add simple [v]shufps/[v]shufpd instructions testcases, ​bugref:9898

Location:
trunk/src/VBox/ValidationKit/bootsectors
Files:
2 edited

Legend:

Unmodified
Added
Removed

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-3-template.mac

    r96116 r96404  
    24932493 %endif
    24942494
     2495;
     2496; [V]SHUFPS
     2497;
     2498EMIT_INSTR_PLUS_ICEBP   shufps,  XMM1, XMM2,  0FFh
     2499EMIT_INSTR_PLUS_ICEBP   shufps,  XMM1, FSxBX, 0FFh
     2500EMIT_INSTR_PLUS_ICEBP   shufps,  XMM1, XMM2,  000h
     2501EMIT_INSTR_PLUS_ICEBP   shufps,  XMM1, FSxBX, 000h
     2502
     2503EMIT_INSTR_PLUS_ICEBP   vshufps, XMM1, XMM2, XMM3,  0FFh
     2504EMIT_INSTR_PLUS_ICEBP   vshufps, XMM1, XMM2, FSxBX, 0FFh
     2505EMIT_INSTR_PLUS_ICEBP   vshufps, XMM1, XMM2, XMM3,  000h
     2506EMIT_INSTR_PLUS_ICEBP   vshufps, XMM1, XMM2, FSxBX, 000h
     2507
     2508EMIT_INSTR_PLUS_ICEBP   vshufps, YMM1, YMM2, YMM3,  0FFh
     2509EMIT_INSTR_PLUS_ICEBP   vshufps, YMM1, YMM2, FSxBX, 0FFh
     2510EMIT_INSTR_PLUS_ICEBP   vshufps, YMM1, YMM2, YMM3,  000h
     2511EMIT_INSTR_PLUS_ICEBP   vshufps, YMM1, YMM2, FSxBX, 000h
     2512
     2513 %if TMPL_BITS == 64
     2514EMIT_INSTR_PLUS_ICEBP   shufps,  XMM8, XMM9,  0FFh
     2515EMIT_INSTR_PLUS_ICEBP   shufps,  XMM8, FSxBX, 0FFh
     2516EMIT_INSTR_PLUS_ICEBP   shufps,  XMM8, XMM9,  000h
     2517EMIT_INSTR_PLUS_ICEBP   shufps,  XMM8, FSxBX, 000h
     2518
     2519EMIT_INSTR_PLUS_ICEBP   vshufps, XMM8, XMM9, XMM10, 0FFh
     2520EMIT_INSTR_PLUS_ICEBP   vshufps, XMM8, XMM9, FSxBX, 0FFh
     2521EMIT_INSTR_PLUS_ICEBP   vshufps, XMM8, XMM9, XMM10, 000h
     2522EMIT_INSTR_PLUS_ICEBP   vshufps, XMM8, XMM9, FSxBX, 000h
     2523
     2524EMIT_INSTR_PLUS_ICEBP   vshufps, YMM8, YMM9, YMM10, 0FFh
     2525EMIT_INSTR_PLUS_ICEBP   vshufps, YMM8, YMM9, FSxBX, 0FFh
     2526EMIT_INSTR_PLUS_ICEBP   vshufps, YMM8, YMM9, YMM10, 000h
     2527EMIT_INSTR_PLUS_ICEBP   vshufps, YMM8, YMM9, FSxBX, 000h
     2528 %endif
     2529
     2530;
     2531; [V]SHUFPD
     2532;
     2533EMIT_INSTR_PLUS_ICEBP   shufpd,  XMM1, XMM2,  0FFh
     2534EMIT_INSTR_PLUS_ICEBP   shufpd,  XMM1, FSxBX, 0FFh
     2535EMIT_INSTR_PLUS_ICEBP   shufpd,  XMM1, XMM2,  000h
     2536EMIT_INSTR_PLUS_ICEBP   shufpd,  XMM1, FSxBX, 000h
     2537
     2538EMIT_INSTR_PLUS_ICEBP   vshufpd, XMM1, XMM2, XMM3,  0FFh
     2539EMIT_INSTR_PLUS_ICEBP   vshufpd, XMM1, XMM2, FSxBX, 0FFh
     2540EMIT_INSTR_PLUS_ICEBP   vshufpd, XMM1, XMM2, XMM3,  000h
     2541EMIT_INSTR_PLUS_ICEBP   vshufpd, XMM1, XMM2, FSxBX, 000h
     2542
     2543EMIT_INSTR_PLUS_ICEBP   vshufpd, YMM1, YMM2, YMM3,  0FFh
     2544EMIT_INSTR_PLUS_ICEBP   vshufpd, YMM1, YMM2, FSxBX, 0FFh
     2545EMIT_INSTR_PLUS_ICEBP   vshufpd, YMM1, YMM2, YMM3,  000h
     2546EMIT_INSTR_PLUS_ICEBP   vshufpd, YMM1, YMM2, FSxBX, 000h
     2547
     2548 %if TMPL_BITS == 64
     2549EMIT_INSTR_PLUS_ICEBP   shufpd,  XMM8, XMM9,  0FFh
     2550EMIT_INSTR_PLUS_ICEBP   shufpd,  XMM8, FSxBX, 0FFh
     2551EMIT_INSTR_PLUS_ICEBP   shufpd,  XMM8, XMM9,  000h
     2552EMIT_INSTR_PLUS_ICEBP   shufpd,  XMM8, FSxBX, 000h
     2553
     2554EMIT_INSTR_PLUS_ICEBP   vshufpd, XMM8, XMM9, XMM10, 0FFh
     2555EMIT_INSTR_PLUS_ICEBP   vshufpd, XMM8, XMM9, FSxBX, 0FFh
     2556EMIT_INSTR_PLUS_ICEBP   vshufpd, XMM8, XMM9, XMM10, 000h
     2557EMIT_INSTR_PLUS_ICEBP   vshufpd, XMM8, XMM9, FSxBX, 000h
     2558
     2559EMIT_INSTR_PLUS_ICEBP   vshufpd, YMM8, YMM9, YMM10, 0FFh
     2560EMIT_INSTR_PLUS_ICEBP   vshufpd, YMM8, YMM9, FSxBX, 0FFh
     2561EMIT_INSTR_PLUS_ICEBP   vshufpd, YMM8, YMM9, YMM10, 000h
     2562EMIT_INSTR_PLUS_ICEBP   vshufpd, YMM8, YMM9, FSxBX, 000h
     2563 %endif
     2564
    24952565
    24962566%endif ; BS3_INSTANTIATING_CMN
    24972567
    24982568%include "bs3kit-template-footer.mac"   ; reset environment
    2499 

  • trunk/src/VBox/ValidationKit/bootsectors/bs3-cpu-instr-3.c32

    r96116 r96404  
    64416441        {  bs3CpuInstr3_vunpckhpd_YMM8_YMM9_YMM10_icebp_c64, 255,         RM_REG, T_AVX2_256,  8, 9,  10, RT_ELEMENTS(s_aValuesD),  s_aValuesD },
    64426442        {  bs3CpuInstr3_vunpckhpd_YMM8_YMM9_FSxBX_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256,  8, 9, 255, RT_ELEMENTS(s_aValuesD),  s_aValuesD },
     6443    };
     6444    static BS3CPUINSTR3_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
     6445    unsigned const                         iTest       = BS3CPUINSTR3_TEST_MODES_INDEX(bMode);
     6446    return bs3CpuInstr3_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
     6447                                        g_aXcptConfig4, RT_ELEMENTS(g_aXcptConfig4));
     6448}
     6449
     6450
     6451/*
     6452 * [V]SHUFPS - Shuffle two pairs of single precision floating point values.
     6453 */
     6454BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_shufps_XMM1_XMM2_0FFh_icebp);
     6455BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_shufps_XMM1_FSxBX_0FFh_icebp);
     6456BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_shufps_XMM1_XMM2_000h_icebp);
     6457BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_shufps_XMM1_FSxBX_000h_icebp);
     6458extern FNBS3FAR             bs3CpuInstr3_shufps_XMM8_XMM9_0FFh_icebp_c64;
     6459extern FNBS3FAR             bs3CpuInstr3_shufps_XMM8_FSxBX_0FFh_icebp_c64;
     6460extern FNBS3FAR             bs3CpuInstr3_shufps_XMM8_XMM9_000h_icebp_c64;
     6461extern FNBS3FAR             bs3CpuInstr3_shufps_XMM8_FSxBX_000h_icebp_c64;
     6462BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vshufps_XMM1_XMM2_XMM3_0FFh_icebp);
     6463BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vshufps_XMM1_XMM2_FSxBX_0FFh_icebp);
     6464BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vshufps_XMM1_XMM2_XMM3_000h_icebp);
     6465BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vshufps_XMM1_XMM2_FSxBX_000h_icebp);
     6466extern FNBS3FAR             bs3CpuInstr3_vshufps_XMM8_XMM9_XMM10_0FFh_icebp_c64;
     6467extern FNBS3FAR             bs3CpuInstr3_vshufps_XMM8_XMM9_FSxBX_0FFh_icebp_c64;
     6468extern FNBS3FAR             bs3CpuInstr3_vshufps_XMM8_XMM9_XMM10_000h_icebp_c64;
     6469extern FNBS3FAR             bs3CpuInstr3_vshufps_XMM8_XMM9_FSxBX_000h_icebp_c64;
     6470BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vshufps_YMM1_YMM2_YMM3_0FFh_icebp);
     6471BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vshufps_YMM1_YMM2_FSxBX_0FFh_icebp);
     6472BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vshufps_YMM1_YMM2_YMM3_000h_icebp);
     6473BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vshufps_YMM1_YMM2_FSxBX_000h_icebp);
     6474extern FNBS3FAR             bs3CpuInstr3_vshufps_YMM8_YMM9_YMM10_0FFh_icebp_c64;
     6475extern FNBS3FAR             bs3CpuInstr3_vshufps_YMM8_YMM9_FSxBX_0FFh_icebp_c64;
     6476extern FNBS3FAR             bs3CpuInstr3_vshufps_YMM8_YMM9_YMM10_000h_icebp_c64;
     6477extern FNBS3FAR             bs3CpuInstr3_vshufps_YMM8_YMM9_FSxBX_000h_icebp_c64;
     6478
     6479BS3_DECL_FAR(uint8_t) bs3CpuInstr3_v_shufps(uint8_t bMode)
     6480{
     6481    static BS3CPUINSTR3_TEST1_VALUES_T const s_aValuesFF[] =
     6482    {
     6483        {   /*src2*/ RTUINT256_INIT_C(0, 0, 0, 0),
     6484            /*src1*/ RTUINT256_INIT_C(0, 0, 0, 0),
     6485            /* => */ RTUINT256_INIT_C(0, 0, 0, 0) },
     6486        {   /*src2*/ RTUINT256_INIT_C(0xf1f2f3f4f5f6f7f8, 0xe1e2e3e4e5e6e7e8, 0xd1d2d3d4d5d6d7d8, 0xc1c2c3c4c5c6c7c8),
     6487            /*src1*/ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788),
     6488            /* => */ RTUINT256_INIT_C(0xf1f2f3f4f1f2f3f4, 0xb1b2b3b4b1b2b3b4, 0xd1d2d3d4d1d2d3d4, 0x9192939491929394) },
     6489        {   /*src2*/ RTUINT256_INIT_C(0x4d09f02a6cdc73d5, 0x3ef417c8666b3fe6, 0xb4212fa8564c9ba2, 0x9c5ce073930996bb),
     6490            /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd),
     6491            /* => */ RTUINT256_INIT_C(0x4d09f02a4d09f02a, 0x1eddddac1eddddac, 0xb4212fa8b4212fa8, 0x8800e95b8800e95b) },
     6492    };
     6493    static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues00[] =
     6494    {
     6495        {   /*src2*/ RTUINT256_INIT_C(0, 0, 0, 0),
     6496            /*src1*/ RTUINT256_INIT_C(0, 0, 0, 0),
     6497            /* => */ RTUINT256_INIT_C(0, 0, 0, 0) },
     6498        {   /*src2*/ RTUINT256_INIT_C(0xf1f2f3f4f5f6f7f8, 0xe1e2e3e4e5e6e7e8, 0xd1d2d3d4d5d6d7d8, 0xc1c2c3c4c5c6c7c8),
     6499            /*src1*/ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788),
     6500            /* => */ RTUINT256_INIT_C(0xe5e6e7e8e5e6e7e8, 0xa5a6a7a8a5a6a7a8, 0xc5c6c7c8c5c6c7c8, 0x8586878885868788) },
     6501        {   /*src2*/ RTUINT256_INIT_C(0x4d09f02a6cdc73d5, 0x3ef417c8666b3fe6, 0xb4212fa8564c9ba2, 0x9c5ce073930996bb),
     6502            /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd),
     6503            /* => */ RTUINT256_INIT_C(0x666b3fe6666b3fe6, 0x4072563340725633, 0x930996bb930996bb, 0x238499fd238499fd) },
     6504    };
     6505
     6506    static BS3CPUINSTR3_TEST1_T const s_aTests16[] =
     6507    {
     6508        {  bs3CpuInstr3_shufps_XMM1_XMM2_0FFh_icebp_c16,        255,         RM_REG, T_SSE2,      1, 1,   2, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6509        {  bs3CpuInstr3_shufps_XMM1_FSxBX_0FFh_icebp_c16,       255,         RM_MEM, T_SSE2,      1, 1, 255, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6510        {  bs3CpuInstr3_shufps_XMM1_XMM2_000h_icebp_c16,        255,         RM_REG, T_SSE2,      1, 1,   2, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6511        {  bs3CpuInstr3_shufps_XMM1_FSxBX_000h_icebp_c16,       255,         RM_MEM, T_SSE2,      1, 1, 255, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6512
     6513        {  bs3CpuInstr3_vshufps_XMM1_XMM2_XMM3_0FFh_icebp_c16,  255,         RM_REG, T_AVX_128,   1, 2,   3, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6514        {  bs3CpuInstr3_vshufps_XMM1_XMM2_FSxBX_0FFh_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128,   1, 2, 255, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6515        {  bs3CpuInstr3_vshufps_YMM1_YMM2_YMM3_0FFh_icebp_c16,  255,         RM_REG, T_AVX2_256,  1, 2,   3, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6516        {  bs3CpuInstr3_vshufps_YMM1_YMM2_FSxBX_0FFh_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256,  1, 2, 255, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6517        {  bs3CpuInstr3_vshufps_XMM1_XMM2_XMM3_000h_icebp_c16,  255,         RM_REG, T_AVX_128,   1, 2,   3, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6518        {  bs3CpuInstr3_vshufps_XMM1_XMM2_FSxBX_000h_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128,   1, 2, 255, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6519        {  bs3CpuInstr3_vshufps_YMM1_YMM2_YMM3_000h_icebp_c16,  255,         RM_REG, T_AVX2_256,  1, 2,   3, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6520        {  bs3CpuInstr3_vshufps_YMM1_YMM2_FSxBX_000h_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256,  1, 2, 255, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6521    };
     6522    static BS3CPUINSTR3_TEST1_T const s_aTests32[] =
     6523    {
     6524        {  bs3CpuInstr3_shufps_XMM1_XMM2_0FFh_icebp_c32,        255,         RM_REG, T_SSE2,      1, 1,   2, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6525        {  bs3CpuInstr3_shufps_XMM1_FSxBX_0FFh_icebp_c32,       255,         RM_MEM, T_SSE2,      1, 1, 255, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6526        {  bs3CpuInstr3_shufps_XMM1_XMM2_000h_icebp_c32,        255,         RM_REG, T_SSE2,      1, 1,   2, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6527        {  bs3CpuInstr3_shufps_XMM1_FSxBX_000h_icebp_c32,       255,         RM_MEM, T_SSE2,      1, 1, 255, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6528
     6529        {  bs3CpuInstr3_vshufps_XMM1_XMM2_XMM3_0FFh_icebp_c32,  255,         RM_REG, T_AVX_128,   1, 2,   3, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6530        {  bs3CpuInstr3_vshufps_XMM1_XMM2_FSxBX_0FFh_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128,   1, 2, 255, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6531        {  bs3CpuInstr3_vshufps_YMM1_YMM2_YMM3_0FFh_icebp_c32,  255,         RM_REG, T_AVX2_256,  1, 2,   3, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6532        {  bs3CpuInstr3_vshufps_YMM1_YMM2_FSxBX_0FFh_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256,  1, 2, 255, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6533        {  bs3CpuInstr3_vshufps_XMM1_XMM2_XMM3_000h_icebp_c32,  255,         RM_REG, T_AVX_128,   1, 2,   3, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6534        {  bs3CpuInstr3_vshufps_XMM1_XMM2_FSxBX_000h_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128,   1, 2, 255, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6535        {  bs3CpuInstr3_vshufps_YMM1_YMM2_YMM3_000h_icebp_c32,  255,         RM_REG, T_AVX2_256,  1, 2,   3, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6536        {  bs3CpuInstr3_vshufps_YMM1_YMM2_FSxBX_000h_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256,  1, 2, 255, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6537    };
     6538    static BS3CPUINSTR3_TEST1_T const s_aTests64[] =
     6539    {
     6540        {  bs3CpuInstr3_shufps_XMM1_XMM2_0FFh_icebp_c64,        255,         RM_REG, T_SSE2,      1, 1,   2, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6541        {  bs3CpuInstr3_shufps_XMM1_FSxBX_0FFh_icebp_c64,       255,         RM_MEM, T_SSE2,      1, 1, 255, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6542        {  bs3CpuInstr3_shufps_XMM8_XMM9_0FFh_icebp_c64,        255,         RM_REG, T_SSE2,      8, 8,   9, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6543        {  bs3CpuInstr3_shufps_XMM8_FSxBX_0FFh_icebp_c64,       255,         RM_MEM, T_SSE2,      8, 8, 255, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6544        {  bs3CpuInstr3_shufps_XMM1_XMM2_000h_icebp_c64,        255,         RM_REG, T_SSE2,      1, 1,   2, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6545        {  bs3CpuInstr3_shufps_XMM1_FSxBX_000h_icebp_c64,       255,         RM_MEM, T_SSE2,      1, 1, 255, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6546        {  bs3CpuInstr3_shufps_XMM8_XMM9_000h_icebp_c64,        255,         RM_REG, T_SSE2,      8, 8,   9, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6547        {  bs3CpuInstr3_shufps_XMM8_FSxBX_000h_icebp_c64,       255,         RM_MEM, T_SSE2,      8, 8, 255, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6548
     6549        {  bs3CpuInstr3_vshufps_XMM1_XMM2_XMM3_0FFh_icebp_c64,  255,         RM_REG, T_AVX_128,   1, 2,   3, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6550        {  bs3CpuInstr3_vshufps_XMM1_XMM2_FSxBX_0FFh_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128,   1, 2, 255, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6551        {  bs3CpuInstr3_vshufps_XMM8_XMM9_XMM10_0FFh_icebp_c64, 255,         RM_REG, T_AVX_128,   8, 9,  10, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6552        {  bs3CpuInstr3_vshufps_XMM8_XMM9_FSxBX_0FFh_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128,   8, 9, 255, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6553        {  bs3CpuInstr3_vshufps_YMM1_YMM2_YMM3_0FFh_icebp_c64,  255,         RM_REG, T_AVX2_256,  1, 2,   3, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6554        {  bs3CpuInstr3_vshufps_YMM1_YMM2_FSxBX_0FFh_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256,  1, 2, 255, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6555        {  bs3CpuInstr3_vshufps_YMM8_YMM9_YMM10_0FFh_icebp_c64, 255,         RM_REG, T_AVX2_256,  8, 9,  10, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6556        {  bs3CpuInstr3_vshufps_YMM8_YMM9_FSxBX_0FFh_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256,  8, 9, 255, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6557        {  bs3CpuInstr3_vshufps_XMM1_XMM2_XMM3_000h_icebp_c64,  255,         RM_REG, T_AVX_128,   1, 2,   3, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6558        {  bs3CpuInstr3_vshufps_XMM1_XMM2_FSxBX_000h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128,   1, 2, 255, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6559        {  bs3CpuInstr3_vshufps_XMM8_XMM9_XMM10_000h_icebp_c64, 255,         RM_REG, T_AVX_128,   8, 9,  10, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6560        {  bs3CpuInstr3_vshufps_XMM8_XMM9_FSxBX_000h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128,   8, 9, 255, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6561        {  bs3CpuInstr3_vshufps_YMM1_YMM2_YMM3_000h_icebp_c64,  255,         RM_REG, T_AVX2_256,  1, 2,   3, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6562        {  bs3CpuInstr3_vshufps_YMM1_YMM2_FSxBX_000h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256,  1, 2, 255, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6563        {  bs3CpuInstr3_vshufps_YMM8_YMM9_YMM10_000h_icebp_c64, 255,         RM_REG, T_AVX2_256,  8, 9,  10, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6564        {  bs3CpuInstr3_vshufps_YMM8_YMM9_FSxBX_000h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256,  8, 9, 255, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6565    };
     6566    static BS3CPUINSTR3_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
     6567    unsigned const                         iTest       = BS3CPUINSTR3_TEST_MODES_INDEX(bMode);
     6568    return bs3CpuInstr3_WorkerTestType1(bMode, s_aTests[iTest].paTests, s_aTests[iTest].cTests,
     6569                                        g_aXcptConfig4, RT_ELEMENTS(g_aXcptConfig4));
     6570}
     6571
     6572
     6573/*
     6574 * [V]SHUFPD - Shuffle two pairs of double precision floating point values.
     6575 */
     6576BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_shufpd_XMM1_XMM2_0FFh_icebp);
     6577BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_shufpd_XMM1_FSxBX_0FFh_icebp);
     6578BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_shufpd_XMM1_XMM2_000h_icebp);
     6579BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_shufpd_XMM1_FSxBX_000h_icebp);
     6580extern FNBS3FAR             bs3CpuInstr3_shufpd_XMM8_XMM9_0FFh_icebp_c64;
     6581extern FNBS3FAR             bs3CpuInstr3_shufpd_XMM8_FSxBX_0FFh_icebp_c64;
     6582extern FNBS3FAR             bs3CpuInstr3_shufpd_XMM8_XMM9_000h_icebp_c64;
     6583extern FNBS3FAR             bs3CpuInstr3_shufpd_XMM8_FSxBX_000h_icebp_c64;
     6584BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vshufpd_XMM1_XMM2_XMM3_0FFh_icebp);
     6585BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vshufpd_XMM1_XMM2_FSxBX_0FFh_icebp);
     6586BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vshufpd_XMM1_XMM2_XMM3_000h_icebp);
     6587BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vshufpd_XMM1_XMM2_FSxBX_000h_icebp);
     6588extern FNBS3FAR             bs3CpuInstr3_vshufpd_XMM8_XMM9_XMM10_0FFh_icebp_c64;
     6589extern FNBS3FAR             bs3CpuInstr3_vshufpd_XMM8_XMM9_FSxBX_0FFh_icebp_c64;
     6590extern FNBS3FAR             bs3CpuInstr3_vshufpd_XMM8_XMM9_XMM10_000h_icebp_c64;
     6591extern FNBS3FAR             bs3CpuInstr3_vshufpd_XMM8_XMM9_FSxBX_000h_icebp_c64;
     6592BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vshufpd_YMM1_YMM2_YMM3_0FFh_icebp);
     6593BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vshufpd_YMM1_YMM2_FSxBX_0FFh_icebp);
     6594BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vshufpd_YMM1_YMM2_YMM3_000h_icebp);
     6595BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_vshufpd_YMM1_YMM2_FSxBX_000h_icebp);
     6596extern FNBS3FAR             bs3CpuInstr3_vshufpd_YMM8_YMM9_YMM10_0FFh_icebp_c64;
     6597extern FNBS3FAR             bs3CpuInstr3_vshufpd_YMM8_YMM9_FSxBX_0FFh_icebp_c64;
     6598extern FNBS3FAR             bs3CpuInstr3_vshufpd_YMM8_YMM9_YMM10_000h_icebp_c64;
     6599extern FNBS3FAR             bs3CpuInstr3_vshufpd_YMM8_YMM9_FSxBX_000h_icebp_c64;
     6600
     6601BS3_DECL_FAR(uint8_t) bs3CpuInstr3_v_shufpd(uint8_t bMode)
     6602{
     6603    static BS3CPUINSTR3_TEST1_VALUES_T const s_aValuesFF[] =
     6604    {
     6605        {   /*src2*/ RTUINT256_INIT_C(0, 0, 0, 0),
     6606            /*src1*/ RTUINT256_INIT_C(0, 0, 0, 0),
     6607            /* => */ RTUINT256_INIT_C(0, 0, 0, 0) },
     6608        {   /*src2*/ RTUINT256_INIT_C(0xf1f2f3f4f5f6f7f8, 0xe1e2e3e4e5e6e7e8, 0xd1d2d3d4d5d6d7d8, 0xc1c2c3c4c5c6c7c8),
     6609            /*src1*/ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788),
     6610            /* => */ RTUINT256_INIT_C(0xf1f2f3f4f5f6f7f8, 0xb1b2b3b4b5b6b7b8, 0xd1d2d3d4d5d6d7d8, 0x9192939495969798) },
     6611        {   /*src2*/ RTUINT256_INIT_C(0x4d09f02a6cdc73d5, 0x3ef417c8666b3fe6, 0xb4212fa8564c9ba2, 0x9c5ce073930996bb),
     6612            /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd),
     6613            /* => */ RTUINT256_INIT_C(0x4d09f02a6cdc73d5, 0x1eddddac09633294, 0xb4212fa8564c9ba2, 0x8800e95bbf9962c3) },
     6614    };
     6615    static BS3CPUINSTR3_TEST1_VALUES_T const s_aValues00[] =
     6616    {
     6617        {   /*src2*/ RTUINT256_INIT_C(0, 0, 0, 0),
     6618            /*src1*/ RTUINT256_INIT_C(0, 0, 0, 0),
     6619            /* => */ RTUINT256_INIT_C(0, 0, 0, 0) },
     6620        {   /*src2*/ RTUINT256_INIT_C(0xf1f2f3f4f5f6f7f8, 0xe1e2e3e4e5e6e7e8, 0xd1d2d3d4d5d6d7d8, 0xc1c2c3c4c5c6c7c8),
     6621            /*src1*/ RTUINT256_INIT_C(0xb1b2b3b4b5b6b7b8, 0xa1a2a3a4a5a6a7a8, 0x9192939495969798, 0x8182838485868788),
     6622            /* => */ RTUINT256_INIT_C(0xe1e2e3e4e5e6e7e8, 0xa1a2a3a4a5a6a7a8, 0xc1c2c3c4c5c6c7c8, 0x8182838485868788) },
     6623        {   /*src2*/ RTUINT256_INIT_C(0x4d09f02a6cdc73d5, 0x3ef417c8666b3fe6, 0xb4212fa8564c9ba2, 0x9c5ce073930996bb),
     6624            /*src1*/ RTUINT256_INIT_C(0x1eddddac09633294, 0xf95c8eec40725633, 0x8800e95bbf9962c3, 0x43d3cda0238499fd),
     6625            /* => */ RTUINT256_INIT_C(0x3ef417c8666b3fe6, 0xf95c8eec40725633, 0x9c5ce073930996bb, 0x43d3cda0238499fd) },
     6626    };
     6627
     6628    static BS3CPUINSTR3_TEST1_T const s_aTests16[] =
     6629    {
     6630        {  bs3CpuInstr3_shufpd_XMM1_XMM2_0FFh_icebp_c16,        255,         RM_REG, T_SSE2,      1, 1,   2, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6631        {  bs3CpuInstr3_shufpd_XMM1_FSxBX_0FFh_icebp_c16,       255,         RM_MEM, T_SSE2,      1, 1, 255, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6632        {  bs3CpuInstr3_shufpd_XMM1_XMM2_000h_icebp_c16,        255,         RM_REG, T_SSE2,      1, 1,   2, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6633        {  bs3CpuInstr3_shufpd_XMM1_FSxBX_000h_icebp_c16,       255,         RM_MEM, T_SSE2,      1, 1, 255, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6634
     6635        {  bs3CpuInstr3_vshufpd_XMM1_XMM2_XMM3_0FFh_icebp_c16,  255,         RM_REG, T_AVX_128,   1, 2,   3, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6636        {  bs3CpuInstr3_vshufpd_XMM1_XMM2_FSxBX_0FFh_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128,   1, 2, 255, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6637        {  bs3CpuInstr3_vshufpd_YMM1_YMM2_YMM3_0FFh_icebp_c16,  255,         RM_REG, T_AVX2_256,  1, 2,   3, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6638        {  bs3CpuInstr3_vshufpd_YMM1_YMM2_FSxBX_0FFh_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256,  1, 2, 255, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6639        {  bs3CpuInstr3_vshufpd_XMM1_XMM2_XMM3_000h_icebp_c16,  255,         RM_REG, T_AVX_128,   1, 2,   3, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6640        {  bs3CpuInstr3_vshufpd_XMM1_XMM2_FSxBX_000h_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX_128,   1, 2, 255, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6641        {  bs3CpuInstr3_vshufpd_YMM1_YMM2_YMM3_000h_icebp_c16,  255,         RM_REG, T_AVX2_256,  1, 2,   3, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6642        {  bs3CpuInstr3_vshufpd_YMM1_YMM2_FSxBX_000h_icebp_c16, X86_XCPT_DB, RM_MEM, T_AVX2_256,  1, 2, 255, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6643    };
     6644    static BS3CPUINSTR3_TEST1_T const s_aTests32[] =
     6645    {
     6646        {  bs3CpuInstr3_shufpd_XMM1_XMM2_0FFh_icebp_c32,        255,         RM_REG, T_SSE2,      1, 1,   2, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6647        {  bs3CpuInstr3_shufpd_XMM1_FSxBX_0FFh_icebp_c32,       255,         RM_MEM, T_SSE2,      1, 1, 255, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6648        {  bs3CpuInstr3_shufpd_XMM1_XMM2_000h_icebp_c32,        255,         RM_REG, T_SSE2,      1, 1,   2, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6649        {  bs3CpuInstr3_shufpd_XMM1_FSxBX_000h_icebp_c32,       255,         RM_MEM, T_SSE2,      1, 1, 255, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6650
     6651        {  bs3CpuInstr3_vshufpd_XMM1_XMM2_XMM3_0FFh_icebp_c32,  255,         RM_REG, T_AVX_128,   1, 2,   3, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6652        {  bs3CpuInstr3_vshufpd_XMM1_XMM2_FSxBX_0FFh_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128,   1, 2, 255, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6653        {  bs3CpuInstr3_vshufpd_YMM1_YMM2_YMM3_0FFh_icebp_c32,  255,         RM_REG, T_AVX2_256,  1, 2,   3, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6654        {  bs3CpuInstr3_vshufpd_YMM1_YMM2_FSxBX_0FFh_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256,  1, 2, 255, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6655        {  bs3CpuInstr3_vshufpd_XMM1_XMM2_XMM3_000h_icebp_c32,  255,         RM_REG, T_AVX_128,   1, 2,   3, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6656        {  bs3CpuInstr3_vshufpd_XMM1_XMM2_FSxBX_000h_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX_128,   1, 2, 255, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6657        {  bs3CpuInstr3_vshufpd_YMM1_YMM2_YMM3_000h_icebp_c32,  255,         RM_REG, T_AVX2_256,  1, 2,   3, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6658        {  bs3CpuInstr3_vshufpd_YMM1_YMM2_FSxBX_000h_icebp_c32, X86_XCPT_DB, RM_MEM, T_AVX2_256,  1, 2, 255, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6659    };
     6660    static BS3CPUINSTR3_TEST1_T const s_aTests64[] =
     6661    {
     6662        {  bs3CpuInstr3_shufpd_XMM1_XMM2_0FFh_icebp_c64,        255,         RM_REG, T_SSE2,      1, 1,   2, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6663        {  bs3CpuInstr3_shufpd_XMM1_FSxBX_0FFh_icebp_c64,       255,         RM_MEM, T_SSE2,      1, 1, 255, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6664        {  bs3CpuInstr3_shufpd_XMM8_XMM9_0FFh_icebp_c64,        255,         RM_REG, T_SSE2,      8, 8,   9, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6665        {  bs3CpuInstr3_shufpd_XMM8_FSxBX_0FFh_icebp_c64,       255,         RM_MEM, T_SSE2,      8, 8, 255, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6666        {  bs3CpuInstr3_shufpd_XMM1_XMM2_000h_icebp_c64,        255,         RM_REG, T_SSE2,      1, 1,   2, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6667        {  bs3CpuInstr3_shufpd_XMM1_FSxBX_000h_icebp_c64,       255,         RM_MEM, T_SSE2,      1, 1, 255, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6668        {  bs3CpuInstr3_shufpd_XMM8_XMM9_000h_icebp_c64,        255,         RM_REG, T_SSE2,      8, 8,   9, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6669        {  bs3CpuInstr3_shufpd_XMM8_FSxBX_000h_icebp_c64,       255,         RM_MEM, T_SSE2,      8, 8, 255, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6670
     6671        {  bs3CpuInstr3_vshufpd_XMM1_XMM2_XMM3_0FFh_icebp_c64,  255,         RM_REG, T_AVX_128,   1, 2,   3, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6672        {  bs3CpuInstr3_vshufpd_XMM1_XMM2_FSxBX_0FFh_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128,   1, 2, 255, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6673        {  bs3CpuInstr3_vshufpd_XMM8_XMM9_XMM10_0FFh_icebp_c64, 255,         RM_REG, T_AVX_128,   8, 9,  10, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6674        {  bs3CpuInstr3_vshufpd_XMM8_XMM9_FSxBX_0FFh_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128,   8, 9, 255, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6675        {  bs3CpuInstr3_vshufpd_YMM1_YMM2_YMM3_0FFh_icebp_c64,  255,         RM_REG, T_AVX2_256,  1, 2,   3, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6676        {  bs3CpuInstr3_vshufpd_YMM1_YMM2_FSxBX_0FFh_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256,  1, 2, 255, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6677        {  bs3CpuInstr3_vshufpd_YMM8_YMM9_YMM10_0FFh_icebp_c64, 255,         RM_REG, T_AVX2_256,  8, 9,  10, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6678        {  bs3CpuInstr3_vshufpd_YMM8_YMM9_FSxBX_0FFh_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256,  8, 9, 255, RT_ELEMENTS(s_aValuesFF),  s_aValuesFF },
     6679        {  bs3CpuInstr3_vshufpd_XMM1_XMM2_XMM3_000h_icebp_c64,  255,         RM_REG, T_AVX_128,   1, 2,   3, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6680        {  bs3CpuInstr3_vshufpd_XMM1_XMM2_FSxBX_000h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128,   1, 2, 255, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6681        {  bs3CpuInstr3_vshufpd_XMM8_XMM9_XMM10_000h_icebp_c64, 255,         RM_REG, T_AVX_128,   8, 9,  10, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6682        {  bs3CpuInstr3_vshufpd_XMM8_XMM9_FSxBX_000h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX_128,   8, 9, 255, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6683        {  bs3CpuInstr3_vshufpd_YMM1_YMM2_YMM3_000h_icebp_c64,  255,         RM_REG, T_AVX2_256,  1, 2,   3, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6684        {  bs3CpuInstr3_vshufpd_YMM1_YMM2_FSxBX_000h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256,  1, 2, 255, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6685        {  bs3CpuInstr3_vshufpd_YMM8_YMM9_YMM10_000h_icebp_c64, 255,         RM_REG, T_AVX2_256,  8, 9,  10, RT_ELEMENTS(s_aValues00),  s_aValues00 },
     6686        {  bs3CpuInstr3_vshufpd_YMM8_YMM9_FSxBX_000h_icebp_c64, X86_XCPT_DB, RM_MEM, T_AVX2_256,  8, 9, 255, RT_ELEMENTS(s_aValues00),  s_aValues00 },
    64436687    };
    64446688    static BS3CPUINSTR3_TEST1_MODE_T const s_aTests[3] = BS3CPUINSTR3_TEST1_MODES_INIT(s_aTests16, s_aTests32, s_aTests64);
    … …  
    75397783
    75407784/*
    7541  * [V]PSHUFHD
     7785 * [V]PSHUFD
    75427786 */
    75437787BS3_FNBS3FAR_PROTOTYPES_CMN(bs3CpuInstr3_pshufd_XMM1_XMM2_0FFh_icebp);
    … …  
    981610060                                                            bs3CpuInstr3_v_pmovzxbw_pmovzxbd_pmovzxbq_pmovzxwd_pmovzxwq_pmovzxdq, 0 },
    981710061#endif
     10062#if define(ALL_TESTS)
     10063        { "[v]shufps",                                      bs3CpuInstr3_v_shufps, 0 },
     10064        { "[v]shufpd",                                      bs3CpuInstr3_v_shufpd, 0 },
     10065#endif
    981810066    };
    981910067    Bs3TestInit("bs3-cpu-instr-3");
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