Changeset 95 in vbox
- Timestamp:
- Jan 17, 2007 1:17:32 PM (18 years ago)
- File:
-
- 1 edited
-
trunk/src/VBox/Devices/PC/BIOS/rombios.c (modified) (34 diffs)
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/PC/BIOS/rombios.c
r89 r95 23 23 // Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA 24 24 25 // ROM BIOS for use with Bochs/Plex x86emulation environment25 // ROM BIOS for use with Bochs/Plex86/QEMU emulation environment 26 26 27 27 … … 125 125 #endif 126 126 127 #define BX_ROMBIOS32 0 127 128 #define DEBUG_ROMBIOS 0 128 129 … … 172 173 #define BASE_MEM_IN_K (640 - EBDA_SIZE) 173 174 175 #define ACPI_DATA_SIZE 0x00010000L 176 174 177 // Define the application NAME 175 #ifdef PLEX86 178 #if defined(BX_QEMU) 179 # define BX_APPNAME "QEMU" 180 #elif defined(PLEX86) 176 181 # define BX_APPNAME "Plex86" 177 182 #else … … 1145 1150 { none, none, none, none, none }, 1146 1151 { 0x565c, 0x567c, none, none, none }, /* \| */ 1152 #ifndef VBOX 1153 { 0x5700, 0x5700, none, none, none }, /* F11 */ 1154 { 0x5800, 0x5800, none, none, none } /* F12 */ 1155 #else 1147 1156 { 0x8500, 0x8700, 0x8900, 0x8b00, none }, /* F11 */ 1148 1157 { 0x8600, 0x8800, 0x8a00, 0x8c00, none } /* F12 */ 1158 #endif 1149 1159 }; 1150 1160 … … 1842 1852 BIOS_BUILD_DATE, bios_cvs_version_string); 1843 1853 printf( 1844 #if defBX_APM1854 #if BX_APM 1845 1855 "apmbios " 1846 1856 #endif 1847 #if defBX_PCIBIOS1857 #if BX_PCIBIOS 1848 1858 "pcibios " 1849 1859 #endif 1850 #if defBX_ELTORITO_BOOT1860 #if BX_ELTORITO_BOOT 1851 1861 "eltorito " 1862 #endif 1863 #if BX_ROMBIOS32 1864 "rombios32 " 1852 1865 #endif 1853 1866 "\n\n"); … … 4297 4310 if(regs.u.r32.edx == 0x534D4150) 4298 4311 { 4312 extended_memory_size = inb_cmos(0x35); 4313 extended_memory_size <<= 8; 4314 extended_memory_size |= inb_cmos(0x34); 4315 extended_memory_size *= 64; 4316 // greater than EFF00000??? 4317 if(extended_memory_size > 0x3bc000) { 4318 extended_memory_size = 0x3bc000; // everything after this is reserved memory until we get to 0x100000000 4319 } 4320 extended_memory_size *= 1024; 4321 extended_memory_size += (16L * 1024 * 1024); 4322 4323 if(extended_memory_size <= (16L * 1024 * 1024)) { 4324 extended_memory_size = inb_cmos(0x31); 4325 extended_memory_size <<= 8; 4326 extended_memory_size |= inb_cmos(0x30); 4327 extended_memory_size *= 1024; 4328 } 4329 4299 4330 switch(regs.u.r16.bx) 4300 4331 { … … 4340 4371 break; 4341 4372 case 3: 4342 extended_memory_size = inb_cmos(0x35);4343 extended_memory_size <<= 8;4344 extended_memory_size |= inb_cmos(0x34);4345 extended_memory_size *= 64;4346 if(extended_memory_size > 0x3bc000) // greater than EFF00000???4347 {4348 extended_memory_size = 0x3bc000; // everything after this is reserved memory until we get to 0x1000000004349 }4350 extended_memory_size *= 1024;4351 extended_memory_size += (16L * 1024 * 1024);4352 4353 if(extended_memory_size <= (16L * 1024 * 1024))4354 {4355 extended_memory_size = inb_cmos(0x31);4356 extended_memory_size <<= 8;4357 extended_memory_size |= inb_cmos(0x30);4358 extended_memory_size *= 1024;4359 }4360 4361 4373 set_e820_range(ES, regs.u.r16.di, 4362 0x00100000L, extended_memory_size - 0x00010000, 1); 4374 0x00100000L, 4375 extended_memory_size - ACPI_DATA_SIZE, 1); 4363 4376 regs.u.r32.ebx = 4; 4364 4377 regs.u.r32.eax = 0x534D4150; … … 4368 4381 break; 4369 4382 case 4: 4370 #ifdef VBOX 4371 /* ACPI area at the end of physical memory */ 4372 extended_memory_size = inb_cmos(0x35); 4373 extended_memory_size <<= 8; 4374 extended_memory_size |= inb_cmos(0x34); 4375 extended_memory_size *= 64; 4376 if (extended_memory_size > 0x3bc000) // greater than EF000000??? 4377 { 4378 extended_memory_size = 0x3bc000; // everything after this is reserved memory until we get to 0x100000000 4379 } 4380 extended_memory_size *= 1024; 4381 extended_memory_size += (16L * 1024 * 1024); 4382 4383 if(extended_memory_size <= (16L * 1024 * 1024)) 4384 { 4385 extended_memory_size = inb_cmos(0x31); 4386 extended_memory_size <<= 8; 4387 extended_memory_size |= inb_cmos(0x30); 4388 extended_memory_size *= 1024; 4389 } 4390 extended_memory_size -= 0x10000L; 4391 set_e820_range(ES, regs.u.r16.di, 4392 extended_memory_size, extended_memory_size + 0x00010000L, 3); 4383 set_e820_range(ES, regs.u.r16.di, 4384 extended_memory_size - ACPI_DATA_SIZE, 4385 extended_memory_size, 3); // ACPI RAM 4393 4386 regs.u.r32.ebx = 5; 4394 4387 regs.u.r32.eax = 0x534D4150; … … 4398 4391 break; 4399 4392 case 5: 4400 #endif /* VBOX */4401 4393 /* 256KB BIOS area at the end of 4 GB */ 4402 4394 set_e820_range(ES, regs.u.r16.di, … … 5005 4997 5006 4998 void 5007 int13_harddisk( DS, ES, DI, SI, BP, ELDX, BX, DX, CX, AX, IP, CS, FLAGS)5008 Bit16u DS, ES, DI, SI, BP, ELDX, BX, DX, CX, AX, IP, CS, FLAGS;4999 int13_harddisk(EHAX, DS, ES, DI, SI, BP, ELDX, BX, DX, CX, AX, IP, CS, FLAGS) 5000 Bit16u EHAX, DS, ES, DI, SI, BP, ELDX, BX, DX, CX, AX, IP, CS, FLAGS; 5009 5001 { 5010 5002 Bit32u lba; … … 6099 6091 6100 6092 void 6101 int13_harddisk( DS, ES, DI, SI, BP, ELDX, BX, DX, CX, AX, IP, CS, FLAGS)6102 Bit16u DS, ES, DI, SI, BP, ELDX, BX, DX, CX, AX, IP, CS, FLAGS;6093 int13_harddisk(EHAX, DS, ES, DI, SI, BP, ELDX, BX, DX, CX, AX, IP, CS, FLAGS) 6094 Bit16u EHAX, DS, ES, DI, SI, BP, ELDX, BX, DX, CX, AX, IP, CS, FLAGS; 6103 6095 { 6104 6096 Bit8u drive, num_sectors, sector, head, status, mod; … … 7914 7906 mov bp, sp 7915 7907 7916 mov ax, #0x00007908 xor ax, ax 7917 7909 mov _int19_function.status + 2[bp], ax 7918 7910 mov dl, _int19_function.bootdrv + 2[bp] 7919 7911 mov ax, _int19_function.bootseg + 2[bp] 7920 7912 mov es, ax ;; segment 7921 mov bx, #0x0000;; offset7913 xor bx, bx ;; offset 7922 7914 mov ah, #0x02 ;; function 2, read diskette sector 7923 7915 mov al, #0x01 ;; read 1 sector … … 8174 8166 BX_INFO("bad PCI vendor ID %04x\n", regs.u.r16.dx); 8175 8167 } else if (regs.u.r8.bl == 0x86) { 8168 if (regs.u.r8.al == 0x02) { 8176 8169 BX_INFO("PCI device %04x:%04x not found at index %d\n", regs.u.r16.dx, regs.u.r16.cx, regs.u.r16.si); 8170 } else { 8171 BX_INFO("no PCI device with class code 0x%02x%04x found at index %d\n", regs.u.r8.cl, regs.u.r16.dx, regs.u.r16.si); 8172 } 8177 8173 } 8178 8174 regs.u.r8.ah = regs.u.r8.bl; … … 8432 8428 8433 8429 int13_disk: 8430 ;; int13_harddisk modifies high word of EAX 8431 shr eax, #16 8432 push ax 8434 8433 call _int13_harddisk 8434 pop ax 8435 shl eax, #16 8435 8436 8436 8437 int13_out: … … 8534 8535 ;---------------------- 8535 8536 floppy_drive_post: 8536 mov ax, #0x00008537 xor ax, ax 8537 8538 mov ds, ax 8538 8539 … … 8616 8617 out dx, al 8617 8618 8618 mov ax, #0x00008619 xor ax, ax 8619 8620 mov ds, ax 8620 8621 mov 0x0474, al /* hard disk status of last operation */ … … 9093 9094 .align 16 9094 9095 bios32_entry_point: 9095 pushf 9096 pushfd 9096 9097 cmp eax, #0x49435024 ;; "$PCI" 9097 9098 jne unknown_service … … 9117 9118 mov al, #0x80 9118 9119 bios32_end: 9119 popf 9120 #ifdef BX_QEMU 9121 and dword ptr[esp+8],0xfffffffc ;; reset CS.RPL for kqemu 9122 #endif 9123 popfd 9120 9124 retf 9121 9125 9122 9126 .align 16 9123 9127 pcibios_protected: 9124 pushf 9128 pushfd 9125 9129 cli 9126 9130 push esi … … 9135 9139 pci_pro_f02: ;; find pci device 9136 9140 cmp al, #0x02 9137 jne pci_pro_f0 89141 jne pci_pro_f03 9138 9142 shl ecx, #16 9139 9143 mov cx, dx 9140 mov bx, #0x00009144 xor bx, bx 9141 9145 mov di, #0x00 9142 9146 pci_pro_devloop: … … 9153 9157 cmp bx, #0x0100 9154 9158 jne pci_pro_devloop 9159 mov ah, #0x86 9160 jmp pci_pro_fail 9161 pci_pro_f03: ;; find class code 9162 cmp al, #0x03 9163 jne pci_pro_f08 9164 xor bx, bx 9165 mov di, #0x08 9166 pci_pro_devloop2: 9167 call pci_pro_select_reg 9168 mov dx, #0x0cfc 9169 in eax, dx 9170 shr eax, #8 9171 cmp eax, ecx 9172 jne pci_pro_nextdev2 9173 cmp si, #0 9174 je pci_pro_ok 9175 dec si 9176 pci_pro_nextdev2: 9177 inc bx 9178 cmp bx, #0x0100 9179 jne pci_pro_devloop2 9155 9180 mov ah, #0x86 9156 9181 jmp pci_pro_fail … … 9228 9253 pop edi 9229 9254 pop esi 9230 popf 9255 #ifdef BX_QEMU 9256 and dword ptr[esp+8],0xfffffffc ;; reset CS.RPL for kqemu 9257 #endif 9258 popfd 9231 9259 stc 9232 9260 retf … … 9235 9263 pop edi 9236 9264 pop esi 9237 popf 9265 #ifdef BX_QEMU 9266 and dword ptr[esp+8],0xfffffffc ;; reset CS.RPL for kqemu 9267 #endif 9268 popfd 9238 9269 clc 9239 9270 retf … … 9292 9323 push edi 9293 9324 cmp al, #0x02 9294 jne pci_real_f0 89325 jne pci_real_f03 9295 9326 shl ecx, #16 9296 9327 mov cx, dx 9297 mov bx, #0x00009328 xor bx, bx 9298 9329 mov di, #0x00 9299 9330 pci_real_devloop: … … 9312 9343 mov dx, cx 9313 9344 shr ecx, #16 9314 mov ah, #0x86 9345 mov ax, #0x8602 9346 jmp pci_real_fail 9347 pci_real_f03: ;; find class code 9348 cmp al, #0x03 9349 jne pci_real_f08 9350 xor bx, bx 9351 mov di, #0x08 9352 pci_real_devloop2: 9353 call pci_real_select_reg 9354 mov dx, #0x0cfc 9355 in eax, dx 9356 shr eax, #8 9357 cmp eax, ecx 9358 jne pci_real_nextdev2 9359 cmp si, #0 9360 je pci_real_ok 9361 dec si 9362 pci_real_nextdev2: 9363 inc bx 9364 cmp bx, #0x0100 9365 jne pci_real_devloop2 9366 mov dx, cx 9367 shr ecx, #16 9368 mov ax, #0x8603 9315 9369 jmp pci_real_fail 9316 9370 pci_real_f08: ;; read configuration byte … … 9605 9659 pci_routing_table_structure_end: 9606 9660 9661 #if !BX_ROMBIOS32 9607 9662 pci_irq_list: 9608 9663 db 11, 10, 9, 5; … … 9825 9880 pop ds 9826 9881 ret 9882 #endif // BX_ROMBIOS32 9827 9883 #endif // BX_PCIBIOS 9884 9885 #if BX_ROMBIOS32 9886 rombios32_init: 9887 ;; save a20 and enable it 9888 in al, 0x92 9889 push ax 9890 or al, #0x02 9891 out 0x92, al 9892 9893 ;; save SS:SP to the BDA 9894 xor ax, ax 9895 mov ds, ax 9896 mov 0x0469, ss 9897 mov 0x0467, sp 9898 9899 SEG CS 9900 lidt [pmode_IDT_info] 9901 SEG CS 9902 lgdt [rombios32_gdt_48] 9903 ;; set PE bit in CR0 9904 mov eax, cr0 9905 or al, #0x01 9906 mov cr0, eax 9907 ;; start protected mode code: ljmpl 0x10:rombios32_init1 9908 db 0x66, 0xea 9909 dw rombios32_05 9910 dw 0x000f ;; high 16 bit address 9911 dw 0x0010 9912 9913 use32 386 9914 rombios32_05: 9915 ;; init data segments 9916 mov eax, #0x18 9917 mov ds, ax 9918 mov es, ax 9919 mov ss, ax 9920 xor eax, eax 9921 mov fs, ax 9922 mov gs, ax 9923 cld 9924 9925 ;; copy rombios32 code to ram (ram offset = 1MB) 9926 mov esi, #0xfffe0000 9927 mov edi, #0x00040000 9928 mov ecx, #0x10000 / 4 9929 rep 9930 movsd 9931 9932 ;; init the stack pointer 9933 mov esp, #0x00080000 9934 9935 ;; call rombios32 code 9936 mov eax, #0x00040000 9937 call eax 9938 9939 ;; return to 16 bit protected mode first 9940 db 0xea 9941 dd rombios32_10 9942 dw 0x20 9943 9944 use16 386 9945 rombios32_10: 9946 ;; restore data segment limits to 0xffff 9947 mov ax, #0x28 9948 mov ds, ax 9949 mov es, ax 9950 mov ss, ax 9951 mov fs, ax 9952 mov gs, ax 9953 9954 ;; reset PE bit in CR0 9955 mov eax, cr0 9956 and al, #0xFE 9957 mov cr0, eax 9958 9959 ;; far jump to flush CPU queue after transition to real mode 9960 JMP_AP(0xf000, rombios32_real_mode) 9961 9962 rombios32_real_mode: 9963 ;; restore IDT to normal real-mode defaults 9964 SEG CS 9965 lidt [rmode_IDT_info] 9966 9967 xor ax, ax 9968 mov ds, ax 9969 mov es, ax 9970 mov fs, ax 9971 mov gs, ax 9972 9973 ;; restore SS:SP from the BDA 9974 mov ss, 0x0469 9975 xor esp, esp 9976 mov sp, 0x0467 9977 ;; restore a20 9978 pop ax 9979 out 0x92, al 9980 ret 9981 9982 rombios32_gdt_48: 9983 dw 0x30 9984 dw rombios32_gdt 9985 dw 0x000f 9986 9987 rombios32_gdt: 9988 dw 0, 0, 0, 0 9989 dw 0, 0, 0, 0 9990 dw 0xffff, 0, 0x9b00, 0x00cf ; 32 bit flat code segment (0x10) 9991 dw 0xffff, 0, 0x9300, 0x00cf ; 32 bit flat data segment (0x18) 9992 dw 0xffff, 0, 0x9b0f, 0x0000 ; 16 bit code segment base=0xf0000 limit=0xffff 9993 dw 0xffff, 0, 0x9300, 0x0000 ; 16 bit data segment base=0x0 limit=0xffff 9994 #endif 9995 9828 9996 9829 9997 ; parallel port detection: base address in DX, index in BX, timeout in CL … … 9957 10125 9958 10126 10127 ;; the following area can be used to write dynamically generated tables 10128 .align 16 10129 bios_table_area_start: 10130 dd 0xaafb4442 10131 dd bios_table_area_end - bios_table_area_start - 8; 10132 9959 10133 ;-------- 9960 10134 ;- POST - 9961 10135 ;-------- 9962 10136 .org 0xe05b ; POST Entry Point 10137 bios_table_area_end: 9963 10138 post: 9964 10139 … … 10029 10204 mov ax, #0xfffe 10030 10205 mov sp, ax 10031 mov ax, #0x000010206 xor ax, ax 10032 10207 mov ds, ax 10033 10208 mov ss, ax … … 10044 10219 10045 10220 ;; set all interrupts to default handler 10046 mov bx, #0x0000;; offset index10221 xor bx, bx ;; offset index 10047 10222 mov cx, #0x0100 ;; counter (256 interrupts) 10048 10223 mov ax, #dummy_iret_handler … … 10224 10399 out 0xa1, AL ;slave pic: unmask IRQ 12, 13, 14 10225 10400 10401 #if BX_ROMBIOS32 10402 call rombios32_init 10403 #else 10226 10404 #if 0 /* This currently breaks restoring a previously saved state. */ 10227 10405 call pcibios_init_iomem_bases 10228 10406 #endif 10229 10407 call pcibios_init_irqs 10230 10408 #endif 10231 10409 call rom_scan 10232 10410 … … 10379 10557 push ds 10380 10558 pusha 10381 mov ax, #0x000010559 xor ax, ax 10382 10560 mov ds, ax 10383 10561 call _int14_function … … 10570 10748 int0e_normal: 10571 10749 push ds 10572 mov ax, #0x0000;; segment 000010750 xor ax, ax ;; segment 0000 10573 10751 mov ds, ax 10574 10752 call eoi_master_pic … … 10607 10785 push ds 10608 10786 pusha 10609 mov ax, #0x000010787 xor ax, ax 10610 10788 mov ds, ax 10611 10789 call _int17_function … … 10841 11019 10842 11020 .org 0xfef3 ; Initial Interrupt Vector Offsets Loaded by POST 11021 10843 11022 10844 11023 .org 0xff00
Note:
See TracChangeset
for help on using the changeset viewer.

