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Changeset 94301 in vbox


Ignore:
Timestamp:
Mar 17, 2022 8:52:09 PM (3 years ago)
Author:
vboxsync
Message:

iprt/types.h: More RTFLOATxxU related macros and constants. bugref:9898

File:
1 edited

Legend:

Unmodified
Added
Removed
  • trunk/include/iprt/types.h

    r94263 r94301  
    952952#endif
    953953#define RTFLOAT32U_INIT_C(a_fSign, a_uFraction, a_uExponent)    RTFLOAT32U_INIT((a_fSign), UINT32_C(a_uFraction), (a_uExponent))
     954/** The exponent bias for the RTFLOAT32U format. */
     955#define RTFLOAT32U_EXP_BIAS                     (127)
     956/** The max exponent value for the RTFLOAT32U format. */
     957#define RTFLOAT32U_EXP_MAX                      (255)
     958/** Fraction width (in bits) for the RTFLOAT32U format. */
     959#define RTFLOAT32U_FRACTION_BITS                (23)
    954960/** Check if two 32-bit floating values are identical (memcmp, not
    955961 *  numerically). */
    956962#define RTFLOAT32U_ARE_IDENTICAL(a_pLeft, a_pRight)             ((a_pLeft)->u == (a_pRight)->u)
     963/** @name RTFLOAT32U classification macros
     964 * @{ */
     965#define RTFLOAT32U_IS_ZERO(a_pr32)              (((a_pr32)->u & (RT_BIT_32(31) - 1)) == 0)
     966#define RTFLOAT32U_IS_SUBNORMAL(a_pr32)         ((a_pr32)->s.uExponent == 0    && (a_pr32)->s.uFraction != 0)
     967#define RTFLOAT32U_IS_INF(a_pr32)               ((a_pr32)->s.uExponent == 0xff && (a_pr32)->s.uFraction == 0)
     968#define RTFLOAT32U_IS_SIGNALLING_NAN(a_pr32)    ((a_pr32)->s.uExponent == 0xff && !((a_pr32)->s.uFraction & RT_BIT_32(22)) \
     969                                                 && (a_pr32)->s.uFraction != 0)
     970#define RTFLOAT32U_IS_QUIET_NAN(a_pr32)         ((a_pr32)->s.uExponent == 0xff && ((a_pr32)->s.uFraction & RT_BIT_32(22)))
     971#define RTFLOAT32U_IS_NAN(a_pr32)               ((a_pr32)->s.uExponent == 0xff && (a_pr32)->s.uFraction != 0)
     972#define RTFLOAT32U_IS_NORMAL(a_pr32)            ((a_pr32)->s.uExponent > 0 && (a_pr32)->s.uExponent < 0xff)
     973/** @} */
    957974
    958975
     
    10361053#endif
    10371054#define RTFLOAT64U_INIT_C(a_fSign, a_uFraction, a_uExponent)    RTFLOAT64U_INIT((a_fSign), UINT64_C(a_uFraction), (a_uExponent))
     1055/** The exponent bias for the RTFLOAT64U format. */
     1056#define RTFLOAT64U_EXP_BIAS                     (1023)
     1057/** The max exponent value for the RTFLOAT64U format. */
     1058#define RTFLOAT64U_EXP_MAX                      (2047)
     1059/** Fraction width (in bits) for the RTFLOAT64U format. */
     1060#define RTFLOAT64U_FRACTION_BITS                (52)
    10381061/** Check if two 64-bit floating values are identical (memcmp, not
    10391062 *  numerically). */
    10401063#define RTFLOAT64U_ARE_IDENTICAL(a_pLeft, a_pRight)             ((a_pLeft)->u == (a_pRight)->u)
     1064/** @name RTFLOAT64U classification macros
     1065 * @{ */
     1066#define RTFLOAT64U_IS_ZERO(a_pr64)              (((a_pr64)->u & (RT_BIT_64(63) - 1)) == 0)
     1067#define RTFLOAT64U_IS_SUBNORMAL(a_pr64)         (   (a_pr64)->s.uExponent == 0 \
     1068                                                 && ((a_pr64)->s.uFractionLow != 0 || (a_pr64)->s.uFractionHigh != 0) )
     1069#define RTFLOAT64U_IS_INF(a_pr64)               (   (a_pr64)->s.uExponent == 0x7ff \
     1070                                                 && (a_pr64)->s.uFractionLow == 0 && (a_pr64)->s.uFractionHigh == 0)
     1071#define RTFLOAT64U_IS_SIGNALLING_NAN(a_pr64)    (   (a_pr64)->s.uExponent == 0x7ff \
     1072                                                 && !((a_pr64)->s.uFractionHigh & RT_BIT_32(19)) \
     1073                                                 && ((a_pr64)->s.uFractionHigh != 0 || (a_pr64)->s.uFractionLow != 0) )
     1074#define RTFLOAT64U_IS_QUIET_NAN(a_pr64)         ((a_pr64)->s.uExponent == 0x7ff && ((a_pr64)->s.uFractionHigh & RT_BIT_32(19)))
     1075#define RTFLOAT64U_IS_NAN(a_pr64)               (   (a_pr64)->s.uExponent == 0x7ff \
     1076                                                 && ((a_pr64)->s.uFractionHigh != 0 || (a_pr64)->s.uFractionLow != 0) )
     1077#define RTFLOAT64U_IS_NORMAL(a_pr64)            ((a_pr64)->s.uExponent > 0 && (a_pr64)->s.uExponent < 0x7ff)
     1078/** @} */
     1079
    10411080
    10421081
     
    11161155# endif
    11171156# define RTFLOAT80U_INIT_C(a_fSign, a_uMantissa, a_uExponent) RTFLOAT80U_INIT((a_fSign), UINT64_C(a_uMantissa), (a_uExponent))
     1157/** The exponent bias for the RTFLOAT80U format. */
     1158# define RTFLOAT80U_EXP_BIAS                    (16383)
     1159/** The max exponent value for the RTFLOAT80U format. */
     1160# define RTFLOAT80U_EXP_MAX                     (32767)
     1161/** Fraction width (in bits) for the RTFLOAT80U format. */
     1162# define RTFLOAT80U_FRACTION_BITS               (63)
    11181163/** Check if two 80-bit floating values are identical (memcmp, not
    11191164 *  numberically). */
     
    11211166    (   (a_pLeft)->au64[0] == (a_pRight)->au64[0] \
    11221167     && (a_pLeft)->au16[4] == (a_pRight)->au16[4] )
     1168/** @name RTFLOAT80U classification macros
     1169 * @{ */
     1170# define RTFLOAT80U_IS_ZERO(a_pr80) \
     1171    ((a_pr80)->s.uExponent == 0 && (a_pr80)->s.uMantissa == 0)
     1172# define RTFLOAT80U_IS_DENORMAL(a_pr80) \
     1173    ((a_pr80)->s.uExponent == 0 && (a_pr80)->s.uMantissa <  RT_BIT_64(63) && (a_pr80)->s.uMantissa != 0)
     1174# define RTFLOAT80U_IS_PSEUDO_DENORMAL(a_pr80) \
     1175    ((a_pr80)->s.uExponent == 0 && (a_pr80)->s.uMantissa >= RT_BIT_64(63))
     1176# define RTFLOAT80U_IS_PSEUDO_INF(a_pr80) \
     1177    ((a_pr80)->s.uExponent == 0x7fff && (a_pr80)->s.uMantissa == 0)
     1178# define RTFLOAT80U_IS_PSEUDO_NAN(a_pr80) \
     1179    ((a_pr80)->s.uExponent == 0x7fff && !((a_pr80)->s.uMantissa & RT_BIT_64(63)))
     1180# define RTFLOAT80U_IS_INF(a_pr80) \
     1181    ((a_pr80)->s.uExponent == 0x7fff && (a_pr80)->s.uMantissa == RT_BIT_64(63))
     1182# define RTFLOAT80U_IS_SIGNALLING_NAN(a_pr80) \
     1183    (   (a_pr80)->s.uExponent == 0x7fff \
     1184     && ((a_pr80)->s.uMantissa & (RT_BIT_64(63) | RT_BIT_64(62))) == RT_BIT_64(63) \
     1185     && ((a_pr80)->s.uMantissa & (RT_BIT_64(62) - 1)) != 0)
     1186# define RTFLOAT80U_IS_QUIET_NAN(a_pr80) \
     1187    (   (a_pr80)->s.uExponent == 0x7fff \
     1188     && ((a_pr80)->s.uMantissa & (RT_BIT_64(63) | RT_BIT_64(62))) == (RT_BIT_64(63) | RT_BIT_64(62)) \
     1189     && ((a_pr80)->s.uMantissa & (RT_BIT_64(62) - 1)) != 0)
     1190# define RTFLOAT80U_IS_NAN(a_pr80) \
     1191    ((a_pr80)->s.uExponent == 0x7fff && ((a_pr80)->s.uMantissa & (RT_BIT_64(63) - 1)) != 0)
     1192# define RTFLOAT80U_IS_INDEFINITE(a_pr80) \
     1193    ((a_pr80)->s.uExponent == 0x7fff && (a_pr80)->s.uMantissa == (RT_BIT_64(63) | RT_BIT_64(62)))
     1194# define RTFLOAT80U_IS_UNNORMAL(a_pr80) \
     1195    (!((a_pr80)->s.uMantissa & RT_BIT_64(63)) && (a_pr80)->s.uExponent > 0 && (a_pr80)->s.uExponent < 0x7fff)
     1196# define RTFLOAT80U_IS_NORMAL(a_pr80) \
     1197    (((a_pr80)->s.uMantissa & RT_BIT_64(63))  && (a_pr80)->s.uExponent > 0 && (a_pr80)->s.uExponent < 0x7fff)
     1198/** @} */
    11231199
    11241200
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