VirtualBox

Changeset 93931 in vbox for trunk


Ignore:
Timestamp:
Feb 24, 2022 4:02:00 PM (3 years ago)
Author:
vboxsync
Message:

VMM,VMMDev,scm,VBox/param.h: Don't use PAGE_BASE_GC_MASK and friends in the VMM. bugref:9898

Location:
trunk
Files:
12 edited

Legend:

Unmodified
Added
Removed
  • trunk/include/iprt/param.h

    r93115 r93931  
    7575 * i386 Page offset mask.
    7676 *
    77  * Do NOT one-complement this for whatever purpose. You may get a 32-bit const when you want a 64-bit one.
    78  * Use PAGE_BASE_MASK, PAGE_BASE_GC_MASK, PAGE_BASE_HC_MASK, PAGE_ADDRESS() or X86_PTE_PAE_PG_MASK.
     77 * @note If you do one-complement this, always insert a target type case after
     78 *       the operator!  Otherwise you may end up with weird results.
    7979 */
    8080#if defined(RT_ARCH_SPARC64)
     
    8787
    8888/**
    89  * Page address mask for the guest context POINTERS.
    90  * @remark  Physical addresses are always masked using X86_PTE_PAE_PG_MASK!
    91  */
    92 #define PAGE_BASE_GC_MASK   (~(RTGCUINTPTR)PAGE_OFFSET_MASK)
    93 
    94 /**
    95  * Page address mask for the host context POINTERS.
    96  * @remark  Physical addresses are always masked using X86_PTE_PAE_PG_MASK!
    97  */
    98 #define PAGE_BASE_HC_MASK   (~(RTHCUINTPTR)PAGE_OFFSET_MASK)
    99 
    100 /**
    101  * Page address mask for the both context POINTERS.
     89 * Page address mask for the uintptr_t sized pointers.
    10290 *
    10391 * Be careful when using this since it may be a size too big!
    10492 * @remark  Physical addresses are always masked using X86_PTE_PAE_PG_MASK!
    10593 */
    106 #define PAGE_BASE_MASK      (~(RTUINTPTR)PAGE_OFFSET_MASK)
     94#define PAGE_BASE_MASK      (~(uintptr_t)PAGE_OFFSET_MASK)
    10795
    10896/**
  • trunk/src/VBox/Devices/VMMDev/VMMDevHGCM.cpp

    r93115 r93931  
    11091109
    11101110                    /* Gonvert the guest linear pointers of pages to physical addresses. */
    1111                     GCPtr &= PAGE_BASE_GC_MASK;
     1111                    GCPtr &= ~(RTGCPTR)GUEST_PAGE_OFFSET_MASK;
    11121112                    for (uint32_t iPage = 0; iPage < cPages; ++iPage)
    11131113                    {
  • trunk/src/VBox/VMM/VMMAll/PGMAll.cpp

    r93922 r93931  
    11371137    Assert(!(fOpFlags & ~(PGM_MK_PG_IS_MMIO2 | PGM_MK_PG_IS_WRITE_FAULT)));
    11381138
    1139     GCPtr &= PAGE_BASE_GC_MASK; /** @todo this ain't necessary, right... */
     1139    GCPtr &= ~(RTGCPTR)GUEST_PAGE_OFFSET_MASK; /** @todo this ain't necessary, right... */
    11401140
    11411141    PVMCC pVM = pVCpu->CTX_SUFF(pVM);
     
    20702070    cb     += GCPtr & GUEST_PAGE_OFFSET_MASK;
    20712071    cb      = RT_ALIGN_Z(cb, GUEST_PAGE_SIZE);
    2072     GCPtr   = (GCPtr & PAGE_BASE_GC_MASK);
     2072    GCPtr  &= ~(RTGCPTR)GUEST_PAGE_OFFSET_MASK;
    20732073
    20742074    /*
  • trunk/src/VBox/VMM/VMMAll/PGMAllGst.h

    r93922 r93931  
    390390    pWalk->fSucceeded = true;
    391391    pWalk->GCPtr      = GCPtr;
    392     pWalk->GCPhys     = GCPtr & PAGE_BASE_GC_MASK;
     392    pWalk->GCPhys     = GCPtr & ~(RTGCPHYS)GUEST_PAGE_OFFSET_MASK;
    393393    pWalk->fEffective = X86_PTE_P | X86_PTE_RW | X86_PTE_US;
    394394    NOREF(pVCpu);
  • trunk/src/VBox/VMM/VMMAll/PGMAllPool.cpp

    r93725 r93931  
    11901190
    11911191            /* Temporarily allow write access to the page table again. */
    1192             rc = PGMHandlerPhysicalPageTempOff(pVM, pPage->GCPhys & PAGE_BASE_GC_MASK, pPage->GCPhys & PAGE_BASE_GC_MASK);
     1192            rc = PGMHandlerPhysicalPageTempOff(pVM,
     1193                                               pPage->GCPhys & ~(RTGCPHYS)GUEST_PAGE_OFFSET_MASK,
     1194                                               pPage->GCPhys & ~(RTGCPHYS)GUEST_PAGE_OFFSET_MASK);
    11931195            if (rc == VINF_SUCCESS)
    11941196            {
     
    16411643
    16421644    /* First write protect the page again to catch all write accesses. (before checking for changes -> SMP) */
    1643     int rc = PGMHandlerPhysicalReset(pVM, pPage->GCPhys & PAGE_BASE_GC_MASK);
     1645    int rc = PGMHandlerPhysicalReset(pVM, pPage->GCPhys & ~(RTGCPHYS)GUEST_PAGE_OFFSET_MASK);
    16441646    Assert(rc == VINF_SUCCESS);
    16451647    pPage->fDirty = false;
  • trunk/src/VBox/VMM/VMMAll/VMXAllTemplate.cpp.h

    r93930 r93931  
    85208520
    85218521            RTGCPHYS GCPhys = VCPU_2_VMXSTATE(pVCpu).vmx.u64GstMsrApicBase;    /* Always up-to-date, as it is not part of the VMCS. */
    8522             GCPhys &= PAGE_BASE_GC_MASK;
     8522            GCPhys &= ~(RTGCPHYS)GUEST_PAGE_OFFSET_MASK;
    85238523            GCPhys += VMX_EXIT_QUAL_APIC_ACCESS_OFFSET(pVmxTransient->uExitQual);
    85248524            Log4Func(("Linear access uAccessType=%#x GCPhys=%#RGp Off=%#x\n", uAccessType, GCPhys,
  • trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp

    r93574 r93931  
    79267926    {
    79277927        RTGCPHYS GCPhysApicBase = APICGetBaseMsrNoCheck(pVCpu);
    7928         GCPhysApicBase &= PAGE_BASE_GC_MASK;
     7928        GCPhysApicBase &= ~(RTGCPHYS)GUEST_PAGE_OFFSET_MASK;
    79297929
    79307930        if (GCPhysFaultAddr == GCPhysApicBase + XAPIC_OFF_TPR)
     
    82818281        RTGCPHYS GCPhysApicBase;
    82828282        GCPhysApicBase  = APICGetBaseMsrNoCheck(pVCpu);
    8283         GCPhysApicBase &= PAGE_BASE_GC_MASK;
     8283        GCPhysApicBase &= ~(RTGCPHYS)GUEST_PAGE_OFFSET_MASK;
    82848284
    82858285        /* Check if the page at the fault-address is the APIC base. */
  • trunk/src/VBox/VMM/VMMR3/CPUM.cpp

    r93905 r93931  
    41864186        {
    41874187            /* translate the address */
    4188             pState->pvPageGC = GCPtr & PAGE_BASE_GC_MASK;
     4188            pState->pvPageGC = GCPtr & ~(RTGCPTR)GUEST_PAGE_OFFSET_MASK;
    41894189
    41904190            /* Release mapping lock previously acquired. */
  • trunk/src/VBox/VMM/VMMR3/DBGFDisas.cpp

    r93554 r93931  
    221221
    222222            /* translate the address */
    223             pState->GCPtrPage = GCPtr & PAGE_BASE_GC_MASK;
     223            pState->GCPtrPage = GCPtr & ~(RTGCPTR)GUEST_PAGE_OFFSET_MASK;
    224224            if (pState->fLocked)
    225225                PGMPhysReleasePageMappingLock(pState->pVM, &pState->PageMapLock);
  • trunk/src/VBox/VMM/VMMR3/PGMPool.cpp

    r93716 r93931  
    703703
    704704        /* First write protect the page again to catch all write accesses. (before checking for changes -> SMP) */
    705         int rc = PGMHandlerPhysicalReset(pVM, pPage->GCPhys & PAGE_BASE_GC_MASK);
     705        int rc = PGMHandlerPhysicalReset(pVM, pPage->GCPhys & ~(RTGCPHYS)GUEST_PAGE_OFFSET_MASK);
    706706        AssertRCSuccess(rc);
    707707        pPage->fDirty = false;
  • trunk/src/bldprogs/scm.cpp

    r93687 r93931  
    29192919            case SCMOPT_ONLY_GUEST_HOST_PAGE:
    29202920                RTPrintf("      No PAGE_SIZE, PAGE_SHIFT or PAGE_OFFSET_MASK allowed, must have\n"
    2921                          "      GUEST_ or HOST_ prefix.  Default: %RTbool\n", g_Defaults.fOnlyGuestHostPage);
     2921                         "      GUEST_ or HOST_ prefix.  Also forbids use of PAGE_BASE_MASK,\n"
     2922                         "      PAGE_BASE_HC_MASK and PAGE_BASE_GC_MASK  Default: %RTbool\n", g_Defaults.fOnlyGuestHostPage);
    29222923                break;
    29232924            case SCMOPT_NO_ASM_MEM_PAGE_USE:
  • trunk/src/bldprogs/scmrw.cpp

    r93686 r93931  
    32543254/**
    32553255 * Checks for PAGE_SIZE, PAGE_SHIFT and PAGE_OFFSET_MASK w/o a GUEST_ or HOST_
    3256  * prefix.
     3256 * prefix as well as banning PAGE_BASE_HC_MASK, PAGE_BASE_GC_MASK and
     3257 * PAGE_BASE_MASK.
    32573258 *
    32583259 * @returns true if modifications were made, false if not.
     
    32723273        { RT_STR_TUPLE("PAGE_SHIFT") },
    32733274        { RT_STR_TUPLE("PAGE_OFFSET_MASK") },
     3275        { RT_STR_TUPLE("PAGE_BASE_MASK") },
     3276        { RT_STR_TUPLE("PAGE_BASE_GC_MASK") },
     3277        { RT_STR_TUPLE("PAGE_BASE_HC_MASK") },
    32743278        { RT_STR_TUPLE("ASMMemIsZeroPage") },
    32753279        { RT_STR_TUPLE("ASMMemZeroPage") },
    32763280    };
    3277     size_t const iFirstWord = pSettings->fOnlyGuestHostPage ? 0 : 3;
    3278     size_t const iEndWords  = pSettings->fNoASMMemPageUse   ? 5 : 3;
     3281    size_t const iFirstWord = pSettings->fOnlyGuestHostPage ? 0 : 5;
     3282    size_t const iEndWords  = pSettings->fNoASMMemPageUse   ? 7 : 5;
    32793283
    32803284    uint32_t    iLine = 0;
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