Changeset 9276 in vbox

Timestamp:

May 31, 2008 9:03:02 PM (16 years ago)

Author:

vboxsync

Message:

Prevent an fInRem assertion in the tlb flushing code when A20 is change in VT-x/AMD-V mode. Added a todo in PGMR3PhysSetA20() because we're not doing the right thing for AMD-V (and VT-x).

Location:

trunk/src

Files:

• VBox/VMM/PGMPhys.cpp (modified) (1 diff)
• recompiler/VBoxRecompiler.c (modified) (1 diff)

trunk/src/VBox/VMM/PGMPhys.cpp

@@ -2102 +2102 @@
         pVM->pgm.s.GCPhysA20Mask = ~(RTGCPHYS)(!fEnable << 20);
         REMR3A20Set(pVM, fEnable);
+        /** @todo we're not handling this correctly for VT-x / AMD-V. See #2911 */
     }
 }

trunk/src/recompiler/VBoxRecompiler.c

@@ -2358 +2358 @@
     LogFlow(("REMR3A20Set: fEnable=%d\n", fEnable));
     VM_ASSERT_EMT(pVM);
+
+    bool fSaved = pVM->rem.s.fIgnoreAll; /* just in case. */
+    pVM->rem.s.fIgnoreAll = fSaved || !pVM->rem.s.fInREM;
+
     cpu_x86_set_a20(&pVM->rem.s.Env, fEnable);
+
+    pVM->rem.s.fIgnoreAll = fSaved;
 }