Index: /trunk/include/VBox/vmm/cpumctx.h =================================================================== --- /trunk/include/VBox/vmm/cpumctx.h (revision 92494) +++ /trunk/include/VBox/vmm/cpumctx.h (revision 92495) @@ -991,4 +991,9 @@ #define CPUMCTX_EXTRN_HWVIRT UINT64_C(0x0000020000000000) +/** Inhibit maskable interrupts (VMCPU_FF_INHIBIT_INTERRUPTS) */ +#define CPUMCTX_EXTRN_INHIBIT_INT UINT64_C(0x0000040000000000) +/** Inhibit non-maskable interrupts (VMCPU_FF_BLOCK_NMIS). */ +#define CPUMCTX_EXTRN_INHIBIT_NMI UINT64_C(0x0000080000000000) + /** Mask of bits the keepers can use for state tracking. */ #define CPUMCTX_EXTRN_KEEPER_STATE_MASK UINT64_C(0xffff000000000000) @@ -996,26 +1001,14 @@ /** NEM/Win: Event injection (known was interruption) pending state. */ #define CPUMCTX_EXTRN_NEM_WIN_EVENT_INJECT UINT64_C(0x0001000000000000) -/** NEM/Win: Inhibit maskable interrupts (VMCPU_FF_INHIBIT_INTERRUPTS). */ -#define CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT UINT64_C(0x0002000000000000) -/** NEM/Win: Inhibit non-maskable interrupts (VMCPU_FF_BLOCK_NMIS). */ -#define CPUMCTX_EXTRN_NEM_WIN_INHIBIT_NMI UINT64_C(0x0004000000000000) /** NEM/Win: Mask. */ -#define CPUMCTX_EXTRN_NEM_WIN_MASK UINT64_C(0x0007000000000000) - -/** HM/SVM: Inhibit maskable interrupts (VMCPU_FF_INHIBIT_INTERRUPTS). */ -#define CPUMCTX_EXTRN_HM_SVM_INT_SHADOW UINT64_C(0x0001000000000000) +#define CPUMCTX_EXTRN_NEM_WIN_MASK UINT64_C(0x0001000000000000) + /** HM/SVM: Nested-guest interrupt pending (VMCPU_FF_INTERRUPT_NESTED_GUEST). */ -#define CPUMCTX_EXTRN_HM_SVM_HWVIRT_VIRQ UINT64_C(0x0002000000000000) +#define CPUMCTX_EXTRN_HM_SVM_HWVIRT_VIRQ UINT64_C(0x0001000000000000) /** HM/SVM: Mask. */ -#define CPUMCTX_EXTRN_HM_SVM_MASK UINT64_C(0x0003000000000000) - -/** HM/VMX: Guest-interruptibility state (VMCPU_FF_INHIBIT_INTERRUPTS, - * VMCPU_FF_BLOCK_NMIS). */ -#define CPUMCTX_EXTRN_HM_VMX_INT_STATE UINT64_C(0x0001000000000000) -/** HM/VMX: Mask. */ -#define CPUMCTX_EXTRN_HM_VMX_MASK UINT64_C(0x0001000000000000) +#define CPUMCTX_EXTRN_HM_SVM_MASK UINT64_C(0x0001000000000000) /** All CPUM state bits, not including keeper specific ones. */ -#define CPUMCTX_EXTRN_ALL UINT64_C(0x000003fffffffffc) +#define CPUMCTX_EXTRN_ALL UINT64_C(0x00000ffffffffffc) /** All CPUM state bits, including keeper specific ones. */ #define CPUMCTX_EXTRN_ABSOLUTELY_ALL UINT64_C(0xfffffffffffffffc) Index: /trunk/src/VBox/VMM/VMMAll/IEMAll.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMAll/IEMAll.cpp (revision 92494) +++ /trunk/src/VBox/VMM/VMMAll/IEMAll.cpp (revision 92495) @@ -16026,5 +16026,5 @@ { IEMEXEC_ASSERT_INSTR_LEN_RETURN(pExitInfo->cbInstr, 3); - IEM_CTX_ASSERT(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK | CPUMCTX_EXTRN_HM_VMX_MASK); + IEM_CTX_ASSERT(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK | CPUMCTX_EXTRN_INHIBIT_INT | CPUMCTX_EXTRN_INHIBIT_NMI); Assert(pExitInfo); @@ -16072,5 +16072,5 @@ { IEMEXEC_ASSERT_INSTR_LEN_RETURN(pExitInfo->cbInstr, 3); - IEM_CTX_ASSERT(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK | CPUMCTX_EXTRN_HM_VMX_MASK); + IEM_CTX_ASSERT(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK | CPUMCTX_EXTRN_INHIBIT_INT | CPUMCTX_EXTRN_INHIBIT_NMI); Assert(pExitInfo); @@ -16111,5 +16111,5 @@ Assert(pExitInfo); IEMEXEC_ASSERT_INSTR_LEN_RETURN(pExitInfo->cbInstr, 3); - IEM_CTX_ASSERT(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK | CPUMCTX_EXTRN_HM_VMX_MASK); + IEM_CTX_ASSERT(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK | CPUMCTX_EXTRN_INHIBIT_INT | CPUMCTX_EXTRN_INHIBIT_NMI); iemInitExec(pVCpu, false /*fBypassHandlers*/); @@ -16136,5 +16136,5 @@ Assert(pExitInfo); IEMEXEC_ASSERT_INSTR_LEN_RETURN(pExitInfo->cbInstr, 3); - IEM_CTX_ASSERT(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK | CPUMCTX_EXTRN_HM_VMX_MASK); + IEM_CTX_ASSERT(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK | CPUMCTX_EXTRN_INHIBIT_INT | CPUMCTX_EXTRN_INHIBIT_NMI); iemInitExec(pVCpu, false /*fBypassHandlers*/); @@ -16161,5 +16161,5 @@ Assert(pExitInfo); IEMEXEC_ASSERT_INSTR_LEN_RETURN(pExitInfo->cbInstr, 3); - IEM_CTX_ASSERT(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK | CPUMCTX_EXTRN_HM_VMX_MASK); + IEM_CTX_ASSERT(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK | CPUMCTX_EXTRN_INHIBIT_INT | CPUMCTX_EXTRN_INHIBIT_NMI); iemInitExec(pVCpu, false /*fBypassHandlers*/); @@ -16208,5 +16208,5 @@ Assert(pExitInfo); IEMEXEC_ASSERT_INSTR_LEN_RETURN(pExitInfo->cbInstr, 3); - IEM_CTX_ASSERT(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK | CPUMCTX_EXTRN_HM_VMX_MASK); + IEM_CTX_ASSERT(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK | CPUMCTX_EXTRN_INHIBIT_INT | CPUMCTX_EXTRN_INHIBIT_NMI); iemInitExec(pVCpu, false /*fBypassHandlers*/); @@ -16232,5 +16232,5 @@ { IEMEXEC_ASSERT_INSTR_LEN_RETURN(cbInstr, 3); - IEM_CTX_ASSERT(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_NO_MEM_MASK | CPUMCTX_EXTRN_HM_VMX_MASK); + IEM_CTX_ASSERT(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_NO_MEM_MASK | CPUMCTX_EXTRN_INHIBIT_INT | CPUMCTX_EXTRN_INHIBIT_NMI); iemInitExec(pVCpu, false /*fBypassHandlers*/); @@ -16252,5 +16252,5 @@ { IEMEXEC_ASSERT_INSTR_LEN_RETURN(pExitInfo->cbInstr, 4); - IEM_CTX_ASSERT(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK | CPUMCTX_EXTRN_HM_VMX_MASK); + IEM_CTX_ASSERT(pVCpu, IEM_CPUMCTX_EXTRN_EXEC_DECODED_MEM_MASK | CPUMCTX_EXTRN_INHIBIT_INT | CPUMCTX_EXTRN_INHIBIT_NMI); Assert(pExitInfo); Index: /trunk/src/VBox/VMM/VMMAll/NEMAllNativeTemplate-win.cpp.h =================================================================== --- /trunk/src/VBox/VMM/VMMAll/NEMAllNativeTemplate-win.cpp.h (revision 92494) +++ /trunk/src/VBox/VMM/VMMAll/NEMAllNativeTemplate-win.cpp.h (revision 92495) @@ -413,6 +413,6 @@ /* Interruptibility state. This can get a little complicated since we get half of the state via HV_X64_VP_EXECUTION_STATE. */ - if ( (fWhat & (CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT | CPUMCTX_EXTRN_NEM_WIN_INHIBIT_NMI)) - == (CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT | CPUMCTX_EXTRN_NEM_WIN_INHIBIT_NMI) ) + if ( (fWhat & (CPUMCTX_EXTRN_INHIBIT_INT | CPUMCTX_EXTRN_INHIBIT_NMI)) + == (CPUMCTX_EXTRN_INHIBIT_INT | CPUMCTX_EXTRN_INHIBIT_NMI) ) { ADD_REG64(WHvRegisterInterruptState, 0); @@ -423,5 +423,5 @@ aValues[iReg - 1].InterruptState.NmiMasked = 1; } - else if (fWhat & CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT) + else if (fWhat & CPUMCTX_EXTRN_INHIBIT_INT) { if ( pVCpu->nem.s.fLastInterruptShadow @@ -439,5 +439,5 @@ } else - Assert(!(fWhat & CPUMCTX_EXTRN_NEM_WIN_INHIBIT_NMI)); + Assert(!(fWhat & CPUMCTX_EXTRN_INHIBIT_NMI)); /* Interrupt windows. Always set if active as Hyper-V seems to be forgetful. */ @@ -700,5 +700,5 @@ /* Interruptibility. */ - if (fWhat & (CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT | CPUMCTX_EXTRN_NEM_WIN_INHIBIT_NMI)) + if (fWhat & (CPUMCTX_EXTRN_INHIBIT_INT | CPUMCTX_EXTRN_INHIBIT_NMI)) { aenmNames[iReg++] = WHvRegisterInterruptState; @@ -1055,10 +1055,10 @@ /* Interruptibility. */ - if (fWhat & (CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT | CPUMCTX_EXTRN_NEM_WIN_INHIBIT_NMI)) + if (fWhat & (CPUMCTX_EXTRN_INHIBIT_INT | CPUMCTX_EXTRN_INHIBIT_NMI)) { Assert(aenmNames[iReg] == WHvRegisterInterruptState); Assert(aenmNames[iReg + 1] == WHvX64RegisterRip); - if (!(pVCpu->cpum.GstCtx.fExtrn & CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT)) + if (!(pVCpu->cpum.GstCtx.fExtrn & CPUMCTX_EXTRN_INHIBIT_INT)) { pVCpu->nem.s.fLastInterruptShadow = aValues[iReg].InterruptState.InterruptShadow; @@ -1069,5 +1069,5 @@ } - if (!(pVCpu->cpum.GstCtx.fExtrn & CPUMCTX_EXTRN_NEM_WIN_INHIBIT_NMI)) + if (!(pVCpu->cpum.GstCtx.fExtrn & CPUMCTX_EXTRN_INHIBIT_NMI)) { if (aValues[iReg].InterruptState.NmiMasked) @@ -1077,5 +1077,5 @@ } - fWhat |= CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT | CPUMCTX_EXTRN_NEM_WIN_INHIBIT_NMI; + fWhat |= CPUMCTX_EXTRN_INHIBIT_INT | CPUMCTX_EXTRN_INHIBIT_NMI; iReg += 2; } @@ -1917,6 +1917,6 @@ DECLINLINE(void) nemHCWinCopyStateFromX64Header(PVMCPUCC pVCpu, HV_X64_INTERCEPT_MESSAGE_HEADER const *pHdr) { - Assert( (pVCpu->cpum.GstCtx.fExtrn & (CPUMCTX_EXTRN_RIP | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT)) - == (CPUMCTX_EXTRN_RIP | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT)); + Assert( (pVCpu->cpum.GstCtx.fExtrn & (CPUMCTX_EXTRN_RIP | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_INHIBIT_INT)) + == (CPUMCTX_EXTRN_RIP | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_INHIBIT_INT)); NEM_WIN_COPY_BACK_SEG(pVCpu->cpum.GstCtx.cs, pHdr->CsSegment); pVCpu->cpum.GstCtx.rip = pHdr->Rip; @@ -1936,5 +1936,5 @@ APICSetTpr(pVCpu, pHdr->Cr8 << 4); - pVCpu->cpum.GstCtx.fExtrn &= ~(CPUMCTX_EXTRN_RIP | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT | CPUMCTX_EXTRN_APIC_TPR); + pVCpu->cpum.GstCtx.fExtrn &= ~(CPUMCTX_EXTRN_RIP | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_INHIBIT_INT | CPUMCTX_EXTRN_APIC_TPR); } #elif defined(IN_RING3) @@ -1950,6 +1950,6 @@ DECLINLINE(void) nemR3WinCopyStateFromX64Header(PVMCPUCC pVCpu, WHV_VP_EXIT_CONTEXT const *pExitCtx) { - Assert( (pVCpu->cpum.GstCtx.fExtrn & (CPUMCTX_EXTRN_RIP | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT)) - == (CPUMCTX_EXTRN_RIP | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT)); + Assert( (pVCpu->cpum.GstCtx.fExtrn & (CPUMCTX_EXTRN_RIP | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_INHIBIT_INT)) + == (CPUMCTX_EXTRN_RIP | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_INHIBIT_INT)); NEM_WIN_COPY_BACK_SEG(pVCpu->cpum.GstCtx.cs, pExitCtx->Cs); pVCpu->cpum.GstCtx.rip = pExitCtx->Rip; @@ -1969,5 +1969,5 @@ APICSetTpr(pVCpu, pExitCtx->Cr8 << 4); - pVCpu->cpum.GstCtx.fExtrn &= ~(CPUMCTX_EXTRN_RIP | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT | CPUMCTX_EXTRN_APIC_TPR); + pVCpu->cpum.GstCtx.fExtrn &= ~(CPUMCTX_EXTRN_RIP | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_INHIBIT_INT | CPUMCTX_EXTRN_APIC_TPR); } #endif /* IN_RING3 && !NEM_WIN_TEMPLATE_MODE_OWN_RUN_API */ @@ -4107,6 +4107,6 @@ */ bool const fPendingNmi = VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_NMI); - uint64_t fNeedExtrn = CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT | CPUMCTX_EXTRN_RIP | CPUMCTX_EXTRN_RFLAGS - | (fPendingNmi ? CPUMCTX_EXTRN_NEM_WIN_INHIBIT_NMI : 0); + uint64_t fNeedExtrn = CPUMCTX_EXTRN_INHIBIT_INT | CPUMCTX_EXTRN_RIP | CPUMCTX_EXTRN_RFLAGS + | (fPendingNmi ? CPUMCTX_EXTRN_INHIBIT_NMI : 0); if (pVCpu->cpum.GstCtx.fExtrn & fNeedExtrn) { @@ -4522,5 +4522,5 @@ { /* Try anticipate what we might need. */ - uint64_t fImport = IEM_CPUMCTX_EXTRN_MUST_MASK | CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT | CPUMCTX_EXTRN_NEM_WIN_INHIBIT_NMI; + uint64_t fImport = IEM_CPUMCTX_EXTRN_MUST_MASK | CPUMCTX_EXTRN_INHIBIT_INT | CPUMCTX_EXTRN_INHIBIT_NMI; if ( (rcStrict >= VINF_EM_FIRST && rcStrict <= VINF_EM_LAST) || RT_FAILURE(rcStrict)) @@ -4529,7 +4529,7 @@ else if ( rcStrict == VINF_IOM_R3_IOPORT_COMMIT_WRITE || rcStrict == VINF_EM_PENDING_R3_IOPORT_WRITE) - fImport = CPUMCTX_EXTRN_RIP | CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT; + fImport = CPUMCTX_EXTRN_RIP | CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_INHIBIT_INT; else if (rcStrict == VINF_EM_PENDING_R3_IOPORT_READ) - fImport = CPUMCTX_EXTRN_RAX | CPUMCTX_EXTRN_RIP | CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT; + fImport = CPUMCTX_EXTRN_RAX | CPUMCTX_EXTRN_RIP | CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_RFLAGS | CPUMCTX_EXTRN_INHIBIT_INT; # endif else if (VMCPU_FF_IS_ANY_SET(pVCpu, VMCPU_FF_INTERRUPT_PIC | VMCPU_FF_INTERRUPT_APIC Index: /trunk/src/VBox/VMM/VMMAll/VMXAllTemplate.cpp.h =================================================================== --- /trunk/src/VBox/VMM/VMMAll/VMXAllTemplate.cpp.h (revision 92494) +++ /trunk/src/VBox/VMM/VMMAll/VMXAllTemplate.cpp.h (revision 92495) @@ -95,5 +95,6 @@ | CPUMCTX_EXTRN_DR7 \ | CPUMCTX_EXTRN_HWVIRT \ - | CPUMCTX_EXTRN_HM_VMX_MASK) + | CPUMCTX_EXTRN_INHIBIT_INT \ + | CPUMCTX_EXTRN_INHIBIT_NMI) /** @@ -5223,5 +5224,5 @@ vmxHCImportGuestRFlags(pVCpu, pVmcsInfo); - if (fWhat & CPUMCTX_EXTRN_HM_VMX_INT_STATE) + if (fWhat & (CPUMCTX_EXTRN_INHIBIT_INT | CPUMCTX_EXTRN_INHIBIT_NMI)) vmxHCImportGuestIntrState(pVCpu, pVmcsInfo); Index: /trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp (revision 92494) +++ /trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp (revision 92495) @@ -104,4 +104,5 @@ | CPUMCTX_EXTRN_SYSENTER_MSRS \ | CPUMCTX_EXTRN_HWVIRT \ + | CPUMCTX_EXTRN_INHIBIT_INT \ | CPUMCTX_EXTRN_HM_SVM_MASK) @@ -2709,5 +2710,5 @@ #endif - if (fWhat & CPUMCTX_EXTRN_HM_SVM_INT_SHADOW) + if (fWhat & CPUMCTX_EXTRN_INHIBIT_INT) { if (pVmcbCtrl->IntShadow.n.u1IntShadow) @@ -3572,5 +3573,5 @@ HMSVM_CPUMCTX_ASSERT(pVCpu, CPUMCTX_EXTRN_HWVIRT | CPUMCTX_EXTRN_RFLAGS - | CPUMCTX_EXTRN_HM_SVM_INT_SHADOW + | CPUMCTX_EXTRN_INHIBIT_INT | CPUMCTX_EXTRN_HM_SVM_HWVIRT_VIRQ); @@ -4404,5 +4405,5 @@ | CPUMCTX_EXTRN_CS | CPUMCTX_EXTRN_HWVIRT - | CPUMCTX_EXTRN_HM_SVM_INT_SHADOW + | CPUMCTX_EXTRN_INHIBIT_INT | CPUMCTX_EXTRN_HM_SVM_HWVIRT_VIRQ | HMSVM_CPUMCTX_SHARED_STATE); Index: /trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp (revision 92494) +++ /trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp (revision 92495) @@ -124,5 +124,6 @@ | CPUMCTX_EXTRN_DR7 \ | CPUMCTX_EXTRN_HWVIRT \ - | CPUMCTX_EXTRN_HM_VMX_MASK) + | CPUMCTX_EXTRN_INHIBIT_INT \ + | CPUMCTX_EXTRN_INHIBIT_NMI) /** @@ -7719,5 +7720,5 @@ hmR0VmxImportGuestRFlags(pVCpu, pVmcsInfo); - if (fWhat & CPUMCTX_EXTRN_HM_VMX_INT_STATE) + if (fWhat & (CPUMCTX_EXTRN_INHIBIT_INT | CPUMCTX_EXTRN_INHIBIT_NMI)) hmR0VmxImportGuestIntrState(pVCpu, pVmcsInfo); @@ -11257,5 +11258,5 @@ /* - * Import the guest-interruptibility state always as we need it while evaluating + * Always import the guest-interruptibility state as we need it while evaluating * injecting events on re-entry. * @@ -11264,5 +11265,6 @@ * mode changes wrt CR0 are intercepted. */ - uint64_t const fImportMask = CPUMCTX_EXTRN_HM_VMX_INT_STATE + uint64_t const fImportMask = CPUMCTX_EXTRN_INHIBIT_INT + | CPUMCTX_EXTRN_INHIBIT_NMI #if defined(HMVMX_ALWAYS_SYNC_FULL_GUEST_STATE) || defined(HMVMX_ALWAYS_SAVE_FULL_GUEST_STATE) | HMVMX_CPUMCTX_EXTRN_ALL Index: /trunk/src/VBox/VMM/VMMR0/NEMR0Native-win.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR0/NEMR0Native-win.cpp (revision 92494) +++ /trunk/src/VBox/VMM/VMMR0/NEMR0Native-win.cpp (revision 92495) @@ -1807,6 +1807,6 @@ /* Interruptibility state. This can get a little complicated since we get half of the state via HV_X64_VP_EXECUTION_STATE. */ - if ( (fWhat & (CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT | CPUMCTX_EXTRN_NEM_WIN_INHIBIT_NMI)) - == (CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT | CPUMCTX_EXTRN_NEM_WIN_INHIBIT_NMI) ) + if ( (fWhat & (CPUMCTX_EXTRN_INHIBIT_INT | CPUMCTX_EXTRN_INHIBIT_NMI)) + == (CPUMCTX_EXTRN_INHIBIT_INT | CPUMCTX_EXTRN_INHIBIT_NMI) ) { HV_REGISTER_ASSOC_ZERO_PADDING_AND_HI64(&pInput->Elements[iReg]); @@ -1820,5 +1820,5 @@ iReg++; } - else if (fWhat & CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT) + else if (fWhat & CPUMCTX_EXTRN_INHIBIT_INT) { if ( pGVCpu->nem.s.fLastInterruptShadow @@ -1839,5 +1839,5 @@ } else - Assert(!(fWhat & CPUMCTX_EXTRN_NEM_WIN_INHIBIT_NMI)); + Assert(!(fWhat & CPUMCTX_EXTRN_INHIBIT_NMI)); /* Interrupt windows. Always set if active as Hyper-V seems to be forgetful. */ @@ -2132,5 +2132,5 @@ /* Interruptibility. */ - if (fWhat & (CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT | CPUMCTX_EXTRN_NEM_WIN_INHIBIT_NMI)) + if (fWhat & (CPUMCTX_EXTRN_INHIBIT_INT | CPUMCTX_EXTRN_INHIBIT_NMI)) { pInput->Names[iReg++] = HvRegisterInterruptState; @@ -2715,10 +2715,10 @@ /* Interruptibility. */ - if (fWhat & (CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT | CPUMCTX_EXTRN_NEM_WIN_INHIBIT_NMI)) + if (fWhat & (CPUMCTX_EXTRN_INHIBIT_INT | CPUMCTX_EXTRN_INHIBIT_NMI)) { Assert(pInput->Names[iReg] == HvRegisterInterruptState); Assert(pInput->Names[iReg + 1] == HvX64RegisterRip); - if (!(pCtx->fExtrn & CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT)) + if (!(pCtx->fExtrn & CPUMCTX_EXTRN_INHIBIT_INT)) { pGVCpu->nem.s.fLastInterruptShadow = paValues[iReg].InterruptState.InterruptShadow; @@ -2729,5 +2729,5 @@ } - if (!(pCtx->fExtrn & CPUMCTX_EXTRN_NEM_WIN_INHIBIT_NMI)) + if (!(pCtx->fExtrn & CPUMCTX_EXTRN_INHIBIT_NMI)) { if (paValues[iReg].InterruptState.NmiMasked) @@ -2737,5 +2737,5 @@ } - fWhat |= CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT | CPUMCTX_EXTRN_NEM_WIN_INHIBIT_NMI; + fWhat |= CPUMCTX_EXTRN_INHIBIT_INT | CPUMCTX_EXTRN_INHIBIT_NMI; iReg += 2; } Index: /trunk/src/VBox/VMM/include/NEMInternal.h =================================================================== --- /trunk/src/VBox/VMM/include/NEMInternal.h (revision 92494) +++ /trunk/src/VBox/VMM/include/NEMInternal.h (revision 92495) @@ -99,6 +99,6 @@ /** The CPUMCTX_EXTRN_XXX mask for IEM. */ -# define NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM ( IEM_CPUMCTX_EXTRN_MUST_MASK | CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT \ - | CPUMCTX_EXTRN_NEM_WIN_INHIBIT_NMI ) +# define NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM ( IEM_CPUMCTX_EXTRN_MUST_MASK | CPUMCTX_EXTRN_INHIBIT_INT \ + | CPUMCTX_EXTRN_INHIBIT_NMI ) /** The CPUMCTX_EXTRN_XXX mask for IEM when raising exceptions. */ # define NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM_XCPT (IEM_CPUMCTX_EXTRN_XCPT_MASK | NEM_WIN_CPUMCTX_EXTRN_MASK_FOR_IEM) @@ -131,6 +131,6 @@ /** The CPUMCTX_EXTRN_XXX mask for IEM. */ -# define NEM_DARWIN_CPUMCTX_EXTRN_MASK_FOR_IEM ( IEM_CPUMCTX_EXTRN_MUST_MASK | CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT \ - | CPUMCTX_EXTRN_NEM_WIN_INHIBIT_NMI ) +# define NEM_DARWIN_CPUMCTX_EXTRN_MASK_FOR_IEM ( IEM_CPUMCTX_EXTRN_MUST_MASK | CPUMCTX_EXTRN_INHIBIT_INT \ + | CPUMCTX_EXTRN_INHIBIT_NMI ) /** The CPUMCTX_EXTRN_XXX mask for IEM when raising exceptions. */ # define NEM_DARWIN_CPUMCTX_EXTRN_MASK_FOR_IEM_XCPT (IEM_CPUMCTX_EXTRN_XCPT_MASK | NEM_DARWIN_CPUMCTX_EXTRN_MASK_FOR_IEM)