Changeset 91289 in vbox

Timestamp:

Sep 16, 2021 9:49:50 PM (3 years ago)

Author:

vboxsync

Message:

VMM/CPUM,++: Moved the nested SVM MSR permission bitmap allocation into CPUMCTX. bugref:10093

Location:

trunk

Files:

• include/VBox/vmm/cpum.mac (modified) (2 diffs)
• include/VBox/vmm/cpumctx.h (modified) (4 diffs)
• include/VBox/vmm/vm.h (modified) (1 diff)
• include/VBox/vmm/vm.mac (modified) (1 diff)
• src/VBox/VMM/VMMAll/IEMAllCImplSvmInstr.cpp.h (modified) (2 diffs)
• src/VBox/VMM/VMMR0/HMSVMR0.cpp (modified) (4 diffs)
• src/VBox/VMM/VMMR3/CPUM.cpp (modified) (5 diffs)
• src/VBox/VMM/include/CPUMInternal.mac (modified) (2 diffs)
• src/VBox/VMM/testcase/tstVMStruct.h (modified) (2 diffs)

trunk/include/VBox/vmm/cpum.mac

@@ -266 +266 @@
     alignb 4096
     .hwvirt.svm.Vmcb                   resb          4096
+    .hwvirt.svm.abMsrBitmap            resb          8192
     .hwvirt.svm.uMsrHSavePa            resq          1
     .hwvirt.svm.GCPhysVmcb             resq          1
@@ -275 +276 @@
     .hwvirt.svm.fInterceptEvents       resb          1
     alignb 8
-    .hwvirt.svm.pvMsrBitmapR0          RTR0PTR_RES   1
-    alignb 8
-    .hwvirt.svm.pvMsrBitmapR3          RTR3PTR_RES   1
-    alignb 8
     .hwvirt.svm.pvIoBitmapR0           RTR0PTR_RES   1
     alignb 8

trunk/include/VBox/vmm/cpumctx.h

@@ -502 +502 @@
                 /** 0x4000 - Cache of the nested-guest VMCB. */
                 SVMVMCB                 Vmcb;
+                /** 0x5000 - The MSRPM (MSR Permission bitmap).
+                 *
+                 * This need not be physically contiguous pages because we use the one from
+                 * HMPHYSCPU while executing the nested-guest using hardware-assisted SVM.
+                 * This one is just used for caching the bitmap from guest physical memory. */
+                uint8_t                 abMsrBitmap[0x2000];
 
                 /** 0x300 - MSR holding physical address of the Guest's Host-state. */
@@ -519 +525 @@
                 /** 0x3e5 - Padding. */
                 bool                    afPadding[3];
-                /** 0x3e8 - MSR permission bitmap - R0 ptr. */
-                R0PTRTYPE(void *)       pvMsrBitmapR0;
-                /** 0x3f0 - MSR permission bitmap - R3 ptr. */
-                R3PTRTYPE(void *)       pvMsrBitmapR3;
                 /** 0x3f8 - IO permission bitmap - R0 ptr. */
                 R0PTRTYPE(void *)       pvIoBitmapR0;
@@ -629 +631 @@
 #endif
         /** 0x530 - Pad to 64 byte boundary. */
-        uint8_t                 abPadding0[8+16+32];
+        uint8_t                 abPadding0[8];
     } hwvirt;
 } CPUMCTX;
@@ -836 +838 @@
 # endif
 AssertCompileMemberAlignment(CPUMCTX, hwvirt.CPUM_UNION_NM(s.) svm.Vmcb,                  4096);
-AssertCompileMemberAlignment(CPUMCTX, hwvirt.CPUM_UNION_NM(s.) svm.pvMsrBitmapR0,         8);
+AssertCompileMemberAlignment(CPUMCTX, hwvirt.CPUM_UNION_NM(s.) svm.abMsrBitmap,           4096);
 AssertCompileMemberAlignment(CPUMCTX, hwvirt.CPUM_UNION_NM(s.) svm.pvIoBitmapR0,          8);
 AssertCompileMemberAlignment(CPUMCTX, hwvirt.CPUM_UNION_NM(s.) vmx.pVmcsR0,               8);

trunk/include/VBox/vmm/vm.h

@@ -305 +305 @@
         CPUMCTX             GstCtx;
 #endif
-        uint8_t             padding[40960];      /* multiple of 4096 */
+        uint8_t             padding[49152];      /* multiple of 4096 */
     } cpum;
 

trunk/include/VBox/vmm/vm.mac

@@ -91 +91 @@
     .pgm                    resb 4096+28672
     alignb 4096
-    .cpum                   resb 40960
+    .cpum                   resb 49152
 %define VMCPU.cpum.GstCtx   VMCPU.cpum
     alignb 4096

trunk/src/VBox/VMM/VMMAll/IEMAllCImplSvmInstr.cpp.h

@@ -575 +575 @@
          * Copy the MSR permission bitmap into the cache.
          */
-        Assert(pVCpu->cpum.GstCtx.hwvirt.svm.CTX_SUFF(pvMsrBitmap));
-        rc = PGMPhysSimpleReadGCPhys(pVM, pVCpu->cpum.GstCtx.hwvirt.svm.CTX_SUFF(pvMsrBitmap), GCPhysMsrBitmap,
-                                     SVM_MSRPM_PAGES * X86_PAGE_4K_SIZE);
+        AssertCompile(sizeof(pVCpu->cpum.GstCtx.hwvirt.svm.abMsrBitmap) == SVM_MSRPM_PAGES * X86_PAGE_4K_SIZE);
+        rc = PGMPhysSimpleReadGCPhys(pVM, pVCpu->cpum.GstCtx.hwvirt.svm.abMsrBitmap, GCPhysMsrBitmap,
+                                     sizeof(pVCpu->cpum.GstCtx.hwvirt.svm.abMsrBitmap));
         if (RT_FAILURE(rc))
         {
@@ -1050 +1050 @@
          * Check if the bit is set, if so, trigger a #VMEXIT.
          */
-        uint8_t *pbMsrpm = (uint8_t *)pVCpu->cpum.GstCtx.hwvirt.svm.CTX_SUFF(pvMsrBitmap);
-        pbMsrpm += offMsrpm;
-        if (*pbMsrpm & RT_BIT(uMsrpmBit))
+        if (pVCpu->cpum.GstCtx.hwvirt.svm.abMsrBitmap[offMsrpm] & RT_BIT(uMsrpmBit))
         {
             IEM_SVM_UPDATE_NRIP(pVCpu);

trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp

@@ -945 +945 @@
         {
             /* Only clear the bit if the nested-guest is also not intercepting the MSR read.*/
-            uint8_t const *pbNstGstMsrBitmap = (uint8_t *)pVCpu->cpum.GstCtx.hwvirt.svm.CTX_SUFF(pvMsrBitmap);
-            pbNstGstMsrBitmap += offMsrpm;
-            if (!(*pbNstGstMsrBitmap & RT_BIT(uMsrpmBit)))
+            if (!(pVCpu->cpum.GstCtx.hwvirt.svm.abMsrBitmap[offMsrpm] & RT_BIT(uMsrpmBit)))
                 *pbMsrBitmap &= ~RT_BIT(uMsrpmBit);
             else
@@ -965 +963 @@
         {
             /* Only clear the bit if the nested-guest is also not intercepting the MSR write.*/
-            uint8_t const *pbNstGstMsrBitmap = (uint8_t *)pVCpu->cpum.GstCtx.hwvirt.svm.CTX_SUFF(pvMsrBitmap);
-            pbNstGstMsrBitmap += offMsrpm;
-            if (!(*pbNstGstMsrBitmap & RT_BIT(uMsrpmBit + 1)))
+            if (!(pVCpu->cpum.GstCtx.hwvirt.svm.abMsrBitmap[offMsrpm] & RT_BIT(uMsrpmBit + 1)))
                 *pbMsrBitmap &= ~RT_BIT(uMsrpmBit + 1);
             else
@@ -2510 +2506 @@
 {
     uint64_t const *pu64GstMsrpm    = (uint64_t const *)pVCpu->hmr0.s.svm.pvMsrBitmap;
-    uint64_t const *pu64NstGstMsrpm = (uint64_t const *)pVCpu->cpum.GstCtx.hwvirt.svm.CTX_SUFF(pvMsrBitmap);
+    uint64_t const *pu64NstGstMsrpm = (uint64_t const *)&pVCpu->cpum.GstCtx.hwvirt.svm.abMsrBitmap[0];
     uint64_t       *pu64DstMsrpm    = (uint64_t *)pHostCpu->n.svm.pvNstGstMsrpm;
 
@@ -4939 +4935 @@
                     Assert(offMsrpm < SVM_MSRPM_PAGES << X86_PAGE_4K_SHIFT);
 
-                    uint8_t const *pbMsrBitmap = (uint8_t const *)pVCpu->cpum.GstCtx.hwvirt.svm.CTX_SUFF(pvMsrBitmap);
-                    pbMsrBitmap               += offMsrpm;
+                    uint8_t const * const pbMsrBitmap = &pVCpu->cpum.GstCtx.hwvirt.svm.abMsrBitmap[offMsrpm];
                     bool const fInterceptRead  = RT_BOOL(*pbMsrBitmap & RT_BIT(uMsrpmBit));
                     bool const fInterceptWrite = RT_BOOL(*pbMsrBitmap & RT_BIT(uMsrpmBit + 1));

trunk/src/VBox/VMM/VMMR3/CPUM.cpp

@@ -1022 +1022 @@
         PVMCPU pVCpu = pVM->apCpusR3[i];
 
-        if (pVCpu->cpum.s.Guest.hwvirt.svm.pvMsrBitmapR3)
-        {
-            SUPR3PageFreeEx(pVCpu->cpum.s.Guest.hwvirt.svm.pvMsrBitmapR3, SVM_MSRPM_PAGES);
-            pVCpu->cpum.s.Guest.hwvirt.svm.pvMsrBitmapR3 = NULL;
-        }
-
         if (pVCpu->cpum.s.Guest.hwvirt.svm.pvIoBitmapR3)
         {
@@ -1055 +1049 @@
         pVCpu->cpum.s.Guest.hwvirt.enmHwvirt = CPUMHWVIRT_SVM;
 
-        AssertCompile(SVM_VMCB_PAGES * PAGE_SIZE == sizeof(pVCpu->cpum.s.Guest.hwvirt.svm.Vmcb));
-
-        /*
-         * Allocate the MSRPM (MSR Permission bitmap).
-         *
-         * This need not be physically contiguous pages because we use the one from
-         * HMPHYSCPU while executing the nested-guest using hardware-assisted SVM.
-         * This one is just used for caching the bitmap from guest physical memory.
-         */
-        Assert(!pVCpu->cpum.s.Guest.hwvirt.svm.pvMsrBitmapR3);
-        rc = SUPR3PageAllocEx(SVM_MSRPM_PAGES, 0 /* fFlags */, &pVCpu->cpum.s.Guest.hwvirt.svm.pvMsrBitmapR3,
-                              &pVCpu->cpum.s.Guest.hwvirt.svm.pvMsrBitmapR0, NULL /* paPages */);
-        if (RT_FAILURE(rc))
-        {
-            Assert(!pVCpu->cpum.s.Guest.hwvirt.svm.pvMsrBitmapR3);
-            LogRel(("CPUM%u: Failed to alloc %u pages for the nested-guest's MSR permission bitmap\n", pVCpu->idCpu,
-                    SVM_MSRPM_PAGES));
-            break;
-        }
+        AssertCompile(SVM_VMCB_PAGES * X86_PAGE_SIZE == sizeof(pVCpu->cpum.s.Guest.hwvirt.svm.Vmcb));
+        AssertCompile(SVM_MSRPM_PAGES * X86_PAGE_SIZE == sizeof(pVCpu->cpum.s.Guest.hwvirt.svm.abMsrBitmap));
 
         /*
@@ -2652 +2629 @@
             SSMR3PutStructEx(pSSM, &pGstCtx->hwvirt.svm.HostState, sizeof(pGstCtx->hwvirt.svm.HostState), 0 /* fFlags */,
                              g_aSvmHwvirtHostState, NULL /* pvUser */);
-            SSMR3PutMem(pSSM,   &pGstCtx->hwvirt.svm.Vmcb,          sizeof(pGstCtx->hwvirt.svm.Vmcb));
-            SSMR3PutMem(pSSM,    pGstCtx->hwvirt.svm.pvMsrBitmapR3, SVM_MSRPM_PAGES << X86_PAGE_4K_SHIFT);
+            SSMR3PutMem(pSSM,   &pGstCtx->hwvirt.svm.Vmcb,           sizeof(pGstCtx->hwvirt.svm.Vmcb));
+            SSMR3PutMem(pSSM,   &pGstCtx->hwvirt.svm.abMsrBitmap[0], sizeof(pGstCtx->hwvirt.svm.abMsrBitmap));
             SSMR3PutMem(pSSM,    pGstCtx->hwvirt.svm.pvIoBitmapR3,  SVM_IOPM_PAGES  << X86_PAGE_4K_SHIFT);
             SSMR3PutU32(pSSM,    pGstCtx->hwvirt.fLocalForcedActions);
@@ -2939 +2916 @@
                                          0 /* fFlags */, g_aSvmHwvirtHostState, NULL /* pvUser */);
                         SSMR3GetMem(pSSM,      &pGstCtx->hwvirt.svm.Vmcb,          sizeof(pGstCtx->hwvirt.svm.Vmcb));
-                        SSMR3GetMem(pSSM,       pGstCtx->hwvirt.svm.pvMsrBitmapR3, SVM_MSRPM_PAGES << X86_PAGE_4K_SHIFT);
+                        SSMR3GetMem(pSSM,      &pGstCtx->hwvirt.svm.abMsrBitmap[0], sizeof(pGstCtx->hwvirt.svm.abMsrBitmap));
                         SSMR3GetMem(pSSM,       pGstCtx->hwvirt.svm.pvIoBitmapR3,  SVM_IOPM_PAGES  << X86_PAGE_4K_SHIFT);
                         SSMR3GetU32(pSSM,      &pGstCtx->hwvirt.fLocalForcedActions);
@@ -4157 +4134 @@
         pHlp->pfnPrintf(pHlp, "  cPauseFilterThreshold      = %RU32\n",     pCtx->hwvirt.svm.cPauseFilterThreshold);
         pHlp->pfnPrintf(pHlp, "  fInterceptEvents           = %u\n",        pCtx->hwvirt.svm.fInterceptEvents);
-        pHlp->pfnPrintf(pHlp, "  pvMsrBitmapR3              = %p\n",        pCtx->hwvirt.svm.pvMsrBitmapR3);
-        pHlp->pfnPrintf(pHlp, "  pvMsrBitmapR0              = %RKv\n",      pCtx->hwvirt.svm.pvMsrBitmapR0);
         pHlp->pfnPrintf(pHlp, "  pvIoBitmapR3               = %p\n",        pCtx->hwvirt.svm.pvIoBitmapR3);
         pHlp->pfnPrintf(pHlp, "  pvIoBitmapR0               = %RKv\n",      pCtx->hwvirt.svm.pvIoBitmapR0);

trunk/src/VBox/VMM/include/CPUMInternal.mac

@@ -231 +231 @@
 
     alignb 4096
-    .Guest.hwvirt.svm.Vmcb                  resb            4096
+    .Guest.hwvirt.svm.Vmcb                  resb        4096
+    .Guest.hwvirt.svm.abMsrBitmap           resb        8192
     .Guest.hwvirt.svm.uMsrHSavePa            resq         1
     .Guest.hwvirt.svm.GCPhysVmcb             resq         1
@@ -240 +241 @@
     .Guest.hwvirt.svm.cPauseFilterThreshold  resw         1
     .Guest.hwvirt.svm.fInterceptEvents       resb         1
-    alignb 8
-    .Guest.hwvirt.svm.pvMsrBitmapR0          RTR0PTR_RES  1
-    alignb 8
-    .Guest.hwvirt.svm.pvMsrBitmapR3          RTR3PTR_RES  1
     alignb 8
     .Guest.hwvirt.svm.pvIoBitmapR0           RTR0PTR_RES  1

trunk/src/VBox/VMM/testcase/tstVMStruct.h

@@ -129 +129 @@
     GEN_CHECK_OFF(CPUMCTX, hwvirt);
     GEN_CHECK_OFF(CPUMCTX, hwvirt.svm.Vmcb);
+    GEN_CHECK_OFF(CPUMCTX, hwvirt.svm.abMsrBitmap);
     GEN_CHECK_OFF(CPUMCTX, hwvirt.svm.uMsrHSavePa);
     GEN_CHECK_OFF(CPUMCTX, hwvirt.svm.GCPhysVmcb);
@@ -136 +137 @@
     GEN_CHECK_OFF(CPUMCTX, hwvirt.svm.cPauseFilterThreshold);
     GEN_CHECK_OFF(CPUMCTX, hwvirt.svm.fInterceptEvents);
-    GEN_CHECK_OFF(CPUMCTX, hwvirt.svm.pvMsrBitmapR0);
-    GEN_CHECK_OFF(CPUMCTX, hwvirt.svm.pvMsrBitmapR3);
     GEN_CHECK_OFF(CPUMCTX, hwvirt.svm.pvIoBitmapR0);
     GEN_CHECK_OFF(CPUMCTX, hwvirt.svm.pvIoBitmapR3);