VirtualBox

Changeset 91037 in vbox


Ignore:
Timestamp:
Aug 31, 2021 4:42:14 PM (3 years ago)
Author:
vboxsync
Message:

VMM: Nested VMX: bugref:10092 Added support for tertiary processor based VM-execution controls and updated the virtual VMCS.

Location:
trunk
Files:
16 edited

Legend:

Unmodified
Added
Removed

  • trunk/include/VBox/sup.h

    r90943 r91037  
    165165            uint64_t        u64VmFunc;
    166166            uint64_t        u64EptVpidCaps;
    167             uint64_t        au64Reserved[9];
     167            uint64_t        u64ProcCtls3;
     168            uint64_t        au64Reserved[8];
    168169        } vmx;
    169170        struct

  • trunk/include/VBox/vmm/cpum.h

    r89934 r91037  
    12511251    /** VMX: Supports CR3-store exiting. */
    12521252    uint32_t        fVmxCr3StoreExit : 1;
     1253    /** VMX: Supports tertiary processor-based VM-execution controls. */
     1254    uint32_t        fVmxTertiaryExecCtls : 1;
    12531255    /** VMX: Supports CR8-load exiting. */
    12541256    uint32_t        fVmxCr8LoadExit : 1;
    … …  
    13211323    /** @} */
    13221324
     1325    /** @name VMX Tertiary processor-based controls.
     1326     * @{ */
     1327    /** VMX: Supports LOADIWKEY exiting. */
     1328    uint32_t        fVmxLoadIwKeyExit : 1;
     1329    /** @} */
     1330
    13231331    /** @name VMX VM-entry controls.
    13241332     * @{ */
    … …  
    13681376
    13691377    /** VMX: Padding / reserved for future features. */
    1370     uint32_t        fVmxPadding1 : 1;
    1371     uint32_t        fVmxPadding2;
     1378    uint32_t        fVmxPadding1 : 31;
    13721379} CPUMFEATURES;
    13731380#ifndef VBOX_FOR_DTRACE_LIB
    … …  
    21482155
    21492156/**
     2157 * Checks whether one of the given Tertiary Processor-based VM-execution controls
     2158 * are set when executing a nested-guest.
     2159 *
     2160 * @returns @c true if set, @c false otherwise.
     2161 * @param   pCtx        Pointer to the context.
     2162 * @param   uProcCtls3  The Tertiary Processor-based VM-execution controls to
     2163 *                      check.
     2164 *
     2165 * @remarks This does not check if all given controls are set if more than one
     2166 *          control is passed in @a uProcCtls3.
     2167 */
     2168DECLINLINE(bool) CPUMIsGuestVmxProcCtls3Set(PCCPUMCTX pCtx, uint64_t uProcCtls3)
     2169{
     2170    Assert(CPUMIsGuestInVmxNonRootMode(pCtx));
     2171    PCVMXVVMCS pVmcs = pCtx->hwvirt.vmx.CTX_SUFF(pVmcs);
     2172    Assert(pVmcs);
     2173    return RT_BOOL(pVmcs->u64ProcCtls3.u & uProcCtls3);
     2174}
     2175
     2176/**
    21502177 * Checks whether one of the given VM-exit controls are set when executing a
    21512178 * nested-guest.

  • trunk/include/VBox/vmm/hm_vmx.h

    r90934 r91037  
    12351235    /** EPT, VPID capabilities. */
    12361236    uint64_t        u64EptVpidCaps;
     1237    /** Tertiary processor-based VM-execution controls. */
     1238    uint64_t        u64ProcCtls3;
    12371239    /** Reserved for future. */
    1238     uint64_t        a_u64Reserved[9];
     1240    uint64_t        a_u64Reserved[8];
    12391241} VMXMSRS;
    12401242AssertCompileSizeAlignment(VMXMSRS, 8);
    … …  
    14021404/** TPAUSE. */
    14031405#define VMX_EXIT_TPAUSE                                         68
     1406/** LOADIWKEY. */
     1407#define VMX_EXIT_LOADIWKEY                                      69
    14041408/** The maximum VM-exit value (inclusive). */
    1405 #define VMX_EXIT_MAX                                            (VMX_EXIT_TPAUSE)
     1409#define VMX_EXIT_MAX                                            (VMX_EXIT_LOADIWKEY)
    14061410/** @} */
    14071411
    … …  
    22242228 *  'first' VT-x capable CPUs; this actually includes the newest Nehalem CPUs) */
    22252229#define VMX_PROC_CTLS_CR3_STORE_EXIT                            RT_BIT(16)
     2230/** Whether the secondary processor based VM-execution controls are used. */
     2231#define VMX_PROC_CTLS_USE_TERTIARY_CTLS                         RT_BIT(17)
    22262232/** VM-exit on CR8 loads. */
    22272233#define VMX_PROC_CTLS_CR8_LOAD_EXIT                             RT_BIT(19)
    … …  
    22792285#define VMX_BF_PROC_CTLS_CR3_STORE_EXIT_SHIFT                   16
    22802286#define VMX_BF_PROC_CTLS_CR3_STORE_EXIT_MASK                    UINT32_C(0x00010000)
    2281 #define VMX_BF_PROC_CTLS_RSVD_17_18_SHIFT                       17
    2282 #define VMX_BF_PROC_CTLS_RSVD_17_18_MASK                        UINT32_C(0x00060000)
     2287#define VMX_BF_PROC_CTLS_USE_TERTIARY_CTLS_SHIFT                17
     2288#define VMX_BF_PROC_CTLS_USE_TERTIARY_CTLS_MASK                 UINT32_C(0x00020000)
     2289#define VMX_BF_PROC_CTLS_RSVD_18_SHIFT                          18
     2290#define VMX_BF_PROC_CTLS_RSVD_18_MASK                           UINT32_C(0x00040000)
    22832291#define VMX_BF_PROC_CTLS_CR8_LOAD_EXIT_SHIFT                    19
    22842292#define VMX_BF_PROC_CTLS_CR8_LOAD_EXIT_MASK                     UINT32_C(0x00080000)
    … …  
    23092317RT_BF_ASSERT_COMPILE_CHECKS(VMX_BF_PROC_CTLS_, UINT32_C(0), UINT32_MAX,
    23102318                            (RSVD_0_1, INT_WINDOW_EXIT, USE_TSC_OFFSETTING, RSVD_4_6, HLT_EXIT, RSVD_8, INVLPG_EXIT,
    2311                              MWAIT_EXIT, RDPMC_EXIT, RDTSC_EXIT, RSVD_13_14, CR3_LOAD_EXIT, CR3_STORE_EXIT, RSVD_17_18,
    2312                              CR8_LOAD_EXIT, CR8_STORE_EXIT, USE_TPR_SHADOW, NMI_WINDOW_EXIT, MOV_DR_EXIT, UNCOND_IO_EXIT,
     2319                             MWAIT_EXIT, RDPMC_EXIT, RDTSC_EXIT, RSVD_13_14, CR3_LOAD_EXIT, CR3_STORE_EXIT, USE_TERTIARY_CTLS,
     2320                             RSVD_18, CR8_LOAD_EXIT, CR8_STORE_EXIT, USE_TPR_SHADOW, NMI_WINDOW_EXIT, MOV_DR_EXIT, UNCOND_IO_EXIT,
    23132321                             USE_IO_BITMAPS, RSVD_26, MONITOR_TRAP_FLAG, USE_MSR_BITMAPS, MONITOR_EXIT, PAUSE_EXIT,
    23142322                             USE_SECONDARY_CTLS));
    … …  
    35243532
    35253533/** The highest index value used for supported virtual VMCS field encoding. */
    3526 #define VMX_V_VMCS_MAX_INDEX                                    RT_BF_GET(VMX_VMCS64_CTRL_TSC_MULTIPLIER_HIGH, VMX_BF_VMCSFIELD_INDEX)
     3534#define VMX_V_VMCS_MAX_INDEX                                    RT_BF_GET(VMX_VMCS64_CTRL_ENCLV_EXITING_BITMAP_HIGH, VMX_BF_VMCSFIELD_INDEX)
    35273535
    35283536/**
    … …  
    36153623 *       corresponding fields in IEM (g_aoffVmcsMap), the corresponding saved
    36163624 *       state structure in CPUM (g_aVmxHwvirtVmcs) and bump the SSM version.
    3617  *       Also consider updating CPUMIsGuestVmxVmcsFieldValid.
     3625 *       Also consider updating CPUMIsGuestVmxVmcsFieldValid and cpumR3InfoVmxVmcs.
    36183626 */
    36193627#pragma pack(1)
    … …  
    37163724    RTUINT64U       u64SpptPtr;                  /**< 0x318 - Sub-page-permission-table pointer. */
    37173725    RTUINT64U       u64TscMultiplier;            /**< 0x320 - TSC multiplier. */
    3718     RTUINT64U       au64Reserved0[15];           /**< 0x328 - Reserved for future. */
     3726    RTUINT64U       u64ProcCtls3;                /**< 0x328 - Tertiary-Processor based VM-execution controls. */
     3727    RTUINT64U       u64EnclvExitBitmap;          /**< 0x330 - ENCLV-exiting bitmap. */
     3728    RTUINT64U       au64Reserved0[13];           /**< 0x338 - Reserved for future. */
    37193729
    37203730    /** Natural-width fields. */
    … …  
    37513761    RTUINT64U       u64HostEferMsr;              /**< 0x540 - Host EFER MSR. */
    37523762    RTUINT64U       u64HostPerfGlobalCtlMsr;     /**< 0x548 - Host global performance-control MSR. */
    3753     RTUINT64U       au64Reserved3[16];           /**< 0x550 - Reserved for future. */
     3763    RTUINT64U       u64HostPkrsMsr;              /**< 0x550 - Host PKRS MSR. */
     3764    RTUINT64U       au64Reserved3[15];           /**< 0x558 - Reserved for future. */
    37543765
    37553766    /** Natural-width fields. */
    … …  
    37663777    RTUINT64U       u64HostRsp;                  /**< 0x620 - Host RSP. */
    37673778    RTUINT64U       u64HostRip;                  /**< 0x628 - Host RIP. */
    3768     RTUINT64U       au64Reserved7[32];           /**< 0x630 - Reserved for future. */
     3779    RTUINT64U       u64HostSCetMsr;              /**< 0x630 - Host S_CET MSR. */
     3780    RTUINT64U       u64HostSsp;                  /**< 0x638 - Host SSP. */
     3781    RTUINT64U       u64HostIntrSspTblAddrMsr;    /**< 0x640 - Host Interrupt SSP table address MSR. */
     3782    RTUINT64U       au64Reserved7[29];           /**< 0x648 - Reserved for future. */
    37693783    /** @} */
    37703784
    … …  
    38243838    RTUINT64U       u64GuestBndcfgsMsr;          /**< 0x830 - Guest Bounds config MPX MSR (Intel Memory Protection Extensions). */
    38253839    RTUINT64U       u64GuestRtitCtlMsr;          /**< 0x838 - Guest RTIT control MSR (Intel Real Time Instruction Trace). */
    3826     RTUINT64U       au64Reserved2[32];           /**< 0x840 - Reserved for future. */
     3840    RTUINT64U       u64GuestPkrsMsr;             /**< 0x840 - Guest PKRS MSR. */
     3841    RTUINT64U       au64Reserved2[31];           /**< 0x848 - Reserved for future. */
    38273842
    38283843    /** Natural-width fields. */
    … …  
    38473862    RTUINT64U       u64GuestSysenterEsp;         /**< 0x9d0 - Guest SYSENTER ESP. */
    38483863    RTUINT64U       u64GuestSysenterEip;         /**< 0x9d8 - Guest SYSENTER EIP. */
    3849     RTUINT64U       au64Reserved6[32];           /**< 0x9e0 - Reserved for future. */
     3864    RTUINT64U       u64GuestSCetMsr;             /**< 0x9e0 - Guest S_CET MSR. */
     3865    RTUINT64U       u64GuestSsp;                 /**< 0x9e8 - Guest SSP. */
     3866    RTUINT64U       u64GuestIntrSspTblAddrMsr;   /**< 0x9f0 - Guest Interrupt SSP table address MSR. */
     3867    RTUINT64U       au64Reserved6[29];           /**< 0x9f8 - Reserved for future. */
    38503868    /** @} */
    38513869

  • trunk/include/iprt/x86.h

    r89475 r91037  
    16001600/** Information for enumerating fields in the VMCS. */
    16011601#define MSR_IA32_VMX_VMCS_ENUM              0x48A
    1602 /** Allowed settings for secondary proc-based VM execution controls */
     1602/** Allowed settings for secondary processor-based VM-execution controls. */
    16031603#define MSR_IA32_VMX_PROCBASED_CTLS2        0x48B
    16041604/** EPT capabilities. */
    … …  
    16141614/** Allowed settings for the VM-function controls. */
    16151615#define MSR_IA32_VMX_VMFUNC                 0x491
     1616/** Tertiary processor-based VM execution controls. */
     1617#define MSR_IA32_VMX_PROCBASED_CTLS3        0x492
    16161618
    16171619/** Intel PT - Enable and control for trace packet generation. */

  • trunk/src/VBox/HostDrivers/Support/SUPDrv.cpp

    r90862 r91037  
    47294729                    Msrs.u.vmx.u64VmFunc = ASMRdMsr(MSR_IA32_VMX_VMFUNC);
    47304730            }
     4731
     4732            if (Msrs.u.vmx.ProcCtls.n.allowed1 & VMX_PROC_CTLS_USE_TERTIARY_CTLS)
     4733                Msrs.u.vmx.u64ProcCtls3 = ASMRdMsr(MSR_IA32_VMX_PROCBASED_CTLS3);
    47314734        }
    47324735        else if (fCaps & SUPVTCAPS_AMD_V)

  • trunk/src/VBox/HostDrivers/Support/SUPDrvIOC.h

    r90970 r91037  
    223223 *          - nothing
    224224 */
    225 #define SUPDRV_IOC_VERSION                              0x00310001
     225#define SUPDRV_IOC_VERSION                              0x00310002
    226226
    227227/** SUP_IOCTL_COOKIE. */

  • trunk/src/VBox/HostDrivers/Support/SUPLib.cpp

    r90970 r91037  
    279279        CookieReq.u.In.u32ReqVersion = SUPDRV_IOC_VERSION;
    280280        const uint32_t uMinVersion = (SUPDRV_IOC_VERSION & 0xffff0000) == 0x00300000
    281                                    ? 0x00310001
     281                                   ? 0x00310002
    282282                                   : SUPDRV_IOC_VERSION & 0xffff0000;
    283283        CookieReq.u.In.u32MinVersion = uMinVersion;

  • trunk/src/VBox/VMM/VMMAll/CPUMAllRegs.cpp

    r90998 r91037  
    26262626        case VMX_VMCS64_CTRL_XSS_EXITING_BITMAP_FULL:
    26272627        case VMX_VMCS64_CTRL_XSS_EXITING_BITMAP_HIGH:     return pFeat->fVmxXsavesXrstors;
    2628         case VMX_VMCS64_CTRL_ENCLS_EXITING_BITMAP_FULL:
    2629         case VMX_VMCS64_CTRL_ENCLS_EXITING_BITMAP_HIGH:   return false;
    26302628        case VMX_VMCS64_CTRL_TSC_MULTIPLIER_FULL:
    26312629        case VMX_VMCS64_CTRL_TSC_MULTIPLIER_HIGH:         return pFeat->fVmxUseTscScaling;
     2630        case VMX_VMCS64_CTRL_PROC_EXEC3_FULL:
     2631        case VMX_VMCS64_CTRL_PROC_EXEC3_HIGH:             return pFeat->fVmxTertiaryExecCtls;
    26322632
    26332633        /* Read-only data fields. */
    … …  
    26442644        case VMX_VMCS64_GUEST_EFER_FULL:
    26452645        case VMX_VMCS64_GUEST_EFER_HIGH:                  return pFeat->fVmxEntryLoadEferMsr || pFeat->fVmxExitSaveEferMsr;
    2646         case VMX_VMCS64_GUEST_PERF_GLOBAL_CTRL_FULL:
    2647         case VMX_VMCS64_GUEST_PERF_GLOBAL_CTRL_HIGH:      return false;
    26482646        case VMX_VMCS64_GUEST_PDPTE0_FULL:
    26492647        case VMX_VMCS64_GUEST_PDPTE0_HIGH:
    … …  
    26542652        case VMX_VMCS64_GUEST_PDPTE3_FULL:
    26552653        case VMX_VMCS64_GUEST_PDPTE3_HIGH:                return pFeat->fVmxEpt;
    2656         case VMX_VMCS64_GUEST_BNDCFGS_FULL:
    2657         case VMX_VMCS64_GUEST_BNDCFGS_HIGH:               return false;
    26582654
    26592655        /* Host-state fields. */
    … …  
    26622658        case VMX_VMCS64_HOST_EFER_FULL:
    26632659        case VMX_VMCS64_HOST_EFER_HIGH:                   return pFeat->fVmxExitLoadEferMsr;
    2664         case VMX_VMCS64_HOST_PERF_GLOBAL_CTRL_FULL:
    2665         case VMX_VMCS64_HOST_PERF_GLOBAL_CTRL_HIGH:       return false;
    26662660
    26672661        /*

  • trunk/src/VBox/VMM/VMMAll/HMAll.cpp

    r87563 r91037  
    852852    pVmxMsrs->u64VmFunc        = pHwvirtMsrs->u.vmx.u64VmFunc;
    853853    pVmxMsrs->u64EptVpidCaps   = pHwvirtMsrs->u.vmx.u64EptVpidCaps;
     854    pVmxMsrs->u64ProcCtls3     = pHwvirtMsrs->u.vmx.u64ProcCtls3;
    854855}
    855856

  • trunk/src/VBox/VMM/VMMAll/HMVMXAll.cpp

    r87921 r91037  
    814814 * Dumps the virtual VMCS state to the release log.
    815815 *
     816 * This is a purely a convenience function to output to the release log because
     817 * cpumR3InfoVmxVmcs dumps only to the debug console and isn't always easy to use in
     818 * case of a crash.
     819 *
    816820 * @param   pVCpu   The cross context virtual CPU structure.
    817821 */

  • trunk/src/VBox/VMM/VMMAll/IEMAllCImplVmxInstr.cpp.h

    r87040 r91037  
    200200        /*  3-10 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    201201        /* 11-18 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    202         /* 19-25 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
     202        /* 19-26 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     203        /*    27 */ UINT16_MAX,
    203204    },
    204205    /* VMX_VMCSFIELD_WIDTH_16BIT | VMX_VMCSFIELD_TYPE_VMEXIT_INFO: */
    … …  
    207208        /*  8-15 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    208209        /* 16-23 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    209         /* 24-25 */ UINT16_MAX, UINT16_MAX
     210        /* 24-27 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
    210211    },
    211212    /* VMX_VMCSFIELD_WIDTH_16BIT | VMX_VMCSFIELD_TYPE_GUEST_STATE: */
    … …  
    222223        /*     9 */ RT_UOFFSETOF(VMXVVMCS, u16PmlIndex),
    223224        /* 10-17 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    224         /* 18-25 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
     225        /* 18-25 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     226        /* 26-27 */ UINT16_MAX, UINT16_MAX
    225227    },
    226228    /* VMX_VMCSFIELD_WIDTH_16BIT | VMX_VMCSFIELD_TYPE_HOST_STATE: */
    … …  
    235237        /*  7-14 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    236238        /* 15-22 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    237         /* 23-25 */ UINT16_MAX, UINT16_MAX, UINT16_MAX
     239        /* 23-27 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
    238240    },
    239241    /* VMX_VMCSFIELD_WIDTH_64BIT | VMX_VMCSFIELD_TYPE_CONTROL: */
    … …  
    264266        /*    23 */ RT_UOFFSETOF(VMXVVMCS, u64EnclsBitmap),
    265267        /*    24 */ RT_UOFFSETOF(VMXVVMCS, u64SpptPtr),
    266         /*    25 */ RT_UOFFSETOF(VMXVVMCS, u64TscMultiplier)
     268        /*    25 */ RT_UOFFSETOF(VMXVVMCS, u64TscMultiplier),
     269        /*    26 */ RT_UOFFSETOF(VMXVVMCS, u64ProcCtls3),
     270        /*    27 */ RT_UOFFSETOF(VMXVVMCS, u64EnclvExitBitmap)
    267271    },
    268272    /* VMX_VMCSFIELD_WIDTH_64BIT | VMX_VMCSFIELD_TYPE_VMEXIT_INFO: */
    … …  
    272276        /*  9-16 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    273277        /* 17-24 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    274         /*    25 */ UINT16_MAX
     278        /* 25-27 */ UINT16_MAX, UINT16_MAX, UINT16_MAX
    275279    },
    276280    /* VMX_VMCSFIELD_WIDTH_64BIT | VMX_VMCSFIELD_TYPE_GUEST_STATE: */
    … …  
    287291        /*     9 */ RT_UOFFSETOF(VMXVVMCS, u64GuestBndcfgsMsr),
    288292        /*    10 */ RT_UOFFSETOF(VMXVVMCS, u64GuestRtitCtlMsr),
    289         /* 11-18 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    290         /* 19-25 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
     293        /*    11 */ UINT16_MAX,
     294        /*    12 */ RT_UOFFSETOF(VMXVVMCS, u64GuestPkrsMsr),
     295        /* 13-20 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     296        /* 21-27 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
    291297    },
    292298    /* VMX_VMCSFIELD_WIDTH_64BIT | VMX_VMCSFIELD_TYPE_HOST_STATE: */
    … …  
    295301        /*     1 */ RT_UOFFSETOF(VMXVVMCS, u64HostEferMsr),
    296302        /*     2 */ RT_UOFFSETOF(VMXVVMCS, u64HostPerfGlobalCtlMsr),
    297         /*  3-10 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    298         /* 11-18 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    299         /* 19-25 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
     303        /*     3 */ RT_UOFFSETOF(VMXVVMCS, u64HostPkrsMsr),
     304        /*  4-11 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     305        /* 12-19 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     306        /* 20-27 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
    300307    },
    301308    /* VMX_VMCSFIELD_WIDTH_32BIT | VMX_VMCSFIELD_TYPE_CONTROL: */
    … …  
    319326        /*    16 */ RT_UOFFSETOF(VMXVVMCS, u32PleGap),
    320327        /*    17 */ RT_UOFFSETOF(VMXVVMCS, u32PleWindow),
    321         /* 18-25 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
     328        /* 18-25 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     329        /* 26-27 */ UINT16_MAX, UINT16_MAX
    322330    },
    323331    /* VMX_VMCSFIELD_WIDTH_32BIT | VMX_VMCSFIELD_TYPE_VMEXIT_INFO: */
    … …  
    333341        /*  8-15 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    334342        /* 16-23 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    335         /* 24-25 */ UINT16_MAX, UINT16_MAX
     343        /* 24-27 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
    336344    },
    337345    /* VMX_VMCSFIELD_WIDTH_32BIT | VMX_VMCSFIELD_TYPE_GUEST_STATE: */
    … …  
    361369        /*    22 */ UINT16_MAX,
    362370        /*    23 */ RT_UOFFSETOF(VMXVVMCS, u32PreemptTimer),
    363         /* 24-25 */ UINT16_MAX, UINT16_MAX
     371        /* 24-27 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
    364372    },
    365373    /* VMX_VMCSFIELD_WIDTH_32BIT | VMX_VMCSFIELD_TYPE_HOST_STATE: */
    … …  
    369377        /*  9-16 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    370378        /* 17-24 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    371         /*    25 */ UINT16_MAX
     379        /* 25-27 */ UINT16_MAX, UINT16_MAX, UINT16_MAX
    372380    },
    373381    /* VMX_VMCSFIELD_WIDTH_NATURAL | VMX_VMCSFIELD_TYPE_CONTROL: */
    … …  
    383391        /*  8-15 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    384392        /* 16-23 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    385         /* 24-25 */ UINT16_MAX, UINT16_MAX
     393        /* 24-27 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
    386394    },
    387395    /* VMX_VMCSFIELD_WIDTH_NATURAL | VMX_VMCSFIELD_TYPE_VMEXIT_INFO: */
    … …  
    395403        /*  6-13 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    396404        /* 14-21 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    397         /* 22-25 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
     405        /* 22-27 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
    398406    },
    399407    /* VMX_VMCSFIELD_WIDTH_NATURAL | VMX_VMCSFIELD_TYPE_GUEST_STATE: */
    … …  
    419427        /*    18 */ RT_UOFFSETOF(VMXVVMCS, u64GuestSysenterEsp),
    420428        /*    19 */ RT_UOFFSETOF(VMXVVMCS, u64GuestSysenterEip),
    421         /* 20-25 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
     429        /*    20 */ RT_UOFFSETOF(VMXVVMCS, u64GuestSCetMsr),
     430        /*    21 */ RT_UOFFSETOF(VMXVVMCS, u64GuestSsp),
     431        /*    22 */ RT_UOFFSETOF(VMXVVMCS, u64GuestIntrSspTblAddrMsr),
     432        /* 23-27 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
    422433    },
    423434    /* VMX_VMCSFIELD_WIDTH_NATURAL | VMX_VMCSFIELD_TYPE_HOST_STATE: */
    … …  
    435446        /*    10 */ RT_UOFFSETOF(VMXVVMCS, u64HostRsp),
    436447        /*    11 */ RT_UOFFSETOF(VMXVVMCS, u64HostRip),
    437         /* 12-19 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
    438         /* 20-25 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
     448        /*    12 */ RT_UOFFSETOF(VMXVVMCS, u64HostSCetMsr),
     449        /*    13 */ RT_UOFFSETOF(VMXVVMCS, u64HostSsp),
     450        /*    14 */ RT_UOFFSETOF(VMXVVMCS, u64HostIntrSspTblAddrMsr),
     451        /* 15-22 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
     452        /* 23-27 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
    439453    }
    440454};

  • trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp

    r90947 r91037  
    843843    /* 67  VMX_EXIT_UMWAIT                  */  { hmR0VmxExitErrUnexpected },
    844844    /* 68  VMX_EXIT_TPAUSE                  */  { hmR0VmxExitErrUnexpected },
     845    /* 69  VMX_EXIT_LOADIWKEY               */  { hmR0VmxExitErrUnexpected },
    845846};
    846847#endif /* HMVMX_USE_FUNCTION_TABLE */
    … …  
    1308013081        case VMX_EXIT_UMWAIT:
    1308113082        case VMX_EXIT_TPAUSE:
     13083        case VMX_EXIT_LOADIWKEY:
    1308213084        default:
    1308313085            return hmR0VmxExitErrUnexpected(pVCpu, pVmxTransient);
    … …  
    1534815350     * VMX_EXIT_UMWAIT:
    1534915351     * VMX_EXIT_TPAUSE:
     15352     * VMX_EXIT_LOADIWKEY:
    1535015353     *    These VM-exits are -not- caused unconditionally by execution of the corresponding
    1535115354     *    instruction. Any VM-exit for these instructions indicate a hardware problem,
    … …  
    1766117664            Assert(CPUMIsGuestVmxProcCtls2Set(pCtx, VMX_PROC_CTLS2_USER_WAIT_PAUSE));
    1766217665            break;
     17666
     17667        case VMX_EXIT_LOADIWKEY:
     17668            Assert(CPUMIsGuestVmxProcCtls3Set(pCtx, VMX_PROC_CTLS3_LOADIWKEY_EXIT));
     17669            break;
    1766317670    }
    1766417671#endif

  • trunk/src/VBox/VMM/VMMR3/CPUM.cpp

    r90914 r91037  
    410410    SSMFIELD_ENTRY(       VMXVVMCS, u64SpptPtr),
    411411    SSMFIELD_ENTRY(       VMXVVMCS, u64TscMultiplier),
     412    SSMFIELD_ENTRY_VER(   VMXVVMCS, u64ProcCtls3,               CPUM_SAVED_STATE_VERSION_HWVIRT_VMX_2),
     413    SSMFIELD_ENTRY_VER(   VMXVVMCS, u64EnclvExitBitmap,         CPUM_SAVED_STATE_VERSION_HWVIRT_VMX_2),
    412414    SSMFIELD_ENTRY_IGNORE(VMXVVMCS, au64Reserved0),
    413415
    … …  
    437439    SSMFIELD_ENTRY(       VMXVVMCS, u64HostEferMsr),
    438440    SSMFIELD_ENTRY(       VMXVVMCS, u64HostPerfGlobalCtlMsr),
     441    SSMFIELD_ENTRY_VER(   VMXVVMCS, u64HostPkrsMsr,             CPUM_SAVED_STATE_VERSION_HWVIRT_VMX_2),
    439442    SSMFIELD_ENTRY_IGNORE(VMXVVMCS, au64Reserved3),
    440443
    … …  
    451454    SSMFIELD_ENTRY(       VMXVVMCS, u64HostRsp),
    452455    SSMFIELD_ENTRY(       VMXVVMCS, u64HostRip),
     456    SSMFIELD_ENTRY_VER(   VMXVVMCS, u64HostSCetMsr,             CPUM_SAVED_STATE_VERSION_HWVIRT_VMX_2),
     457    SSMFIELD_ENTRY_VER(   VMXVVMCS, u64HostSsp,                 CPUM_SAVED_STATE_VERSION_HWVIRT_VMX_2),
     458    SSMFIELD_ENTRY_VER(   VMXVVMCS, u64HostIntrSspTblAddrMsr,   CPUM_SAVED_STATE_VERSION_HWVIRT_VMX_2),
    453459    SSMFIELD_ENTRY_IGNORE(VMXVVMCS, au64Reserved7),
    454460
    … …  
    501507    SSMFIELD_ENTRY(       VMXVVMCS, u64GuestBndcfgsMsr),
    502508    SSMFIELD_ENTRY(       VMXVVMCS, u64GuestRtitCtlMsr),
     509    SSMFIELD_ENTRY_VER(   VMXVVMCS, u64GuestPkrsMsr,            CPUM_SAVED_STATE_VERSION_HWVIRT_VMX_2),
    503510    SSMFIELD_ENTRY_IGNORE(VMXVVMCS, au64Reserved2),
    504511
    … …  
    523530    SSMFIELD_ENTRY(       VMXVVMCS, u64GuestSysenterEsp),
    524531    SSMFIELD_ENTRY(       VMXVVMCS, u64GuestSysenterEip),
     532    SSMFIELD_ENTRY_VER(   VMXVVMCS, u64GuestSCetMsr,            CPUM_SAVED_STATE_VERSION_HWVIRT_VMX_2),
     533    SSMFIELD_ENTRY_VER(   VMXVVMCS, u64GuestSsp,                CPUM_SAVED_STATE_VERSION_HWVIRT_VMX_2),
     534    SSMFIELD_ENTRY_VER(   VMXVVMCS, u64GuestIntrSspTblAddrMsr,  CPUM_SAVED_STATE_VERSION_HWVIRT_VMX_2),
    525535    SSMFIELD_ENTRY_IGNORE(VMXVVMCS, au64Reserved6),
    526536
    … …  
    16121622                                 | (pGuestFeatures->fVmxCr3LoadExit       << VMX_BF_PROC_CTLS_CR3_LOAD_EXIT_SHIFT     )
    16131623                                 | (pGuestFeatures->fVmxCr3StoreExit      << VMX_BF_PROC_CTLS_CR3_STORE_EXIT_SHIFT    )
     1624                                 | (pGuestFeatures->fVmxTertiaryExecCtls  << VMX_BF_PROC_CTLS_USE_TERTIARY_CTLS_SHIFT )
    16141625                                 | (pGuestFeatures->fVmxCr8LoadExit       << VMX_BF_PROC_CTLS_CR8_LOAD_EXIT_SHIFT     )
    16151626                                 | (pGuestFeatures->fVmxCr8StoreExit      << VMX_BF_PROC_CTLS_CR8_STORE_EXIT_SHIFT    )
    … …  
    16591670    }
    16601671
     1672    /* Tertiary processor-based VM-execution controls. */
     1673    if (pGuestFeatures->fVmxTertiaryExecCtls)
     1674    {
     1675        pGuestVmxMsrs->u64ProcCtls3 = (pGuestFeatures->fVmxLoadIwKeyExit  << VMX_BF_PROC_CTLS3_LOADIWKEY_EXIT_SHIFT);
     1676    }
     1677
    16611678    /* VM-exit controls. */
    16621679    {
    … …  
    17731790static bool cpumR3AreVmxCpuFeaturesCompatible(PVM pVM, PCCPUMFEATURES pBase, PCCPUMFEATURES pGst)
    17741791{
    1775     if (cpumR3IsHwAssistNstGstExecAllowed(pVM))
     1792    if (!cpumR3IsHwAssistNstGstExecAllowed(pVM))
     1793        return false;
     1794
     1795    /* Check first set of feature bits. */
    17761796    {
    17771797        uint64_t const fBase = ((uint64_t)pBase->fVmxInsOutInfo         <<  0) | ((uint64_t)pBase->fVmxExtIntExit         <<  1)
    … …  
    18441864        {
    18451865            uint64_t const fDiff = fBase ^ fGst;
    1846             LogRel(("CPUM: VMX features now exposed to the guest are incompatible with those from the saved state. fBase=%#RX64 fGst=%#RX64 fDiff=%#RX64\n",
     1866            LogRel(("CPUM: VMX features (1) now exposed to the guest are incompatible with those from the saved state. fBase=%#RX64 fGst=%#RX64 fDiff=%#RX64\n",
    18471867                    fBase, fGst, fDiff));
    18481868            return false;
    18491869        }
    1850         return true;
    1851     }
     1870    }
     1871
     1872    /* Check second set of feature bits. */
     1873    {
     1874        uint64_t const fBase = ((uint64_t)pBase->fVmxTertiaryExecCtls   <<  0) | ((uint64_t)pBase->fVmxLoadIwKeyExit      <<  1);
     1875        uint64_t const fGst  = ((uint64_t)pGst->fVmxTertiaryExecCtls    <<  0) | ((uint64_t)pGst->fVmxLoadIwKeyExit       <<  1);
     1876        if ((fBase | fGst) != fBase)
     1877        {
     1878            uint64_t const fDiff = fBase ^ fGst;
     1879            LogRel(("CPUM: VMX features (2) now exposed to the guest are incompatible with those from the saved state. fBase=%#RX64 fGst=%#RX64 fDiff=%#RX64\n",
     1880                    fBase, fGst, fDiff));
     1881            return false;
     1882        }
     1883    }
     1884
    18521885    return true;
    18531886}
    … …  
    18921925    EmuFeat.fVmxCr3LoadExit           = 1;
    18931926    EmuFeat.fVmxCr3StoreExit          = 1;
     1927    EmuFeat.fVmxTertiaryExecCtls      = 0;
    18941928    EmuFeat.fVmxCr8LoadExit           = 1;
    18951929    EmuFeat.fVmxCr8StoreExit          = 1;
    … …  
    19241958    EmuFeat.fVmxXsavesXrstors         = 0;
    19251959    EmuFeat.fVmxUseTscScaling         = 0;
     1960    EmuFeat.fVmxLoadIwKeyExit         = 0;
    19261961    EmuFeat.fVmxEntryLoadDebugCtls    = 1;
    19271962    EmuFeat.fVmxIa32eModeGuest        = 1;
    … …  
    19652000    pGuestFeat->fVmxCr3LoadExit           = (pBaseFeat->fVmxCr3LoadExit           & EmuFeat.fVmxCr3LoadExit          );
    19662001    pGuestFeat->fVmxCr3StoreExit          = (pBaseFeat->fVmxCr3StoreExit          & EmuFeat.fVmxCr3StoreExit         );
     2002    pGuestFeat->fVmxTertiaryExecCtls      = (pBaseFeat->fVmxTertiaryExecCtls      & EmuFeat.fVmxTertiaryExecCtls     );
    19672003    pGuestFeat->fVmxCr8LoadExit           = (pBaseFeat->fVmxCr8LoadExit           & EmuFeat.fVmxCr8LoadExit          );
    19682004    pGuestFeat->fVmxCr8StoreExit          = (pBaseFeat->fVmxCr8StoreExit          & EmuFeat.fVmxCr8StoreExit         );
    … …  
    19972033    pGuestFeat->fVmxXsavesXrstors         = (pBaseFeat->fVmxXsavesXrstors         & EmuFeat.fVmxXsavesXrstors        );
    19982034    pGuestFeat->fVmxUseTscScaling         = (pBaseFeat->fVmxUseTscScaling         & EmuFeat.fVmxUseTscScaling        );
     2035    pGuestFeat->fVmxLoadIwKeyExit         = (pBaseFeat->fVmxLoadIwKeyExit         & EmuFeat.fVmxLoadIwKeyExit        );
    19992036    pGuestFeat->fVmxEntryLoadDebugCtls    = (pBaseFeat->fVmxEntryLoadDebugCtls    & EmuFeat.fVmxEntryLoadDebugCtls   );
    20002037    pGuestFeat->fVmxIa32eModeGuest        = (pBaseFeat->fVmxIa32eModeGuest        & EmuFeat.fVmxIa32eModeGuest       );
    … …  
    20462083        Assert(!pGuestFeat->fVmxUseTscScaling);
    20472084    }
     2085    if (!pGuestFeat->fVmxTertiaryExecCtls)
     2086        Assert(!pGuestFeat->fVmxLoadIwKeyExit);
    20482087    if (pGuestFeat->fVmxUnrestrictedGuest)
    20492088    {
    … …  
    26602699            SSMR3PutU64(pSSM,      pGstCtx->hwvirt.vmx.Msrs.u64VmFunc);
    26612700            SSMR3PutU64(pSSM,      pGstCtx->hwvirt.vmx.Msrs.u64EptVpidCaps);
     2701            SSMR3PutU64(pSSM,      pGstCtx->hwvirt.vmx.Msrs.u64ProcCtls3);
    26622702        }
    26632703        SSMR3PutU32(pSSM, pVCpu->cpum.s.fUseFlags);
    … …  
    26932733     * Validate version.
    26942734     */
    2695     if (    uVersion != CPUM_SAVED_STATE_VERSION_HWVIRT_VMX
     2735    if (    uVersion != CPUM_SAVED_STATE_VERSION_HWVIRT_VMX_2
     2736        &&  uVersion != CPUM_SAVED_STATE_VERSION_HWVIRT_VMX
    26962737        &&  uVersion != CPUM_SAVED_STATE_VERSION_HWVIRT_SVM
    26972738        &&  uVersion != CPUM_SAVED_STATE_VERSION_XSAVE
    … …  
    29402981                        SSMR3GetU64(pSSM,      &pGstCtx->hwvirt.vmx.Msrs.u64VmFunc);
    29412982                        SSMR3GetU64(pSSM,      &pGstCtx->hwvirt.vmx.Msrs.u64EptVpidCaps);
     2983                        if (uVersion >= CPUM_SAVED_STATE_VERSION_HWVIRT_VMX_2)
     2984                            SSMR3GetU64(pSSM,  &pGstCtx->hwvirt.vmx.Msrs.u64ProcCtls3);
    29422985                    }
    29432986                }
    … …  
    38583901        pHlp->pfnPrintf(pHlp, "  %sSPPT ptr                   = %#RX64\n",   pszPrefix, pVmcs->u64SpptPtr.u);
    38593902        pHlp->pfnPrintf(pHlp, "  %sTSC multiplier             = %#RX64\n",   pszPrefix, pVmcs->u64TscMultiplier.u);
     3903        pHlp->pfnPrintf(pHlp, "  %sTertiary processor ctls    = %#RX64\n",   pszPrefix, pVmcs->u64ProcCtls3.u);
     3904        pHlp->pfnPrintf(pHlp, "  %sENCLV-exiting bitmap       = %#RX64\n",   pszPrefix, pVmcs->u64EnclvExitBitmap.u);
    38603905
    38613906        /* Natural width. */
    … …  
    38773922
    38783923        /* 16-bit. */
    3879         CPUMVMX_DUMP_GUEST_SEGREG(pHlp, pVmcs, Cs,   "cs",   pszPrefix);
    3880         CPUMVMX_DUMP_GUEST_SEGREG(pHlp, pVmcs, Ss,   "ss",   pszPrefix);
    3881         CPUMVMX_DUMP_GUEST_SEGREG(pHlp, pVmcs, Es,   "es",   pszPrefix);
    3882         CPUMVMX_DUMP_GUEST_SEGREG(pHlp, pVmcs, Ds,   "ds",   pszPrefix);
    3883         CPUMVMX_DUMP_GUEST_SEGREG(pHlp, pVmcs, Fs,   "fs",   pszPrefix);
    3884         CPUMVMX_DUMP_GUEST_SEGREG(pHlp, pVmcs, Gs,   "gs",   pszPrefix);
    3885         CPUMVMX_DUMP_GUEST_SEGREG(pHlp, pVmcs, Ldtr, "ldtr", pszPrefix);
    3886         CPUMVMX_DUMP_GUEST_SEGREG(pHlp, pVmcs, Tr,   "tr",   pszPrefix);
    3887         CPUMVMX_DUMP_GUEST_XDTR(pHlp,   pVmcs, Gdtr, "gdtr", pszPrefix);
    3888         CPUMVMX_DUMP_GUEST_XDTR(pHlp,   pVmcs, Idtr, "idtr", pszPrefix);
     3924        CPUMVMX_DUMP_GUEST_SEGREG(pHlp, pVmcs, Cs,   "CS",   pszPrefix);
     3925        CPUMVMX_DUMP_GUEST_SEGREG(pHlp, pVmcs, Ss,   "SS",   pszPrefix);
     3926        CPUMVMX_DUMP_GUEST_SEGREG(pHlp, pVmcs, Es,   "ES",   pszPrefix);
     3927        CPUMVMX_DUMP_GUEST_SEGREG(pHlp, pVmcs, Ds,   "DS",   pszPrefix);
     3928        CPUMVMX_DUMP_GUEST_SEGREG(pHlp, pVmcs, Fs,   "FS",   pszPrefix);
     3929        CPUMVMX_DUMP_GUEST_SEGREG(pHlp, pVmcs, Gs,   "GS",   pszPrefix);
     3930        CPUMVMX_DUMP_GUEST_SEGREG(pHlp, pVmcs, Ldtr, "LDTR", pszPrefix);
     3931        CPUMVMX_DUMP_GUEST_SEGREG(pHlp, pVmcs, Tr,   "TR",   pszPrefix);
     3932        CPUMVMX_DUMP_GUEST_XDTR(pHlp,   pVmcs, Gdtr, "GDTR", pszPrefix);
     3933        CPUMVMX_DUMP_GUEST_XDTR(pHlp,   pVmcs, Idtr, "IDTR", pszPrefix);
    38893934        pHlp->pfnPrintf(pHlp, "  %sInterrupt status           = %#RX16\n",   pszPrefix, pVmcs->u16GuestIntStatus);
    38903935        pHlp->pfnPrintf(pHlp, "  %sPML index                  = %#RX16\n",   pszPrefix, pVmcs->u16PmlIndex);
    … …  
    39093954        pHlp->pfnPrintf(pHlp, "  %sBNDCFGS                    = %#RX64\n",   pszPrefix, pVmcs->u64GuestBndcfgsMsr.u);
    39103955        pHlp->pfnPrintf(pHlp, "  %sRTIT_CTL                   = %#RX64\n",   pszPrefix, pVmcs->u64GuestRtitCtlMsr.u);
     3956        pHlp->pfnPrintf(pHlp, "  %sPKRS                       = %#RX64\n",   pszPrefix, pVmcs->u64GuestPkrsMsr.u);
    39113957
    39123958        /* Natural width. */
    3913         pHlp->pfnPrintf(pHlp, "  %scr0                        = %#RX64\n",   pszPrefix, pVmcs->u64GuestCr0.u);
    3914         pHlp->pfnPrintf(pHlp, "  %scr3                        = %#RX64\n",   pszPrefix, pVmcs->u64GuestCr3.u);
    3915         pHlp->pfnPrintf(pHlp, "  %scr4                        = %#RX64\n",   pszPrefix, pVmcs->u64GuestCr4.u);
    3916         pHlp->pfnPrintf(pHlp, "  %sdr7                        = %#RX64\n",   pszPrefix, pVmcs->u64GuestDr7.u);
    3917         pHlp->pfnPrintf(pHlp, "  %srsp                        = %#RX64\n",   pszPrefix, pVmcs->u64GuestRsp.u);
    3918         pHlp->pfnPrintf(pHlp, "  %srip                        = %#RX64\n",   pszPrefix, pVmcs->u64GuestRip.u);
    3919         pHlp->pfnPrintf(pHlp, "  %srflags                     = %#RX64 %31s\n",pszPrefix, pVmcs->u64GuestRFlags.u, szEFlags);
     3959        pHlp->pfnPrintf(pHlp, "  %sCR0                        = %#RX64\n",   pszPrefix, pVmcs->u64GuestCr0.u);
     3960        pHlp->pfnPrintf(pHlp, "  %sCR3                        = %#RX64\n",   pszPrefix, pVmcs->u64GuestCr3.u);
     3961        pHlp->pfnPrintf(pHlp, "  %sCR4                        = %#RX64\n",   pszPrefix, pVmcs->u64GuestCr4.u);
     3962        pHlp->pfnPrintf(pHlp, "  %sDR7                        = %#RX64\n",   pszPrefix, pVmcs->u64GuestDr7.u);
     3963        pHlp->pfnPrintf(pHlp, "  %sRSP                        = %#RX64\n",   pszPrefix, pVmcs->u64GuestRsp.u);
     3964        pHlp->pfnPrintf(pHlp, "  %sRIP                        = %#RX64\n",   pszPrefix, pVmcs->u64GuestRip.u);
     3965        pHlp->pfnPrintf(pHlp, "  %sRFLAGS                     = %#RX64 %31s\n",pszPrefix, pVmcs->u64GuestRFlags.u, szEFlags);
    39203966        pHlp->pfnPrintf(pHlp, "  %sPending debug xcpts        = %#RX64\n",   pszPrefix, pVmcs->u64GuestPendingDbgXcpts.u);
    39213967        pHlp->pfnPrintf(pHlp, "  %sSysEnter ESP               = %#RX64\n",   pszPrefix, pVmcs->u64GuestSysenterEsp.u);
    39223968        pHlp->pfnPrintf(pHlp, "  %sSysEnter EIP               = %#RX64\n",   pszPrefix, pVmcs->u64GuestSysenterEip.u);
     3969        pHlp->pfnPrintf(pHlp, "  %sS_CET                      = %#RX64\n",   pszPrefix, pVmcs->u64GuestSCetMsr.u);
     3970        pHlp->pfnPrintf(pHlp, "  %sSSP                        = %#RX64\n",   pszPrefix, pVmcs->u64GuestSsp.u);
     3971        pHlp->pfnPrintf(pHlp, "  %sINTERRUPT_SSP_TABLE_ADDR   = %#RX64\n",   pszPrefix, pVmcs->u64GuestIntrSspTblAddrMsr.u);
    39233972    }
    39243973
    … …  
    39283977
    39293978        /* 16-bit. */
    3930         pHlp->pfnPrintf(pHlp, "  %scs                         = %#RX16\n",   pszPrefix, pVmcs->HostCs);
    3931         pHlp->pfnPrintf(pHlp, "  %sss                         = %#RX16\n",   pszPrefix, pVmcs->HostSs);
    3932         pHlp->pfnPrintf(pHlp, "  %sds                         = %#RX16\n",   pszPrefix, pVmcs->HostDs);
    3933         pHlp->pfnPrintf(pHlp, "  %ses                         = %#RX16\n",   pszPrefix, pVmcs->HostEs);
    3934         CPUMVMX_DUMP_HOST_FS_GS_TR(pHlp, pVmcs, Fs, "fs", pszPrefix);
    3935         CPUMVMX_DUMP_HOST_FS_GS_TR(pHlp, pVmcs, Gs, "gs", pszPrefix);
    3936         CPUMVMX_DUMP_HOST_FS_GS_TR(pHlp, pVmcs, Tr, "tr", pszPrefix);
    3937         CPUMVMX_DUMP_HOST_XDTR(pHlp, pVmcs, Gdtr, "gdtr", pszPrefix);
    3938         CPUMVMX_DUMP_HOST_XDTR(pHlp, pVmcs, Idtr, "idtr", pszPrefix);
     3979        pHlp->pfnPrintf(pHlp, "  %sCS                         = %#RX16\n",   pszPrefix, pVmcs->HostCs);
     3980        pHlp->pfnPrintf(pHlp, "  %sSS                         = %#RX16\n",   pszPrefix, pVmcs->HostSs);
     3981        pHlp->pfnPrintf(pHlp, "  %sDS                         = %#RX16\n",   pszPrefix, pVmcs->HostDs);
     3982        pHlp->pfnPrintf(pHlp, "  %sES                         = %#RX16\n",   pszPrefix, pVmcs->HostEs);
     3983        CPUMVMX_DUMP_HOST_FS_GS_TR(pHlp, pVmcs, Fs, "FS", pszPrefix);
     3984        CPUMVMX_DUMP_HOST_FS_GS_TR(pHlp, pVmcs, Gs, "GS", pszPrefix);
     3985        CPUMVMX_DUMP_HOST_FS_GS_TR(pHlp, pVmcs, Tr, "TR", pszPrefix);
     3986        CPUMVMX_DUMP_HOST_XDTR(pHlp, pVmcs, Gdtr, "GDTR", pszPrefix);
     3987        CPUMVMX_DUMP_HOST_XDTR(pHlp, pVmcs, Idtr, "IDTR", pszPrefix);
    39393988
    39403989        /* 32-bit. */
    … …  
    39453994        pHlp->pfnPrintf(pHlp, "  %sPAT                        = %#RX64\n",   pszPrefix, pVmcs->u64HostPatMsr.u);
    39463995        pHlp->pfnPrintf(pHlp, "  %sPERFGLOBALCTRL             = %#RX64\n",   pszPrefix, pVmcs->u64HostPerfGlobalCtlMsr.u);
     3996        pHlp->pfnPrintf(pHlp, "  %sPKRS                       = %#RX64\n",   pszPrefix, pVmcs->u64HostPkrsMsr.u);
    39473997
    39483998        /* Natural width. */
    3949         pHlp->pfnPrintf(pHlp, "  %scr0                        = %#RX64\n",   pszPrefix, pVmcs->u64HostCr0.u);
    3950         pHlp->pfnPrintf(pHlp, "  %scr3                        = %#RX64\n",   pszPrefix, pVmcs->u64HostCr3.u);
    3951         pHlp->pfnPrintf(pHlp, "  %scr4                        = %#RX64\n",   pszPrefix, pVmcs->u64HostCr4.u);
     3999        pHlp->pfnPrintf(pHlp, "  %sCR0                        = %#RX64\n",   pszPrefix, pVmcs->u64HostCr0.u);
     4000        pHlp->pfnPrintf(pHlp, "  %sCR3                        = %#RX64\n",   pszPrefix, pVmcs->u64HostCr3.u);
     4001        pHlp->pfnPrintf(pHlp, "  %sCR4                        = %#RX64\n",   pszPrefix, pVmcs->u64HostCr4.u);
    39524002        pHlp->pfnPrintf(pHlp, "  %sSysEnter ESP               = %#RX64\n",   pszPrefix, pVmcs->u64HostSysenterEsp.u);
    39534003        pHlp->pfnPrintf(pHlp, "  %sSysEnter EIP               = %#RX64\n",   pszPrefix, pVmcs->u64HostSysenterEip.u);
    3954         pHlp->pfnPrintf(pHlp, "  %srsp                        = %#RX64\n",   pszPrefix, pVmcs->u64HostRsp.u);
    3955         pHlp->pfnPrintf(pHlp, "  %srip                        = %#RX64\n",   pszPrefix, pVmcs->u64HostRip.u);
     4004        pHlp->pfnPrintf(pHlp, "  %sRSP                        = %#RX64\n",   pszPrefix, pVmcs->u64HostRsp.u);
     4005        pHlp->pfnPrintf(pHlp, "  %sRIP                        = %#RX64\n",   pszPrefix, pVmcs->u64HostRip.u);
     4006        pHlp->pfnPrintf(pHlp, "  %sS_CET                      = %#RX64\n",   pszPrefix, pVmcs->u64HostSCetMsr.u);
     4007        pHlp->pfnPrintf(pHlp, "  %sSSP                        = %#RX64\n",   pszPrefix, pVmcs->u64HostSsp.u);
     4008        pHlp->pfnPrintf(pHlp, "  %sINTERRUPT_SSP_TBL_ADDR     = %#RX64\n",   pszPrefix, pVmcs->u64HostIntrSspTblAddrMsr.u);
     4009
    39564010    }
    39574011

  • trunk/src/VBox/VMM/VMMR3/CPUMR3CpuId.cpp

    r90204 r91037  
    17731773        pFeatures->fVmxCr3LoadExit           = RT_BOOL(fProcCtls & VMX_PROC_CTLS_CR3_LOAD_EXIT);
    17741774        pFeatures->fVmxCr3StoreExit          = RT_BOOL(fProcCtls & VMX_PROC_CTLS_CR3_STORE_EXIT);
     1775        pFeatures->fVmxTertiaryExecCtls      = RT_BOOL(fProcCtls & VMX_PROC_CTLS_USE_TERTIARY_CTLS);
    17751776        pFeatures->fVmxCr8LoadExit           = RT_BOOL(fProcCtls & VMX_PROC_CTLS_CR8_LOAD_EXIT);
    17761777        pFeatures->fVmxCr8StoreExit          = RT_BOOL(fProcCtls & VMX_PROC_CTLS_CR8_STORE_EXIT);
    … …  
    18101811        pFeatures->fVmxXsavesXrstors         = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_XSAVES_XRSTORS);
    18111812        pFeatures->fVmxUseTscScaling         = RT_BOOL(fProcCtls2 & VMX_PROC_CTLS2_TSC_SCALING);
     1813    }
     1814
     1815    /* Tertiary processor-based VM-execution controls. */
     1816    {
     1817        uint64_t const fProcCtls3 = pFeatures->fVmxTertiaryExecCtls ? pVmxMsrs->u64ProcCtls3 : 0;
    18121818    }
    18131819

  • trunk/src/VBox/VMM/VMMR3/HM.cpp

    r89976 r91037  
    13561356
    13571357/**
     1358 * Reports MSR_IA32_VMX_PROCBASED_CTLS3 MSR to the log.
     1359 *
     1360 * @param   uProcCtls3    The tertiary processor-based VM-execution control MSR.
     1361 */
     1362static void hmR3VmxReportProcBasedCtls3Msr(uint64_t uProcCtls3)
     1363{
     1364    LogRel(("HM: MSR_IA32_VMX_PROCBASED_CTLS3      = %#RX64\n", uProcCtls3));
     1365    LogRel(("HM:   LOADIWKEY_EXIT                    = %RTbool\n", RT_BOOL(uProcCtls3 & VMX_PROC_CTLS3_LOADIWKEY_EXIT)));
     1366}
     1367
     1368
     1369/**
    13581370 * Reports MSR_IA32_VMX_ENTRY_CTLS to the log.
    13591371 *
    … …  
    15281540    if (pVM->hm.s.ForR3.vmx.Msrs.ProcCtls.n.allowed1 & VMX_PROC_CTLS_USE_SECONDARY_CTLS)
    15291541        hmR3VmxReportProcBasedCtls2Msr(&pVM->hm.s.ForR3.vmx.Msrs.ProcCtls2);
     1542    if (pVM->hm.s.ForR3.vmx.Msrs.ProcCtls.n.allowed1 & VMX_PROC_CTLS_USE_TERTIARY_CTLS)
     1543        hmR3VmxReportProcBasedCtls3Msr(pVM->hm.s.ForR3.vmx.Msrs.u64ProcCtls3);
    15301544
    15311545    hmR3VmxReportEntryCtlsMsr(&pVM->hm.s.ForR3.vmx.Msrs.EntryCtls);

  • trunk/src/VBox/VMM/include/CPUMInternal.h

    r90914 r91037  
    115115 * @{ */
    116116/** The current saved state version. */
    117 #define CPUM_SAVED_STATE_VERSION                CPUM_SAVED_STATE_VERSION_HWVIRT_VMX
     117#define CPUM_SAVED_STATE_VERSION                CPUM_SAVED_STATE_VERSION_HWVIRT_VMX_2
     118/** The saved state version with more virtual VMCS fields and CPUMCTX VMX fields. */
     119#define CPUM_SAVED_STATE_VERSION_HWVIRT_VMX_2   20
    118120/** The saved state version including VMX hardware virtualization state. */
    119121#define CPUM_SAVED_STATE_VERSION_HWVIRT_VMX     19
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