- Timestamp:
- Aug 11, 2021 9:15:42 PM (3 years ago)
- Location:
- trunk
- Files:
-
- 5 edited
-
include/iprt/critsect.h (modified) (3 diffs)
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src/VBox/Runtime/generic/critsectrw-generic.cpp (modified) (46 diffs)
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src/VBox/VMM/VMMAll/PDMAllCritSectRw.cpp (modified) (38 diffs)
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src/VBox/VMM/VMMR3/PDMCritSect.cpp (modified) (6 diffs)
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src/VBox/VMM/include/PDMInternal.h (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
-
trunk/include/iprt/critsect.h
r90398 r90637 397 397 uint16_t fFlags; 398 398 399 /** The state variable.400 * All accesses are atomic and it bits are defined like this:401 * Bits 0..14 - cReads.402 * Bit 15 - Unused.403 * Bits 16..31 - cWrites. - doesn't make sense here404 * Bit 31 - fDirection; 0=Read, 1=Write.405 * Bits 32..46 - cWaitingReads406 * Bit 47 - Unused.407 * Bits 48..62 - cWaitingWrites408 * Bit 63 - Unused.409 */410 uint64_t volatile u64State;411 /** The write owner. */412 RTNATIVETHREAD volatile hNativeWriter;413 399 /** The number of reads made by the current writer. */ 414 400 uint32_t volatile cWriterReads; … … 416 402 * of the lock counts as the first one.) */ 417 403 uint32_t volatile cWriteRecursions; 404 /** Union that allows us to atomically update both the state and 405 * exclusive owner if the hardware supports cmpxchg16b or similar. */ 406 union 407 { 408 struct 409 { 410 /** The state variable. 411 * All accesses are atomic and it bits are defined like this: 412 * Bits 0..14 - cReads. 413 * Bit 15 - Unused. 414 * Bits 16..31 - cWrites. 415 * Bit 31 - fDirection; 0=Read, 1=Write. 416 * Bits 32..46 - cWaitingReads 417 * Bit 47 - Unused. 418 * Bits 48..62 - cWaitingWrites - doesn't make sense here, not used. 419 * Bit 63 - Unused. 420 */ 421 uint64_t volatile u64State; 422 /** The write owner. */ 423 RTNATIVETHREAD volatile hNativeWriter; 424 } s; 425 RTUINT128U volatile u128; 426 } u; 418 427 419 428 /** What the writer threads are blocking on. */ … … 427 436 /** The validator record for the readers. */ 428 437 R3R0PTRTYPE(PRTLOCKVALRECSHRD) pValidatorRead; 429 #if HC_ARCH_BITS == 32430 /** Size padding. */431 RTHCPTR HCPtrPadding;432 #endif433 438 } RTCRITSECTRW; 434 439 AssertCompileSize(RTCRITSECTRW, HC_ARCH_BITS == 32 ? 48 : 64); -
trunk/src/VBox/Runtime/generic/critsectrw-generic.cpp
r82968 r90637 107 107 pThis->fFlags = (uint16_t)(fFlags & ~RTCRITSECT_FLAGS_RING0); 108 108 #endif 109 pThis->u64State = 0; 110 pThis->hNativeWriter = NIL_RTNATIVETHREAD; 109 pThis->u.u128.s.Hi = 0; 110 pThis->u.u128.s.Lo = 0; 111 pThis->u.s.hNativeWriter= NIL_RTNATIVETHREAD; 112 AssertCompile(sizeof(pThis->u.u128) >= sizeof(pThis->u.s)); 111 113 pThis->cWriterReads = 0; 112 114 pThis->cWriteRecursions = 0; … … 115 117 pThis->pValidatorWrite = NULL; 116 118 pThis->pValidatorRead = NULL; 117 #if HC_ARCH_BITS == 32118 pThis->HCPtrPadding = NIL_RTHCPTR;119 #endif120 119 121 120 #ifdef RTCRITSECTRW_STRICT … … 216 215 int rc9; 217 216 RTNATIVETHREAD hNativeWriter; 218 ASMAtomicUoReadHandle(&pThis-> hNativeWriter, &hNativeWriter);217 ASMAtomicUoReadHandle(&pThis->u.s.hNativeWriter, &hNativeWriter); 219 218 if (hNativeWriter != NIL_RTTHREAD && hNativeWriter == RTThreadNativeSelf()) 220 219 rc9 = RTLockValidatorRecExclCheckOrder(pThis->pValidatorWrite, hThreadSelf, pSrcPos, RT_INDEFINITE_WAIT); … … 229 228 * Get cracking... 230 229 */ 231 uint64_t u64State = ASMAtomicReadU64(&pThis->u 64State);230 uint64_t u64State = ASMAtomicReadU64(&pThis->u.s.u64State); 232 231 uint64_t u64OldState = u64State; 233 232 … … 242 241 u64State &= ~RTCSRW_CNT_RD_MASK; 243 242 u64State |= c << RTCSRW_CNT_RD_SHIFT; 244 if (ASMAtomicCmpXchgU64(&pThis->u 64State, u64State, u64OldState))243 if (ASMAtomicCmpXchgU64(&pThis->u.s.u64State, u64State, u64OldState)) 245 244 { 246 245 #ifdef RTCRITSECTRW_STRICT … … 255 254 u64State &= ~(RTCSRW_CNT_RD_MASK | RTCSRW_CNT_WR_MASK | RTCSRW_DIR_MASK); 256 255 u64State |= (UINT64_C(1) << RTCSRW_CNT_RD_SHIFT) | (RTCSRW_DIR_READ << RTCSRW_DIR_SHIFT); 257 if (ASMAtomicCmpXchgU64(&pThis->u 64State, u64State, u64OldState))256 if (ASMAtomicCmpXchgU64(&pThis->u.s.u64State, u64State, u64OldState)) 258 257 { 259 258 Assert(!pThis->fNeedReset); … … 269 268 RTNATIVETHREAD hNativeSelf = RTThreadNativeSelf(); 270 269 RTNATIVETHREAD hNativeWriter; 271 ASMAtomicUoReadHandle(&pThis-> hNativeWriter, &hNativeWriter);270 ASMAtomicUoReadHandle(&pThis->u.s.hNativeWriter, &hNativeWriter); 272 271 if (hNativeSelf == hNativeWriter) 273 272 { … … 291 290 { 292 291 IPRT_CRITSECTRW_SHARED_BUSY(pThis, NULL, 293 (void *)pThis-> hNativeWriter,292 (void *)pThis->u.s.hNativeWriter, 294 293 (uint32_t)((u64State & RTCSRW_WAIT_CNT_RD_MASK) >> RTCSRW_WAIT_CNT_RD_SHIFT), 295 294 (uint32_t)((u64State & RTCSRW_CNT_WR_MASK) >> RTCSRW_CNT_WR_SHIFT)); … … 310 309 u64State |= (c << RTCSRW_CNT_RD_SHIFT) | (cWait << RTCSRW_WAIT_CNT_RD_SHIFT); 311 310 312 if (ASMAtomicCmpXchgU64(&pThis->u 64State, u64State, u64OldState))311 if (ASMAtomicCmpXchgU64(&pThis->u.s.u64State, u64State, u64OldState)) 313 312 { 314 313 IPRT_CRITSECTRW_SHARED_WAITING(pThis, NULL, 315 (void *)pThis-> hNativeWriter,314 (void *)pThis->u.s.hNativeWriter, 316 315 (uint32_t)((u64State & RTCSRW_WAIT_CNT_RD_MASK) >> RTCSRW_WAIT_CNT_RD_SHIFT), 317 316 (uint32_t)((u64State & RTCSRW_CNT_WR_MASK) >> RTCSRW_CNT_WR_SHIFT)); … … 340 339 for (;;) 341 340 { 342 u64OldState = u64State = ASMAtomicReadU64(&pThis->u 64State);341 u64OldState = u64State = ASMAtomicReadU64(&pThis->u.s.u64State); 343 342 c = (u64State & RTCSRW_CNT_RD_MASK) >> RTCSRW_CNT_RD_SHIFT; Assert(c > 0); 344 343 c--; … … 347 346 u64State &= ~(RTCSRW_CNT_RD_MASK | RTCSRW_WAIT_CNT_RD_MASK); 348 347 u64State |= (c << RTCSRW_CNT_RD_SHIFT) | (cWait << RTCSRW_WAIT_CNT_RD_SHIFT); 349 if (ASMAtomicCmpXchgU64(&pThis->u 64State, u64State, u64OldState))348 if (ASMAtomicCmpXchgU64(&pThis->u.s.u64State, u64State, u64OldState)) 350 349 break; 351 350 } … … 354 353 355 354 Assert(pThis->fNeedReset); 356 u64State = ASMAtomicReadU64(&pThis->u 64State);355 u64State = ASMAtomicReadU64(&pThis->u.s.u64State); 357 356 if ((u64State & RTCSRW_DIR_MASK) == (RTCSRW_DIR_READ << RTCSRW_DIR_SHIFT)) 358 357 break; … … 371 370 u64State |= cWait << RTCSRW_WAIT_CNT_RD_SHIFT; 372 371 373 if (ASMAtomicCmpXchgU64(&pThis->u 64State, u64State, u64OldState))372 if (ASMAtomicCmpXchgU64(&pThis->u.s.u64State, u64State, u64OldState)) 374 373 { 375 374 if (cWait == 0) … … 383 382 break; 384 383 } 385 u64State = ASMAtomicReadU64(&pThis->u 64State);384 u64State = ASMAtomicReadU64(&pThis->u.s.u64State); 386 385 } 387 386 … … 397 396 398 397 ASMNopPause(); 399 u64State = ASMAtomicReadU64(&pThis->u 64State);398 u64State = ASMAtomicReadU64(&pThis->u.s.u64State); 400 399 u64OldState = u64State; 401 400 } 402 401 403 402 /* got it! */ 404 Assert((ASMAtomicReadU64(&pThis->u 64State) & RTCSRW_DIR_MASK) == (RTCSRW_DIR_READ << RTCSRW_DIR_SHIFT));403 Assert((ASMAtomicReadU64(&pThis->u.s.u64State) & RTCSRW_DIR_MASK) == (RTCSRW_DIR_READ << RTCSRW_DIR_SHIFT)); 405 404 IPRT_CRITSECTRW_SHARED_ENTERED(pThis, NULL, 406 405 (uint32_t)((u64State & RTCSRW_CNT_RD_MASK) >> RTCSRW_CNT_RD_SHIFT), … … 467 466 * Check the direction and take action accordingly. 468 467 */ 469 uint64_t u64State = ASMAtomicReadU64(&pThis->u 64State);468 uint64_t u64State = ASMAtomicReadU64(&pThis->u.s.u64State); 470 469 uint64_t u64OldState = u64State; 471 470 if ((u64State & RTCSRW_DIR_MASK) == (RTCSRW_DIR_READ << RTCSRW_DIR_SHIFT)) … … 492 491 u64State &= ~RTCSRW_CNT_RD_MASK; 493 492 u64State |= c << RTCSRW_CNT_RD_SHIFT; 494 if (ASMAtomicCmpXchgU64(&pThis->u 64State, u64State, u64OldState))493 if (ASMAtomicCmpXchgU64(&pThis->u.s.u64State, u64State, u64OldState)) 495 494 break; 496 495 } … … 500 499 u64State &= ~(RTCSRW_CNT_RD_MASK | RTCSRW_DIR_MASK); 501 500 u64State |= RTCSRW_DIR_WRITE << RTCSRW_DIR_SHIFT; 502 if (ASMAtomicCmpXchgU64(&pThis->u 64State, u64State, u64OldState))501 if (ASMAtomicCmpXchgU64(&pThis->u.s.u64State, u64State, u64OldState)) 503 502 { 504 503 int rc = RTSemEventSignal(pThis->hEvtWrite); … … 509 508 510 509 ASMNopPause(); 511 u64State = ASMAtomicReadU64(&pThis->u 64State);510 u64State = ASMAtomicReadU64(&pThis->u.s.u64State); 512 511 u64OldState = u64State; 513 512 } … … 517 516 RTNATIVETHREAD hNativeSelf = RTThreadNativeSelf(); 518 517 RTNATIVETHREAD hNativeWriter; 519 ASMAtomicUoReadHandle(&pThis-> hNativeWriter, &hNativeWriter);518 ASMAtomicUoReadHandle(&pThis->u.s.hNativeWriter, &hNativeWriter); 520 519 AssertReturn(hNativeSelf == hNativeWriter, VERR_NOT_OWNER); 521 520 AssertReturn(pThis->cWriterReads > 0, VERR_NOT_OWNER); … … 567 566 RTNATIVETHREAD hNativeSelf = RTThreadNativeSelf(); 568 567 RTNATIVETHREAD hNativeWriter; 569 ASMAtomicUoReadHandle(&pThis-> hNativeWriter, &hNativeWriter);568 ASMAtomicUoReadHandle(&pThis->u.s.hNativeWriter, &hNativeWriter); 570 569 if (hNativeSelf == hNativeWriter) 571 570 { 572 Assert((ASMAtomicReadU64(&pThis->u 64State) & RTCSRW_DIR_MASK) == (RTCSRW_DIR_WRITE << RTCSRW_DIR_SHIFT));571 Assert((ASMAtomicReadU64(&pThis->u.s.u64State) & RTCSRW_DIR_MASK) == (RTCSRW_DIR_WRITE << RTCSRW_DIR_SHIFT)); 573 572 #ifdef RTCRITSECTRW_STRICT 574 573 int rc9 = RTLockValidatorRecExclRecursion(pThis->pValidatorWrite, pSrcPos); … … 582 581 if (IPRT_CRITSECTRW_EXCL_ENTERED_ENABLED()) 583 582 { 584 uint64_t u64State = ASMAtomicReadU64(&pThis->u 64State);583 uint64_t u64State = ASMAtomicReadU64(&pThis->u.s.u64State); 585 584 IPRT_CRITSECTRW_EXCL_ENTERED(pThis, NULL, cNestings + pThis->cWriterReads, 586 585 (uint32_t)((u64State & RTCSRW_WAIT_CNT_RD_MASK) >> RTCSRW_WAIT_CNT_RD_SHIFT), … … 594 593 * Get cracking. 595 594 */ 596 uint64_t u64State = ASMAtomicReadU64(&pThis->u 64State);595 uint64_t u64State = ASMAtomicReadU64(&pThis->u.s.u64State); 597 596 uint64_t u64OldState = u64State; 598 597 … … 608 607 u64State &= ~RTCSRW_CNT_WR_MASK; 609 608 u64State |= c << RTCSRW_CNT_WR_SHIFT; 610 if (ASMAtomicCmpXchgU64(&pThis->u 64State, u64State, u64OldState))609 if (ASMAtomicCmpXchgU64(&pThis->u.s.u64State, u64State, u64OldState)) 611 610 break; 612 611 } … … 616 615 u64State &= ~(RTCSRW_CNT_RD_MASK | RTCSRW_CNT_WR_MASK | RTCSRW_DIR_MASK); 617 616 u64State |= (UINT64_C(1) << RTCSRW_CNT_WR_SHIFT) | (RTCSRW_DIR_WRITE << RTCSRW_DIR_SHIFT); 618 if (ASMAtomicCmpXchgU64(&pThis->u 64State, u64State, u64OldState))617 if (ASMAtomicCmpXchgU64(&pThis->u.s.u64State, u64State, u64OldState)) 619 618 break; 620 619 } … … 630 629 u64State &= ~RTCSRW_CNT_WR_MASK; 631 630 u64State |= c << RTCSRW_CNT_WR_SHIFT; 632 if (ASMAtomicCmpXchgU64(&pThis->u 64State, u64State, u64OldState))631 if (ASMAtomicCmpXchgU64(&pThis->u.s.u64State, u64State, u64OldState)) 633 632 break; 634 633 } … … 638 637 639 638 ASMNopPause(); 640 u64State = ASMAtomicReadU64(&pThis->u 64State);639 u64State = ASMAtomicReadU64(&pThis->u.s.u64State); 641 640 u64OldState = u64State; 642 641 } … … 650 649 || fTryOnly); 651 650 if (fDone) 652 ASMAtomicCmpXchgHandle(&pThis-> hNativeWriter, hNativeSelf, NIL_RTNATIVETHREAD, fDone);651 ASMAtomicCmpXchgHandle(&pThis->u.s.hNativeWriter, hNativeSelf, NIL_RTNATIVETHREAD, fDone); 653 652 if (!fDone) 654 653 { … … 660 659 for (;;) 661 660 { 662 u64OldState = u64State = ASMAtomicReadU64(&pThis->u 64State);661 u64OldState = u64State = ASMAtomicReadU64(&pThis->u.s.u64State); 663 662 uint64_t c = (u64State & RTCSRW_CNT_WR_MASK) >> RTCSRW_CNT_WR_SHIFT; Assert(c > 0); 664 663 c--; 665 664 u64State &= ~RTCSRW_CNT_WR_MASK; 666 665 u64State |= c << RTCSRW_CNT_WR_SHIFT; 667 if (ASMAtomicCmpXchgU64(&pThis->u 64State, u64State, u64OldState))666 if (ASMAtomicCmpXchgU64(&pThis->u.s.u64State, u64State, u64OldState)) 668 667 break; 669 668 } … … 673 672 (uint32_t)((u64State & RTCSRW_CNT_RD_MASK) >> RTCSRW_CNT_RD_SHIFT), 674 673 (uint32_t)((u64State & RTCSRW_CNT_WR_MASK) >> RTCSRW_CNT_WR_SHIFT), 675 (void *)pThis-> hNativeWriter);674 (void *)pThis->u.s.hNativeWriter); 676 675 return VERR_SEM_BUSY; 677 676 } … … 685 684 (uint32_t)((u64State & RTCSRW_CNT_RD_MASK) >> RTCSRW_CNT_RD_SHIFT), 686 685 (uint32_t)((u64State & RTCSRW_CNT_WR_MASK) >> RTCSRW_CNT_WR_SHIFT), 687 (void *)pThis-> hNativeWriter);686 (void *)pThis->u.s.hNativeWriter); 688 687 for (uint32_t iLoop = 0; ; iLoop++) 689 688 { … … 712 711 for (;;) 713 712 { 714 u64OldState = u64State = ASMAtomicReadU64(&pThis->u 64State);713 u64OldState = u64State = ASMAtomicReadU64(&pThis->u.s.u64State); 715 714 uint64_t c = (u64State & RTCSRW_CNT_WR_MASK) >> RTCSRW_CNT_WR_SHIFT; Assert(c > 0); 716 715 c--; 717 716 u64State &= ~RTCSRW_CNT_WR_MASK; 718 717 u64State |= c << RTCSRW_CNT_WR_SHIFT; 719 if (ASMAtomicCmpXchgU64(&pThis->u 64State, u64State, u64OldState))718 if (ASMAtomicCmpXchgU64(&pThis->u.s.u64State, u64State, u64OldState)) 720 719 break; 721 720 } … … 723 722 } 724 723 725 u64State = ASMAtomicReadU64(&pThis->u 64State);724 u64State = ASMAtomicReadU64(&pThis->u.s.u64State); 726 725 if ((u64State & RTCSRW_DIR_MASK) == (RTCSRW_DIR_WRITE << RTCSRW_DIR_SHIFT)) 727 726 { 728 ASMAtomicCmpXchgHandle(&pThis-> hNativeWriter, hNativeSelf, NIL_RTNATIVETHREAD, fDone);727 ASMAtomicCmpXchgHandle(&pThis->u.s.hNativeWriter, hNativeSelf, NIL_RTNATIVETHREAD, fDone); 729 728 if (fDone) 730 729 break; … … 737 736 * Got it! 738 737 */ 739 Assert((ASMAtomicReadU64(&pThis->u 64State) & RTCSRW_DIR_MASK) == (RTCSRW_DIR_WRITE << RTCSRW_DIR_SHIFT));738 Assert((ASMAtomicReadU64(&pThis->u.s.u64State) & RTCSRW_DIR_MASK) == (RTCSRW_DIR_WRITE << RTCSRW_DIR_SHIFT)); 740 739 ASMAtomicWriteU32(&pThis->cWriteRecursions, 1); 741 740 Assert(pThis->cWriterReads == 0); … … 806 805 RTNATIVETHREAD hNativeSelf = RTThreadNativeSelf(); 807 806 RTNATIVETHREAD hNativeWriter; 808 ASMAtomicUoReadHandle(&pThis-> hNativeWriter, &hNativeWriter);807 ASMAtomicUoReadHandle(&pThis->u.s.hNativeWriter, &hNativeWriter); 809 808 AssertReturn(hNativeSelf == hNativeWriter, VERR_NOT_OWNER); 810 809 … … 824 823 */ 825 824 ASMAtomicWriteU32(&pThis->cWriteRecursions, 0); 826 ASMAtomicWriteHandle(&pThis-> hNativeWriter, NIL_RTNATIVETHREAD);827 828 uint64_t u64State = ASMAtomicReadU64(&pThis->u 64State);825 ASMAtomicWriteHandle(&pThis->u.s.hNativeWriter, NIL_RTNATIVETHREAD); 826 827 uint64_t u64State = ASMAtomicReadU64(&pThis->u.s.u64State); 829 828 IPRT_CRITSECTRW_EXCL_LEAVING(pThis, NULL, 0, 830 829 (uint32_t)((u64State & RTCSRW_WAIT_CNT_RD_MASK) >> RTCSRW_WAIT_CNT_RD_SHIFT), … … 845 844 u64State &= ~RTCSRW_CNT_WR_MASK; 846 845 u64State |= c << RTCSRW_CNT_WR_SHIFT; 847 if (ASMAtomicCmpXchgU64(&pThis->u 64State, u64State, u64OldState))846 if (ASMAtomicCmpXchgU64(&pThis->u.s.u64State, u64State, u64OldState)) 848 847 { 849 848 if (c > 0) … … 860 859 u64State &= ~(RTCSRW_CNT_WR_MASK | RTCSRW_DIR_MASK); 861 860 u64State |= RTCSRW_DIR_READ << RTCSRW_DIR_SHIFT; 862 if (ASMAtomicCmpXchgU64(&pThis->u 64State, u64State, u64OldState))861 if (ASMAtomicCmpXchgU64(&pThis->u.s.u64State, u64State, u64OldState)) 863 862 { 864 863 Assert(!pThis->fNeedReset); … … 873 872 if (pThis->u32Magic != RTCRITSECTRW_MAGIC) 874 873 return VERR_SEM_DESTROYED; 875 u64State = ASMAtomicReadU64(&pThis->u 64State);874 u64State = ASMAtomicReadU64(&pThis->u.s.u64State); 876 875 } 877 876 } … … 888 887 if (IPRT_CRITSECTRW_EXCL_LEAVING_ENABLED()) 889 888 { 890 uint64_t u64State = ASMAtomicReadU64(&pThis->u 64State);889 uint64_t u64State = ASMAtomicReadU64(&pThis->u.s.u64State); 891 890 IPRT_CRITSECTRW_EXCL_LEAVING(pThis, NULL, cNestings + pThis->cWriterReads, 892 891 (uint32_t)((u64State & RTCSRW_WAIT_CNT_RD_MASK) >> RTCSRW_WAIT_CNT_RD_SHIFT), … … 919 918 RTNATIVETHREAD hNativeSelf = RTThreadNativeSelf(); 920 919 RTNATIVETHREAD hNativeWriter; 921 ASMAtomicUoReadHandle(&pThis-> hNativeWriter, &hNativeWriter);920 ASMAtomicUoReadHandle(&pThis->u.s.hNativeWriter, &hNativeWriter); 922 921 return hNativeWriter == hNativeSelf; 923 922 } … … 943 942 * Inspect the state. 944 943 */ 945 uint64_t u64State = ASMAtomicReadU64(&pThis->u 64State);944 uint64_t u64State = ASMAtomicReadU64(&pThis->u.s.u64State); 946 945 if ((u64State & RTCSRW_DIR_MASK) == (RTCSRW_DIR_WRITE << RTCSRW_DIR_SHIFT)) 947 946 { … … 952 951 RTNATIVETHREAD hNativeSelf = RTThreadNativeSelf(); 953 952 RTNATIVETHREAD hWriter; 954 ASMAtomicUoReadHandle(&pThis-> hNativeWriter, &hWriter);953 ASMAtomicUoReadHandle(&pThis->u.s.hNativeWriter, &hWriter); 955 954 return hWriter == hNativeSelf; 956 955 } … … 1020 1019 * Return the requested data. 1021 1020 */ 1022 uint64_t u64State = ASMAtomicReadU64(&pThis->u 64State);1021 uint64_t u64State = ASMAtomicReadU64(&pThis->u.s.u64State); 1023 1022 if ((u64State & RTCSRW_DIR_MASK) != (RTCSRW_DIR_READ << RTCSRW_DIR_SHIFT)) 1024 1023 return 0; … … 1037 1036 //Assert(pThis->cNestings == 0); 1038 1037 //Assert(pThis->cLockers == -1); 1039 Assert(pThis-> hNativeWriter == NIL_RTNATIVETHREAD);1038 Assert(pThis->u.s.hNativeWriter == NIL_RTNATIVETHREAD); 1040 1039 #ifdef IN_RING0 1041 1040 Assert(pThis->fFlags & RTCRITSECT_FLAGS_RING0); … … 1051 1050 1052 1051 pThis->fFlags = 0; 1053 pThis->u 64State = 0;1052 pThis->u.s.u64State = 0; 1054 1053 1055 1054 RTSEMEVENT hEvtWrite = pThis->hEvtWrite; -
trunk/src/VBox/VMM/VMMAll/PDMAllCritSectRw.cpp
r90636 r90637 186 186 int rc9; 187 187 RTNATIVETHREAD hNativeWriter; 188 ASMAtomicUoReadHandle(&pThis->s.Core. hNativeWriter, &hNativeWriter);188 ASMAtomicUoReadHandle(&pThis->s.Core.u.s.hNativeWriter, &hNativeWriter); 189 189 if (hNativeWriter != NIL_RTTHREAD && hNativeWriter == pdmCritSectRwGetNativeSelf(pVM, pThis)) 190 190 rc9 = RTLockValidatorRecExclCheckOrder(pThis->s.Core.pValidatorWrite, hThreadSelf, pSrcPos, RT_INDEFINITE_WAIT); … … 199 199 * Get cracking... 200 200 */ 201 uint64_t u64State = ASMAtomicReadU64(&pThis->s.Core.u 64State);201 uint64_t u64State = ASMAtomicReadU64(&pThis->s.Core.u.s.u64State); 202 202 uint64_t u64OldState = u64State; 203 203 … … 213 213 u64State &= ~RTCSRW_CNT_RD_MASK; 214 214 u64State |= c << RTCSRW_CNT_RD_SHIFT; 215 if (ASMAtomicCmpXchgU64(&pThis->s.Core.u 64State, u64State, u64OldState))215 if (ASMAtomicCmpXchgU64(&pThis->s.Core.u.s.u64State, u64State, u64OldState)) 216 216 { 217 217 #if defined(PDMCRITSECTRW_STRICT) && defined(IN_RING3) … … 227 227 u64State &= ~(RTCSRW_CNT_RD_MASK | RTCSRW_CNT_WR_MASK | RTCSRW_DIR_MASK); 228 228 u64State |= (UINT64_C(1) << RTCSRW_CNT_RD_SHIFT) | (RTCSRW_DIR_READ << RTCSRW_DIR_SHIFT); 229 if (ASMAtomicCmpXchgU64(&pThis->s.Core.u 64State, u64State, u64OldState))229 if (ASMAtomicCmpXchgU64(&pThis->s.Core.u.s.u64State, u64State, u64OldState)) 230 230 { 231 231 Assert(!pThis->s.Core.fNeedReset); … … 241 241 /* Is the writer perhaps doing a read recursion? */ 242 242 RTNATIVETHREAD hNativeWriter; 243 ASMAtomicUoReadHandle(&pThis->s.Core. hNativeWriter, &hNativeWriter);243 ASMAtomicUoReadHandle(&pThis->s.Core.u.s.hNativeWriter, &hNativeWriter); 244 244 if (hNativeWriter != NIL_RTNATIVETHREAD) 245 245 { … … 296 296 u64State |= (c << RTCSRW_CNT_RD_SHIFT) | (cWait << RTCSRW_WAIT_CNT_RD_SHIFT); 297 297 298 if (ASMAtomicCmpXchgU64(&pThis->s.Core.u 64State, u64State, u64OldState))298 if (ASMAtomicCmpXchgU64(&pThis->s.Core.u.s.u64State, u64State, u64OldState)) 299 299 { 300 300 for (uint32_t iLoop = 0; ; iLoop++) … … 335 335 for (;;) 336 336 { 337 u64OldState = u64State = ASMAtomicReadU64(&pThis->s.Core.u 64State);337 u64OldState = u64State = ASMAtomicReadU64(&pThis->s.Core.u.s.u64State); 338 338 c = (u64State & RTCSRW_CNT_RD_MASK) >> RTCSRW_CNT_RD_SHIFT; 339 339 AssertReturn(c > 0, pdmCritSectRwCorrupted(pThis, "Invalid read count on bailout")); … … 344 344 u64State &= ~(RTCSRW_CNT_RD_MASK | RTCSRW_WAIT_CNT_RD_MASK); 345 345 u64State |= (c << RTCSRW_CNT_RD_SHIFT) | (cWait << RTCSRW_WAIT_CNT_RD_SHIFT); 346 if (ASMAtomicCmpXchgU64(&pThis->s.Core.u 64State, u64State, u64OldState))346 if (ASMAtomicCmpXchgU64(&pThis->s.Core.u.s.u64State, u64State, u64OldState)) 347 347 break; 348 348 } … … 351 351 352 352 Assert(pThis->s.Core.fNeedReset); 353 u64State = ASMAtomicReadU64(&pThis->s.Core.u 64State);353 u64State = ASMAtomicReadU64(&pThis->s.Core.u.s.u64State); 354 354 if ((u64State & RTCSRW_DIR_MASK) == (RTCSRW_DIR_READ << RTCSRW_DIR_SHIFT)) 355 355 break; … … 368 368 u64State |= cWait << RTCSRW_WAIT_CNT_RD_SHIFT; 369 369 370 if (ASMAtomicCmpXchgU64(&pThis->s.Core.u 64State, u64State, u64OldState))370 if (ASMAtomicCmpXchgU64(&pThis->s.Core.u.s.u64State, u64State, u64OldState)) 371 371 { 372 372 if (cWait == 0) … … 380 380 break; 381 381 } 382 u64State = ASMAtomicReadU64(&pThis->s.Core.u 64State);382 u64State = ASMAtomicReadU64(&pThis->s.Core.u.s.u64State); 383 383 } 384 384 … … 417 417 418 418 ASMNopPause(); 419 u64State = ASMAtomicReadU64(&pThis->s.Core.u 64State);419 u64State = ASMAtomicReadU64(&pThis->s.Core.u.s.u64State); 420 420 u64OldState = u64State; 421 421 } … … 423 423 /* got it! */ 424 424 STAM_REL_COUNTER_INC(&pThis->s.CTX_MID_Z(Stat,EnterShared)); 425 Assert((ASMAtomicReadU64(&pThis->s.Core.u 64State) & RTCSRW_DIR_MASK) == (RTCSRW_DIR_READ << RTCSRW_DIR_SHIFT));425 Assert((ASMAtomicReadU64(&pThis->s.Core.u.s.u64State) & RTCSRW_DIR_MASK) == (RTCSRW_DIR_READ << RTCSRW_DIR_SHIFT)); 426 426 return VINF_SUCCESS; 427 427 … … 596 596 * Check the direction and take action accordingly. 597 597 */ 598 uint64_t u64State = ASMAtomicReadU64(&pThis->s.Core.u 64State);598 uint64_t u64State = ASMAtomicReadU64(&pThis->s.Core.u.s.u64State); 599 599 uint64_t u64OldState = u64State; 600 600 if ((u64State & RTCSRW_DIR_MASK) == (RTCSRW_DIR_READ << RTCSRW_DIR_SHIFT)) … … 622 622 u64State &= ~RTCSRW_CNT_RD_MASK; 623 623 u64State |= c << RTCSRW_CNT_RD_SHIFT; 624 if (ASMAtomicCmpXchgU64(&pThis->s.Core.u 64State, u64State, u64OldState))624 if (ASMAtomicCmpXchgU64(&pThis->s.Core.u.s.u64State, u64State, u64OldState)) 625 625 break; 626 626 } … … 636 636 u64State &= ~(RTCSRW_CNT_RD_MASK | RTCSRW_DIR_MASK); 637 637 u64State |= RTCSRW_DIR_WRITE << RTCSRW_DIR_SHIFT; 638 if (ASMAtomicCmpXchgU64(&pThis->s.Core.u 64State, u64State, u64OldState))638 if (ASMAtomicCmpXchgU64(&pThis->s.Core.u.s.u64State, u64State, u64OldState)) 639 639 { 640 640 int rc = SUPSemEventSignal(pVM->pSession, (SUPSEMEVENT)pThis->s.Core.hEvtWrite); … … 672 672 673 673 ASMNopPause(); 674 u64State = ASMAtomicReadU64(&pThis->s.Core.u 64State);674 u64State = ASMAtomicReadU64(&pThis->s.Core.u.s.u64State); 675 675 u64OldState = u64State; 676 676 } … … 685 685 686 686 RTNATIVETHREAD hNativeWriter; 687 ASMAtomicUoReadHandle(&pThis->s.Core. hNativeWriter, &hNativeWriter);687 ASMAtomicUoReadHandle(&pThis->s.Core.u.s.hNativeWriter, &hNativeWriter); 688 688 AssertReturn(hNativeSelf == hNativeWriter, VERR_NOT_OWNER); 689 689 AssertReturn(pThis->s.Core.cWriterReads > 0, VERR_NOT_OWNER); … … 750 750 for (;;) 751 751 { 752 uint64_t u64State = ASMAtomicReadU64(&pThis->s.Core.u 64State);752 uint64_t u64State = ASMAtomicReadU64(&pThis->s.Core.u.s.u64State); 753 753 uint64_t const u64OldState = u64State; 754 754 uint64_t c = (u64State & RTCSRW_CNT_WR_MASK) >> RTCSRW_CNT_WR_SHIFT; … … 757 757 u64State &= ~RTCSRW_CNT_WR_MASK; 758 758 u64State |= c << RTCSRW_CNT_WR_SHIFT; 759 if (ASMAtomicCmpXchgU64(&pThis->s.Core.u 64State, u64State, u64OldState))759 if (ASMAtomicCmpXchgU64(&pThis->s.Core.u.s.u64State, u64State, u64OldState)) 760 760 return rc; 761 761 … … 774 774 { 775 775 RT_NOREF(hThreadSelf, fNoVal, pSrcPos); 776 Assert((ASMAtomicReadU64(&pThis->s.Core.u 64State) & RTCSRW_DIR_MASK) == (RTCSRW_DIR_WRITE << RTCSRW_DIR_SHIFT));776 Assert((ASMAtomicReadU64(&pThis->s.Core.u.s.u64State) & RTCSRW_DIR_MASK) == (RTCSRW_DIR_WRITE << RTCSRW_DIR_SHIFT)); 777 777 778 778 #if 1 /** @todo consider generating less noise... */ … … 847 847 : SUPSemEventWait(pSession, hEvent, cMsMaxOne); 848 848 Log11Func(("%p: rc=%Rrc %'RU64 ns (cMsMaxOne=%RU64 hNativeWriter=%p)\n", 849 pThis, rc, RTTimeNanoTS() - tsStart, cMsMaxOne, pThis->s.Core. hNativeWriter));849 pThis, rc, RTTimeNanoTS() - tsStart, cMsMaxOne, pThis->s.Core.u.s.hNativeWriter)); 850 850 # endif 851 851 if (RT_LIKELY(pThis->s.Core.u32Magic == RTCRITSECTRW_MAGIC)) … … 939 939 * Try take exclusive write ownership. 940 940 */ 941 uint64_t u64State = ASMAtomicReadU64(&pThis->s.Core.u 64State);941 uint64_t u64State = ASMAtomicReadU64(&pThis->s.Core.u.s.u64State); 942 942 if ((u64State & RTCSRW_DIR_MASK) == (RTCSRW_DIR_WRITE << RTCSRW_DIR_SHIFT)) 943 943 { 944 944 bool fDone; 945 ASMAtomicCmpXchgHandle(&pThis->s.Core. hNativeWriter, hNativeSelf, NIL_RTNATIVETHREAD, fDone);945 ASMAtomicCmpXchgHandle(&pThis->s.Core.u.s.hNativeWriter, hNativeSelf, NIL_RTNATIVETHREAD, fDone); 946 946 if (fDone) 947 947 return pdmCritSectRwEnterExclFirst(pThis, pSrcPos, fNoVal, hThreadSelf); … … 990 990 AssertReturn(hNativeSelf != NIL_RTNATIVETHREAD, VERR_VM_THREAD_NOT_EMT); 991 991 RTNATIVETHREAD hNativeWriter; 992 ASMAtomicUoReadHandle(&pThis->s.Core. hNativeWriter, &hNativeWriter);992 ASMAtomicUoReadHandle(&pThis->s.Core.u.s.hNativeWriter, &hNativeWriter); 993 993 if (hNativeSelf == hNativeWriter) 994 994 { 995 Assert((ASMAtomicReadU64(&pThis->s.Core.u 64State) & RTCSRW_DIR_MASK) == (RTCSRW_DIR_WRITE << RTCSRW_DIR_SHIFT));995 Assert((ASMAtomicReadU64(&pThis->s.Core.u.s.u64State) & RTCSRW_DIR_MASK) == (RTCSRW_DIR_WRITE << RTCSRW_DIR_SHIFT)); 996 996 #if defined(PDMCRITSECTRW_STRICT) && defined(IN_RING3) 997 997 if (!fNoVal) … … 1013 1013 * Get cracking. 1014 1014 */ 1015 uint64_t u64State = ASMAtomicReadU64(&pThis->s.Core.u 64State);1015 uint64_t u64State = ASMAtomicReadU64(&pThis->s.Core.u.s.u64State); 1016 1016 uint64_t u64OldState = u64State; 1017 1017 … … 1028 1028 u64State &= ~RTCSRW_CNT_WR_MASK; 1029 1029 u64State |= c << RTCSRW_CNT_WR_SHIFT; 1030 if (ASMAtomicCmpXchgU64(&pThis->s.Core.u 64State, u64State, u64OldState))1030 if (ASMAtomicCmpXchgU64(&pThis->s.Core.u.s.u64State, u64State, u64OldState)) 1031 1031 break; 1032 1032 } … … 1036 1036 u64State &= ~(RTCSRW_CNT_RD_MASK | RTCSRW_CNT_WR_MASK | RTCSRW_DIR_MASK); 1037 1037 u64State |= (UINT64_C(1) << RTCSRW_CNT_WR_SHIFT) | (RTCSRW_DIR_WRITE << RTCSRW_DIR_SHIFT); 1038 if (ASMAtomicCmpXchgU64(&pThis->s.Core.u 64State, u64State, u64OldState))1038 if (ASMAtomicCmpXchgU64(&pThis->s.Core.u.s.u64State, u64State, u64OldState)) 1039 1039 break; 1040 1040 } … … 1054 1054 u64State &= ~RTCSRW_CNT_WR_MASK; 1055 1055 u64State |= c << RTCSRW_CNT_WR_SHIFT; 1056 if (ASMAtomicCmpXchgU64(&pThis->s.Core.u 64State, u64State, u64OldState))1056 if (ASMAtomicCmpXchgU64(&pThis->s.Core.u.s.u64State, u64State, u64OldState)) 1057 1057 break; 1058 1058 } … … 1066 1066 1067 1067 ASMNopPause(); 1068 u64State = ASMAtomicReadU64(&pThis->s.Core.u 64State);1068 u64State = ASMAtomicReadU64(&pThis->s.Core.u.s.u64State); 1069 1069 u64OldState = u64State; 1070 1070 } … … 1082 1082 if (fDone) 1083 1083 { 1084 ASMAtomicCmpXchgHandle(&pThis->s.Core. hNativeWriter, hNativeSelf, NIL_RTNATIVETHREAD, fDone);1084 ASMAtomicCmpXchgHandle(&pThis->s.Core.u.s.hNativeWriter, hNativeSelf, NIL_RTNATIVETHREAD, fDone); 1085 1085 if (fDone) 1086 1086 return pdmCritSectRwEnterExclFirst(pThis, pSrcPos, fNoVal, hThreadSelf); … … 1326 1326 1327 1327 RTNATIVETHREAD hNativeWriter; 1328 ASMAtomicUoReadHandle(&pThis->s.Core. hNativeWriter, &hNativeWriter);1328 ASMAtomicUoReadHandle(&pThis->s.Core.u.s.hNativeWriter, &hNativeWriter); 1329 1329 AssertReturn(hNativeSelf == hNativeWriter, VERR_NOT_OWNER); 1330 1330 … … 1356 1356 ASMAtomicWriteU32(&pThis->s.Core.cWriteRecursions, 0); 1357 1357 STAM_PROFILE_ADV_STOP(&pThis->s.StatWriteLocked, swl); 1358 ASMAtomicWriteHandle(&pThis->s.Core. hNativeWriter, NIL_RTNATIVETHREAD);1358 ASMAtomicWriteHandle(&pThis->s.Core.u.s.hNativeWriter, NIL_RTNATIVETHREAD); 1359 1359 1360 1360 for (;;) 1361 1361 { 1362 uint64_t u64State = ASMAtomicReadU64(&pThis->s.Core.u 64State);1362 uint64_t u64State = ASMAtomicReadU64(&pThis->s.Core.u.s.u64State); 1363 1363 uint64_t u64OldState = u64State; 1364 1364 … … 1373 1373 u64State &= ~RTCSRW_CNT_WR_MASK; 1374 1374 u64State |= c << RTCSRW_CNT_WR_SHIFT; 1375 if (ASMAtomicCmpXchgU64(&pThis->s.Core.u 64State, u64State, u64OldState))1375 if (ASMAtomicCmpXchgU64(&pThis->s.Core.u.s.u64State, u64State, u64OldState)) 1376 1376 { 1377 1377 if (c > 0) … … 1388 1388 u64State &= ~(RTCSRW_CNT_WR_MASK | RTCSRW_DIR_MASK); 1389 1389 u64State |= RTCSRW_DIR_READ << RTCSRW_DIR_SHIFT; 1390 if (ASMAtomicCmpXchgU64(&pThis->s.Core.u 64State, u64State, u64OldState))1390 if (ASMAtomicCmpXchgU64(&pThis->s.Core.u.s.u64State, u64State, u64OldState)) 1391 1391 { 1392 1392 Assert(!pThis->s.Core.fNeedReset); … … 1507 1507 */ 1508 1508 RTNATIVETHREAD hNativeWriter; 1509 ASMAtomicUoReadHandle(&pThis->s.Core. hNativeWriter, &hNativeWriter);1509 ASMAtomicUoReadHandle(&pThis->s.Core.u.s.hNativeWriter, &hNativeWriter); 1510 1510 if (hNativeWriter == NIL_RTNATIVETHREAD) 1511 1511 return false; … … 1545 1545 * Inspect the state. 1546 1546 */ 1547 uint64_t u64State = ASMAtomicReadU64(&pThis->s.Core.u 64State);1547 uint64_t u64State = ASMAtomicReadU64(&pThis->s.Core.u.s.u64State); 1548 1548 if ((u64State & RTCSRW_DIR_MASK) == (RTCSRW_DIR_WRITE << RTCSRW_DIR_SHIFT)) 1549 1549 { … … 1553 1553 */ 1554 1554 RTNATIVETHREAD hWriter; 1555 ASMAtomicUoReadHandle(&pThis->s.Core. hNativeWriter, &hWriter);1555 ASMAtomicUoReadHandle(&pThis->s.Core.u.s.hNativeWriter, &hWriter); 1556 1556 if (hWriter == NIL_RTNATIVETHREAD) 1557 1557 return false; … … 1649 1649 * Return the requested data. 1650 1650 */ 1651 uint64_t u64State = ASMAtomicReadU64(&pThis->s.Core.u 64State);1651 uint64_t u64State = ASMAtomicReadU64(&pThis->s.Core.u.s.u64State); 1652 1652 if ((u64State & RTCSRW_DIR_MASK) != (RTCSRW_DIR_READ << RTCSRW_DIR_SHIFT)) 1653 1653 return 0; -
trunk/src/VBox/VMM/VMMR3/PDMCritSect.cpp
r90634 r90637 291 291 pCritSect->Core.afPadding[0] = false; 292 292 pCritSect->Core.fFlags = 0; 293 pCritSect->Core.u64State = 0; 294 pCritSect->Core.hNativeWriter = NIL_RTNATIVETHREAD; 293 pCritSect->Core.u.u128.s.Lo = 0; 294 pCritSect->Core.u.u128.s.Hi = 0; 295 pCritSect->Core.u.s.hNativeWriter = NIL_RTNATIVETHREAD; 295 296 pCritSect->Core.cWriterReads = 0; 296 297 pCritSect->Core.cWriteRecursions = 0; 297 #if HC_ARCH_BITS == 32298 pCritSect->Core.HCPtrPadding = NIL_RTHCPTR;299 #endif300 298 pCritSect->pvKey = pvKey; 301 299 pCritSect->pszName = pszName; … … 583 581 //Assert(pCritSect->Core.cNestings == 0); 584 582 //Assert(pCritSect->Core.cLockers == -1); 585 Assert(pCritSect->Core. hNativeWriter == NIL_RTNATIVETHREAD);583 Assert(pCritSect->Core.u.s.hNativeWriter == NIL_RTNATIVETHREAD); 586 584 587 585 /* … … 603 601 * In case someone is waiting we'll signal the semaphore cLockers + 1 times. 604 602 */ 605 pCritSect->Core.fFlags = 0;606 pCritSect->Core.u 64State = 0;603 pCritSect->Core.fFlags = 0; 604 pCritSect->Core.u.s.u64State = 0; 607 605 608 606 SUPSEMEVENT hEvtWrite = (SUPSEMEVENT)pCritSect->Core.hEvtWrite; … … 1018 1016 pCur = pCur->pNext) 1019 1017 { 1020 if ( pCur->Core. hNativeWriter == hNativeThread1018 if ( pCur->Core.u.s.hNativeWriter == hNativeThread 1021 1019 || PDMCritSectRwIsReadOwner(pVM, (PPDMCRITSECTRW)pCur, false /*fWannaHear*/) ) 1022 1020 { … … 1210 1208 do 1211 1209 { 1212 u64State = pCritSect->Core.u 64State;1213 hOwner = pCritSect->Core. hNativeWriter;1210 u64State = pCritSect->Core.u.s.u64State; 1211 hOwner = pCritSect->Core.u.s.hNativeWriter; 1214 1212 cWriterReads = pCritSect->Core.cWriterReads; 1215 1213 cWriteRecursions = pCritSect->Core.cWriteRecursions; … … 1217 1215 uMagic = pCritSect->Core.u32Magic; 1218 1216 } while ( cTries-- > 0 1219 && ( u64State != pCritSect->Core.u 64State1220 || hOwner != pCritSect->Core. hNativeWriter1217 && ( u64State != pCritSect->Core.u.s.u64State 1218 || hOwner != pCritSect->Core.u.s.hNativeWriter 1221 1219 || cWriterReads != pCritSect->Core.cWriterReads 1222 1220 || cWriteRecursions != pCritSect->Core.cWriteRecursions -
trunk/src/VBox/VMM/include/PDMInternal.h
r90634 r90637 513 513 } PDMCRITSECTRWINT; 514 514 AssertCompileMemberAlignment(PDMCRITSECTRWINT, StatContentionRZEnterExcl, 8); 515 AssertCompileMemberAlignment(PDMCRITSECTRWINT, Core.u64State, 8); 515 AssertCompileMemberAlignment(PDMCRITSECTRWINT, Core.u, 16); 516 AssertCompileMemberAlignment(PDMCRITSECTRWINT, Core.u.s.u64State, 8); 516 517 /** Pointer to private critical section data. */ 517 518 typedef PDMCRITSECTRWINT *PPDMCRITSECTRWINT;
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