Index: /trunk/src/VBox/Devices/Bus/DevIommuIntel.cpp
===================================================================
--- /trunk/src/VBox/Devices/Bus/DevIommuIntel.cpp	(revision 88309)
+++ /trunk/src/VBox/Devices/Bus/DevIommuIntel.cpp	(revision 88310)
@@ -21,10 +21,8 @@
 *********************************************************************************************************************************/
 #define LOG_GROUP LOG_GROUP_DEV_IOMMU
-#include <VBox/vmm/pdmdev.h>
-#include <VBox/iommu-intel.h>
+#include "VBoxDD.h"
+#include "DevIommuIntel.h"
 
 #include <iprt/string.h>
-
-#include "VBoxDD.h"
 
 
Index: /trunk/src/VBox/Devices/Bus/DevIommuIntel.h
===================================================================
--- /trunk/src/VBox/Devices/Bus/DevIommuIntel.h	(revision 88310)
+++ /trunk/src/VBox/Devices/Bus/DevIommuIntel.h	(revision 88310)
@@ -0,0 +1,33 @@
+/* $Id$ */
+/** @file
+ * DevIommuIntel - I/O Memory Management Unit (Intel), header shared with the IOMMU, ACPI, chipset/firmware code.
+ */
+
+/*
+ * Copyright (C) 2021 Oracle Corporation
+ *
+ * This file is part of VirtualBox Open Source Edition (OSE), as
+ * available from http://www.virtualbox.org. This file is free software;
+ * you can redistribute it and/or modify it under the terms of the GNU
+ * General Public License (GPL) as published by the Free Software
+ * Foundation, in version 2 as it comes in the "COPYING" file of the
+ * VirtualBox OSE distribution. VirtualBox OSE is distributed in the
+ * hope that it will be useful, but WITHOUT ANY WARRANTY of any kind.
+ */
+
+#ifndef VBOX_INCLUDED_SRC_Bus_DevIommuIntel_h
+#define VBOX_INCLUDED_SRC_Bus_DevIommuIntel_h
+#ifndef RT_WITHOUT_PRAGMA_ONCE
+# pragma once
+#endif
+
+#include <VBox/iommu-intel.h>
+
+/** Feature/capability flags exposed to the guest (x2APIC Opt Out until we get
+ *  regular APIC setup working). */
+#define VTD_ACPI_DMAR_FLAGS                         (ACPI_DMAR_F_INTR_REMAP | ACPI_DMAR_F_X2APIC_OPT_OUT)
+/** The MMIO base address of the DMAR unit (taken from real hardware). */
+#define VTD_MMIO_BASE_ADDR                          0xfed90000
+
+
+#endif /* !VBOX_INCLUDED_SRC_Bus_DevIommuIntel_h */
Index: /trunk/src/VBox/Devices/PC/DevACPI.cpp
===================================================================
--- /trunk/src/VBox/Devices/PC/DevACPI.cpp	(revision 88309)
+++ /trunk/src/VBox/Devices/PC/DevACPI.cpp	(revision 88310)
@@ -47,4 +47,7 @@
 #ifdef VBOX_WITH_IOMMU_AMD
 # include "../Bus/DevIommuAmd.h"
+#endif
+#ifdef VBOX_WITH_IOMMU_INTEL
+# include "../Bus/DevIommuIntel.h"
 #endif
 
@@ -863,4 +866,5 @@
     ACPIDMAR            Dmar;
     ACPIDRHD            Drhd;
+    /* ACPIDMARDEVSCOPE    DevScope; */
 } ACPITBLDMAR;
 #endif  /* VBOX_WITH_IOMMU_INTEL */
@@ -3357,5 +3361,5 @@
     acpiR3PhysCopy(pDevIns, addr, (const uint8_t *)&Ivrs, sizeof(Ivrs));
 }
-#endif
+#endif  /* VBOX_WITH_IOMMU_AMD */
 
 
@@ -3369,8 +3373,19 @@
     RT_ZERO(VtdTable);
 
-    /* VT-d/DMAR header. */
+    /* VT-d Table. */
     acpiR3PrepareHeader(pThis, &VtdTable.Dmar.Hdr, "DMAR", sizeof(ACPITBLVTD), ACPI_DMAR_REVISION);
 
-    /** @todo Populate rest of DMAR table. */
+    /* DMAR. */
+    uint8_t cPhysAddrBits;
+    uint8_t cLinearAddrBits;
+    PDMDevHlpCpuGetGuestAddrWidths(pDevIns, &cPhysAddrBits, &cLinearAddrBits);
+    Assert(cPhysAddrBits > 0); NOREF(cLinearAddrBits);
+    VtdTable.Dmar.uHostAddrWidth = cPhysAddrBits - 1;
+    VtdTable.Dmar.fFlags         = VTD_ACPI_DMAR_FLAGS;
+
+    /* DRHD. */
+    VtdTable.Drhd.cbLength     = sizeof(ACPIDRHD) /* + sizeof(VtdTable.DevScope) */;
+    VtdTable.Drhd.fFlags       = ACPI_DRHD_F_INCLUDE_PCI_ALL;
+    VtdTable.Drhd.uRegBaseAddr = VTD_MMIO_BASE_ADDR;
 
     /* Finally, compute checksum. */
@@ -3380,5 +3395,5 @@
     acpiR3PhysCopy(pDevIns, addr, (const uint8_t *)&VtdTable, sizeof(VtdTable));
 }
-#endif
+#endif  /* VBOX_WITH_IOMMU_INTEL */