Index: /trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp
===================================================================
--- /trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp	(revision 87865)
+++ /trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp	(revision 87866)
@@ -1159,5 +1159,5 @@
         Assert(pThisR3->cCachedIotlbes < IOMMU_IOTLBE_MAX);
         ++pThisR3->cCachedIotlbes;
-        STAM_COUNTER_INC(&pThis->StatIotlbeCached);
+        STAM_COUNTER_INC(&pThis->StatIotlbeCached); NOREF(pThis);
     }
     else
@@ -1167,5 +1167,5 @@
         {
             pFound->fEvictPending = false;
-            STAM_COUNTER_INC(&pThis->StatIotlbeLazyEvictReuse);
+            STAM_COUNTER_INC(&pThis->StatIotlbeLazyEvictReuse); NOREF(pThis);
         }
         Assert(pFound->PageLookup.cShift == pPageLookup->cShift);
@@ -1201,5 +1201,5 @@
         Assert(pThisR3->cCachedIotlbes > 0);
         --pThisR3->cCachedIotlbes;
-        STAM_COUNTER_DEC(&pThis->StatIotlbeCached);
+        STAM_COUNTER_DEC(&pThis->StatIotlbeCached); NOREF(pThis);
     }
     return pIotlbe;
@@ -3800,5 +3800,5 @@
     STAM_PROFILE_ADV_START(&pThis->StatProfDteLookup, a);
     int rc = iommuAmdIoPageTableWalk(pDevIns, uIovaPage, fPerm, pAux->uDeviceId, pAux->pDte, pAux->enmOp, pPageLookup);
-    STAM_PROFILE_ADV_STOP(&pThis->StatProfDteLookup, a);
+    STAM_PROFILE_ADV_STOP(&pThis->StatProfDteLookup, a); NOREF(pThis);
     return rc;
 }
@@ -3962,5 +3962,5 @@
                         Assert(cbContiguous > 0 && cbContiguous < cbAccess);
                         rc = VINF_SUCCESS;
-                        STAM_COUNTER_INC(&pThis->StatAccessDteNonContig);
+                        STAM_COUNTER_INC(&pThis->StatAccessDteNonContig); NOREF(pThis);
                     }
 
@@ -4196,9 +4196,7 @@
  * @param   penmOp      Where to store the IOMMU operation.
  * @param   pfPerm      Where to store the IOMMU I/O permission.
- * @param   pStatRead   The stat counter to increment for a read operation.
- * @param   pStatWrite  The stat counter to increment for a write operation.
- */
-DECLINLINE(void) iommuAmdMemAccessGetPermAndOp(uint32_t fFlags, PIOMMUOP penmOp, uint8_t *pfPerm, PSTAMCOUNTER pStatRead,
-                                               PSTAMCOUNTER pStatWrite)
+ * @param   fBulk       Whether this is a bulk read or write.
+ */
+DECLINLINE(void) iommuAmdMemAccessGetPermAndOp(uint32_t fFlags, PIOMMUOP penmOp, uint8_t *pfPerm, bool fBulk)
 {
     if (fFlags & PDMIOMMU_MEM_F_WRITE)
@@ -4206,5 +4204,12 @@
         *penmOp = IOMMUOP_MEM_WRITE;
         *pfPerm = IOMMU_IO_PERM_WRITE;
-        STAM_COUNTER_INC(pStatWrite);
+#ifdef VBOX_WITH_STATISTICS
+        if (!fBulk)
+            STAM_COUNTER_INC(pThis->CTX_SUFF_Z(StatMemRead));
+        else
+            STAM_COUNTER_INC(pThis->CTX_SUFF_Z(StatMemBulkRead));
+#else
+        RT_NOREF(fBulk);
+#endif
     }
     else
@@ -4213,5 +4218,12 @@
         *penmOp = IOMMUOP_MEM_READ;
         *pfPerm = IOMMU_IO_PERM_READ;
-        STAM_COUNTER_INC(pStatRead);
+#ifdef VBOX_WITH_STATISTICS
+        if (!fBulk)
+            STAM_COUNTER_INC(pThis->CTX_SUFF_Z(StatMemWrite));
+        else
+            STAM_COUNTER_INC(pThis->CTX_SUFF_Z(StatMemBulkWrite));
+#else
+        RT_NOREF(fBulk);
+#endif
     }
 }
@@ -4248,6 +4260,7 @@
         IOMMUOP enmOp;
         uint8_t fPerm;
-        iommuAmdMemAccessGetPermAndOp(fFlags, &enmOp, &fPerm, &pThis->CTX_SUFF_Z(StatMemRead), &pThis->CTX_SUFF_Z(StatMemWrite));
+        iommuAmdMemAccessGetPermAndOp(fFlags, &enmOp, &fPerm, false /* fBulk */);
         LogFlowFunc(("%s: uDevId=%#x uIova=%#RX64 cb=%zu\n", iommuAmdMemAccessGetPermName(fPerm), uDevId, uIova, cbAccess));
+        NOREF(pThis);
 
         int rc;
@@ -4257,5 +4270,5 @@
         if (rc == VINF_SUCCESS)
         {
-            /* Entire access was cached and permissions were valid. */
+            /* All pages in the access were found in the cache with sufficient permissions. */
             Assert(*pcbContiguous == cbAccess);
             Assert(*pGCPhysSpa != NIL_RTGCPHYS);
@@ -4267,5 +4280,5 @@
         else
         {
-            /* Access stopped when translations resulted in non-contiguous memory, let caller resume access. */
+            /* Access stopped since translations resulted in non-contiguous memory, let caller resume access. */
             Assert(*pcbContiguous > 0 && *pcbContiguous < cbAccess);
             STAM_COUNTER_INC(&pThis->StatAccessCacheNonContig);
@@ -4281,5 +4294,5 @@
         uIova    += *pcbContiguous;
         cbAccess -= *pcbContiguous;
-        /* FYI: We currently would be also be including permission denied as cache misses too.*/
+        /* We currently are including any permission denied pages as cache misses too.*/
         STAM_COUNTER_INC(&pThis->StatAccessCacheMiss);
 #endif
@@ -4335,6 +4348,5 @@
         IOMMUOP enmOp;
         uint8_t fPerm;
-        iommuAmdMemAccessGetPermAndOp(fFlags, &enmOp, &fPerm, &pThis->CTX_SUFF_Z(StatMemBulkRead),
-                                      &pThis->CTX_SUFF_Z(StatMemBulkWrite));
+        iommuAmdMemAccessGetPermAndOp(fFlags, &enmOp, &fPerm, true /* fBulk */);
         LogFlowFunc(("%s: uDevId=%#x cIovas=%zu\n", iommuAmdMemAccessGetPermName(fPerm), uDevId, cIovas));