Index: /trunk/src/VBox/VMM/VMMR0/HMR0A.asm
===================================================================
--- /trunk/src/VBox/VMM/VMMR0/HMR0A.asm	(revision 87310)
+++ /trunk/src/VBox/VMM/VMMR0/HMR0A.asm	(revision 87311)
@@ -39,34 +39,22 @@
 %define XMM_OFF_IN_X86FXSTATE   160
 
-;; Spectre filler for 32-bit mode.
-; Some user space address that points to a 4MB page boundrary in hope that it
-; will somehow make it less useful.
-%define SPECTRE_FILLER32        0x227fffff
 ;; Spectre filler for 64-bit mode.
 ; Choosen to be an invalid address (also with 5 level paging).
-%define SPECTRE_FILLER64        0x02204204207fffff
-;; Spectre filler for the current CPU mode.
-%ifdef RT_ARCH_AMD64
- %define SPECTRE_FILLER         SPECTRE_FILLER64
-%else
- %define SPECTRE_FILLER         SPECTRE_FILLER32
-%endif
+%define SPECTRE_FILLER          0x02204204207fffff
 
 ;;
 ; Determine skipping restoring of GDTR, IDTR, TR across VMX non-root operation.
 ;
-%ifdef RT_ARCH_AMD64
- %define VMX_SKIP_GDTR
- %define VMX_SKIP_TR
- %define VBOX_SKIP_RESTORE_SEG
- %ifdef RT_OS_DARWIN
-  ; Load the NULL selector into DS, ES, FS and GS on 64-bit darwin so we don't
-  ; risk loading a stale LDT value or something invalid.
-  %define HM_64_BIT_USE_NULL_SEL
-  ; Darwin (Mavericks) uses IDTR limit to store the CPU Id so we need to restore it always.
-  ; See @bugref{6875}.
- %else
-  %define VMX_SKIP_IDTR
- %endif
+%define VMX_SKIP_GDTR
+%define VMX_SKIP_TR
+%define VBOX_SKIP_RESTORE_SEG
+%ifdef RT_OS_DARWIN
+ ; Load the NULL selector into DS, ES, FS and GS on 64-bit darwin so we don't
+ ; risk loading a stale LDT value or something invalid.
+ %define HM_64_BIT_USE_NULL_SEL
+ ; Darwin (Mavericks) uses IDTR limit to store the CPU Id so we need to restore it always.
+ ; See @bugref{6875}.
+%else
+ %define VMX_SKIP_IDTR
 %endif
 
@@ -88,5 +76,5 @@
 
 %ifdef ASM_CALL64_GCC
- %macro MYPUSHAD64 0
+ %macro MYPUSHAD 0
    push    r15
    push    r14
@@ -95,5 +83,5 @@
    push    rbx
  %endmacro
- %macro MYPOPAD64 0
+ %macro MYPOPAD 0
    pop     rbx
    pop     r12
@@ -104,5 +92,5 @@
 
 %else ; ASM_CALL64_MSC
- %macro MYPUSHAD64 0
+ %macro MYPUSHAD 0
    push    r15
    push    r14
@@ -113,5 +101,5 @@
    push    rdi
  %endmacro
- %macro MYPOPAD64 0
+ %macro MYPOPAD 0
    pop     rdi
    pop     rsi
@@ -125,12 +113,12 @@
 
 %ifdef VBOX_SKIP_RESTORE_SEG
- %macro MYPUSHSEGS64 2
+ %macro MYPUSHSEGS 2
  %endmacro
 
- %macro MYPOPSEGS64 2
+ %macro MYPOPSEGS 2
  %endmacro
 %else       ; !VBOX_SKIP_RESTORE_SEG
  ; Trashes, rax, rdx & rcx.
- %macro MYPUSHSEGS64 2
+ %macro MYPUSHSEGS 2
   %ifndef HM_64_BIT_USE_NULL_SEL
    mov     %2, es
@@ -162,5 +150,5 @@
 
  ; trashes, rax, rdx & rcx
- %macro MYPOPSEGS64 2
+ %macro MYPOPSEGS 2
    ; Note: do not step through this code with a debugger!
   %ifndef HM_64_BIT_USE_NULL_SEL
@@ -198,35 +186,4 @@
 %endif ; VBOX_SKIP_RESTORE_SEG
 
-%macro MYPUSHAD32 0
-  pushad
-%endmacro
-%macro MYPOPAD32 0
-  popad
-%endmacro
-
-%macro MYPUSHSEGS32 2
-  push    ds
-  push    es
-  push    fs
-  push    gs
-%endmacro
-%macro MYPOPSEGS32 2
-  pop     gs
-  pop     fs
-  pop     es
-  pop     ds
-%endmacro
-
-%ifdef RT_ARCH_AMD64
- %define MYPUSHAD       MYPUSHAD64
- %define MYPOPAD        MYPOPAD64
- %define MYPUSHSEGS     MYPUSHSEGS64
- %define MYPOPSEGS      MYPOPSEGS64
-%else
- %define MYPUSHAD       MYPUSHAD32
- %define MYPOPAD        MYPOPAD32
- %define MYPUSHSEGS     MYPUSHSEGS32
- %define MYPOPSEGS      MYPOPSEGS32
-%endif
 
 ;;
@@ -310,6 +267,5 @@
 ALIGNCODE(16)
 BEGINPROC VMXRestoreHostState
-%ifdef RT_ARCH_AMD64
- %ifndef ASM_CALL64_GCC
+%ifndef ASM_CALL64_GCC
     ; Use GCC's input registers since we'll be needing both rcx and rdx further
     ; down with the wrmsr instruction.  Use the R10 and R11 register for saving
@@ -319,5 +275,5 @@
     mov         rdi, rcx
     mov         rsi, rdx
- %endif
+%endif
 
     test        edi, VMX_RESTORE_HOST_GDTR
@@ -413,11 +369,8 @@
 .restore_success:
     mov         eax, VINF_SUCCESS
- %ifndef ASM_CALL64_GCC
+%ifndef ASM_CALL64_GCC
     ; Restore RDI and RSI on MSC.
     mov         rdi, r10
     mov         rsi, r11
- %endif
-%else  ; RT_ARCH_X86
-    mov         eax, VERR_NOT_IMPLEMENTED
 %endif
     ret
@@ -800,5 +753,4 @@
 
 
-%ifdef RT_ARCH_AMD64
 ;; @def RESTORE_STATE_VM64
 ; Macro restoring essential host state and updating guest state
@@ -824,5 +776,5 @@
 
     mov     qword [xDI + CPUMCTX.eax], rax
-    mov     rax, SPECTRE_FILLER64
+    mov     rax, SPECTRE_FILLER
     mov     qword [xDI + CPUMCTX.ebx], rbx
     mov     rbx, rax
@@ -1070,5 +1022,4 @@
     jmp     .vmstart64_end
 ENDPROC VMXR0StartVM64
-%endif ; RT_ARCH_AMD64
 
 
@@ -1085,5 +1036,4 @@
 
 
-%ifdef RT_ARCH_AMD64
 ;;
 ; Prepares for and executes VMRUN (32-bit and 64-bit guests).
@@ -1211,5 +1161,5 @@
 
     mov     qword [rax + CPUMCTX.ebx], rbx
-    mov     rbx, SPECTRE_FILLER64
+    mov     rbx, SPECTRE_FILLER
     mov     qword [rax + CPUMCTX.ecx], rcx
     mov     rcx, rbx
@@ -1261,4 +1211,3 @@
     ret
 ENDPROC SVMR0VMRun
-%endif ; RT_ARCH_AMD64
-
+
