Index: /trunk/include/iprt/asm-arm.h
===================================================================
--- /trunk/include/iprt/asm-arm.h	(revision 87255)
+++ /trunk/include/iprt/asm-arm.h	(revision 87256)
@@ -87,9 +87,10 @@
 #endif
 
-#if 0
-/**
- * Gets the content of the CPU timestamp counter register.
- *
- * @returns TSC.
+
+/**
+ * Gets the content of the CNTVCT_EL0 (or CNTPCT) register.
+ *
+ * @returns CNTVCT_EL0 value.
+ * @note    We call this TSC to better fit in with existing x86/amd64 based code.
  */
 #if RT_INLINE_ASM_EXTERNAL
@@ -98,12 +99,30 @@
 DECLINLINE(uint64_t) ASMReadTSC(void)
 {
-    RTUINT64U u;
-# if RT_INLINE_ASM_GNU_STYLE
-# else
-#  error "Unsupported compiler"
-# endif
-    return u.u;
-}
-#endif
+# if RT_INLINE_ASM_GNU_STYLE
+    uint64_t u64;
+#  ifdef RT_ARCH_ARM64
+    __asm__ __volatile__("isb\n\t"
+                         "mrs %0, CNTVCT_EL0\n\t"
+                         : "=r" (u64));
+#  else
+    uint32_t u32Spill;
+    uint32_t u32Comp;
+    __asm__ __volatile__("isb\n"
+                         "Lagain:\n\t"
+                         "mrrc p15, 0, %[uSpill], %H[uRet],   c14\n\t"  /* CNTPCT high into uRet.hi */
+                         "mrrc p15, 0, %[uRet],   %[uSpill],  c14\n\t"  /* CNTPCT low  into uRet.lo */
+                         "mrrc p15, 0, %[uSpill], %[uHiComp], c14\n\t"  /* CNTPCT high into uHiComp */
+                         "cmp  %H[uRet], %[uHiComp]\n\t"
+                         "b.eq Lagain\n\t"                              /* Redo if high value changed. */
+                         : [uRet] "=r" (u64)
+                         , "=r" (uHiComp)
+                         , "=r" (uSpill));
+#  endif
+    return u64;
+
+# else
+#  error "Unsupported compiler"
+# endif
+}
 #endif
 
Index: /trunk/src/VBox/Runtime/testcase/tstRTInlineAsm.cpp
===================================================================
--- /trunk/src/VBox/Runtime/testcase/tstRTInlineAsm.cpp	(revision 87255)
+++ /trunk/src/VBox/Runtime/testcase/tstRTInlineAsm.cpp	(revision 87256)
@@ -44,4 +44,7 @@
 # include <iprt/asm-amd64-x86.h>
 # include <iprt/x86.h>
+#elif defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32)
+# include <iprt/asm-arm.h>
+# include <iprt/time.h>
 #else
 # include <iprt/time.h>
@@ -2676,5 +2679,5 @@
     RTTestSub(g_hTest, "Benchmarking");
 
-#if 0 && !defined(GCC44_32BIT_PIC) && (defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86))
+#if 0 && !defined(GCC44_32BIT_PIC) && (defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86) || defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32))
 # define BENCH(op, str) \
     do { \
@@ -2706,5 +2709,5 @@
     } while (0)
 #endif
-#if (defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86)) && !defined(GCC44_32BIT_PIC)
+#if (defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86) || defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32)) && !defined(GCC44_32BIT_PIC)
 # define BENCH_TSC(op, str) \
     do { \
@@ -2804,4 +2807,7 @@
     BENCH(s_u32 = ASMGetApicIdExt8000001E(),    "ASMGetApicIdExt8000001E");
 #endif
+#if !defined(GCC44_32BIT_PIC) && (defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86)  || defined(RT_ARCH_ARM64) || defined(RT_ARCH_ARM32))
+    BENCH(s_u64 = ASMReadTSC(),                 "ASMReadTSC");
+#endif
 #if !defined(GCC44_32BIT_PIC) && (defined(RT_ARCH_AMD64) || defined(RT_ARCH_X86))
     uint32_t uAux;
@@ -2813,5 +2819,4 @@
         BENCH(s_u64 = ASMReadTscWithAux(&uAux),  "ASMReadTscWithAux");
     }
-    BENCH(s_u64 = ASMReadTSC(),                 "ASMReadTSC");
     union
     {