Index: /trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp
===================================================================
--- /trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp	(revision 86862)
+++ /trunk/src/VBox/Devices/Bus/DevIommuAmd.cpp	(revision 86863)
@@ -3463,7 +3463,5 @@
                         }
 
-                        /* Paranoia. */
-                        Assert(uIntrCtrl == IOMMU_INTR_CTRL_RSVD);
-
+                        Assert(uIntrCtrl == IOMMU_INTR_CTRL_RSVD); /* Paranoia. */
                         LogFunc(("IntCtl mode invalid %#x -> Illegal DTE\n", uIntrCtrl));
                         EVT_ILLEGAL_DTE_T Event;
@@ -3486,11 +3484,21 @@
                 }
 
-                if (fPassThru)
+                /*
+                 * For those other than fixed and arbitrated interrupts, destination mode must be 0 (physical).
+                 * See AMD IOMMU spec. The note below Table 19: "IOMMU Controls and Actions for Upstream Interrupts".
+                 */
+                if (   u8DeliveryMode <= VBOX_MSI_DELIVERY_MODE_LOWEST_PRIO
+                    || !pMsiIn->Addr.n.u1DestMode)
                 {
-                    *pMsiOut = *pMsiIn;
-                    return VINF_SUCCESS;
+                    if (fPassThru)
+                    {
+                        *pMsiOut = *pMsiIn;
+                        return VINF_SUCCESS;
+                    }
+                    LogFunc(("Remapping/passthru disallowed for interrupt %#x -> Target abort\n", pMsiIn->Data.n.u8Vector));
                 }
-
-                LogFunc(("Remapping/passthru disallowed for interrupt (%#x) -> Target abort\n", pMsiIn->Data.n.u8Vector));
+                else
+                    LogFunc(("Logical destination mode invalid for delivery mode %#x\n -> Target abort\n", u8DeliveryMode));
+
                 iommuAmdSetPciTargetAbort(pDevIns);
                 return VERR_IOMMU_INTR_REMAP_DENIED;