Index: /trunk/src/VBox/Devices/Network/DevE1000.cpp
===================================================================
--- /trunk/src/VBox/Devices/Network/DevE1000.cpp	(revision 82346)
+++ /trunk/src/VBox/Devices/Network/DevE1000.cpp	(revision 82347)
@@ -1780,5 +1780,6 @@
     while (csum >> 16)
         csum = (csum >> 16) + (csum & 0xFFFF);
-    return ~csum;
+    Assert(csum < 65536);
+    return (uint16_t)~csum;
 }
 
@@ -2917,5 +2918,5 @@
 {
 #ifdef IN_RING3
-    uint32_t value;
+    uint32_t value = 0; /* Get rid of false positive in parfait. */
     int      rc = e1kRegReadDefault(pDevIns, pThis, offset, index, &value);
     if (RT_SUCCESS(rc))
@@ -3243,5 +3244,6 @@
         E1kLog2(("%s e1kRegWriteRCTL: Setting receive buffer size to %d (old %d)\n",
                  pThis->szPrf, cbRxBuf, pThis->u16RxBSize));
-    pThis->u16RxBSize = cbRxBuf;
+    Assert(cbRxBuf < 65536);
+    pThis->u16RxBSize = (uint16_t)cbRxBuf;
 
     /* Update the register */
@@ -4041,7 +4043,7 @@
     {
         E1kLog3(("%s Inserting VLAN tag %08x\n",
-            pThis->szPrf, RT_BE2H_U16(VET) | (RT_BE2H_U16(pThis->u16VTagTCI) << 16)));
+            pThis->szPrf, RT_BE2H_U16((uint16_t)VET) | (RT_BE2H_U16(pThis->u16VTagTCI) << 16)));
         memmove((uint8_t*)pSg->aSegs[0].pvSeg + 16, (uint8_t*)pSg->aSegs[0].pvSeg + 12, cbFrame - 12);
-        *((uint32_t*)pSg->aSegs[0].pvSeg + 3) = RT_BE2H_U16(VET) | (RT_BE2H_U16(pThis->u16VTagTCI) << 16);
+        *((uint32_t*)pSg->aSegs[0].pvSeg + 3) = RT_BE2H_U16((uint16_t)VET) | (RT_BE2H_U16(pThis->u16VTagTCI) << 16);
         pSg->cbUsed += 4;
         cbFrame     += 4;
@@ -4378,5 +4380,6 @@
         while (csum >> 16)
             csum = (csum >> 16) + (csum & 0xFFFF);
-        pTcpHdr->chksum = csum;
+        Assert(csum < 65536);
+        pTcpHdr->chksum = (uint16_t)csum;
         /* Compute final checksum */
         e1kInsertChecksum(pThis, pThis->aTxPacketFallback, pThis->u16TxPktLen,
@@ -5954,5 +5957,5 @@
     for (unsigned i = E1K_NUM_OF_BINARY_SEARCHABLE; i < RT_ELEMENTS(g_aE1kRegMap); i++)
         if (offReg - g_aE1kRegMap[i].offset < g_aE1kRegMap[i].size)
-            return i;
+            return (int)i;
 
 # ifdef VBOX_STRICT
@@ -6012,5 +6015,5 @@
             return PDMDevHlpDBGFStop(pDevIns, RT_SRC_POS, "unsupported op size: offset=%#10x cb=%#10x\n", offReg, cb);
     }
-    if (index != -1)
+    if (index > 0)
     {
         RT_UNTRUSTED_VALIDATED_FENCE(); /* paranoia because of port I/O. */
@@ -6032,5 +6035,5 @@
             //pThis->iStatIntLost += pThis->iStatIntLostOne;
             //pThis->iStatIntLostOne = 0;
-            rc = g_aE1kRegMap[index].pfnRead(pDevIns, pThis, offReg & 0xFFFFFFFC, index, &u32);
+            rc = g_aE1kRegMap[index].pfnRead(pDevIns, pThis, offReg & 0xFFFFFFFC, (uint32_t)index, &u32);
             u32 &= mask;
             //e1kCsLeave(pThis);
@@ -6078,5 +6081,5 @@
     VBOXSTRICTRC rc     = VINF_SUCCESS;
     int          idxReg = e1kRegLookup(offReg);
-    if (RT_LIKELY(idxReg != -1))
+    if (RT_LIKELY(idxReg > 0))
     {
         RT_UNTRUSTED_VALIDATED_FENCE(); /* paranoia because of port I/O. */
@@ -6093,5 +6096,5 @@
             //pThis->iStatIntLost += pThis->iStatIntLostOne;
             //pThis->iStatIntLostOne = 0;
-            rc = g_aE1kRegMap[idxReg].pfnRead(pDevIns, pThis, offReg & 0xFFFFFFFC, idxReg, pu32);
+            rc = g_aE1kRegMap[idxReg].pfnRead(pDevIns, pThis, offReg & 0xFFFFFFFC, (uint32_t)idxReg, pu32);
             //e1kCsLeave(pThis);
             Log6(("%s At %08X read  %08X          from %s (%s)\n",
@@ -6126,5 +6129,5 @@
     VBOXSTRICTRC rc    = VINF_SUCCESS;
     int          index = e1kRegLookup(offReg);
-    if (RT_LIKELY(index != -1))
+    if (RT_LIKELY(index > 0))
     {
         RT_UNTRUSTED_VALIDATED_FENCE(); /* paranoia because of port I/O. */
@@ -6143,5 +6146,5 @@
             //pThis->iStatIntLost += pThis->iStatIntLostOne;
             //pThis->iStatIntLostOne = 0;
-            rc = g_aE1kRegMap[index].pfnWrite(pDevIns, pThis, offReg, index, u32Value);
+            rc = g_aE1kRegMap[index].pfnWrite(pDevIns, pThis, offReg, (uint32_t)index, u32Value);
             //e1kCsLeave(pThis);
         }
@@ -7790,6 +7793,6 @@
         LogRel(("%s: WARNING! Link up delay is disabled!\n", pThis->szPrf));
 
-    uint32_t uStatNo = iInstance;
-    rc = pHlp->pfnCFGMQueryU32Def(pCfg, "StatNo", &uStatNo, iInstance);
+    uint32_t uStatNo = (uint32_t)iInstance;
+    rc = pHlp->pfnCFGMQueryU32Def(pCfg, "StatNo", &uStatNo, (uint32_t)iInstance);
     if (RT_FAILURE(rc))
         return PDMDEV_SET_ERROR(pDevIns, rc, N_("Configuration error: Failed to get the \"StatNo\" value"));
Index: /trunk/src/VBox/Devices/Network/DevE1000Phy.cpp
===================================================================
--- /trunk/src/VBox/Devices/Network/DevE1000Phy.cpp	(revision 82346)
+++ /trunk/src/VBox/Devices/Network/DevE1000Phy.cpp	(revision 82347)
@@ -50,8 +50,4 @@
 
 #define REG(x) pPhy->au16Regs[x##_IDX]
-
-
-/* External callback declaration */
-void e1kPhyLinkResetCallback(PPDMDEVINS pDevIns);
 
 
@@ -244,5 +240,5 @@
         if (s_regMap[index].u32Address == u32Address)
         {
-            return index;
+            return (int)index;
         }
     }
@@ -263,7 +259,7 @@
     uint16_t u16   = 0;
 
-    if (index != -1)
-    {
-        u16 = s_regMap[index].pfnRead(pPhy, index, pDevIns);
+    if (index > 0)
+    {
+        u16 = s_regMap[index].pfnRead(pPhy, (uint32_t)index, pDevIns);
         PhyLog(("PHY#%d At %02d read  %04X      from %s (%s)\n",
                 pPhy->iInstance, s_regMap[index].u32Address, u16,
@@ -288,10 +284,10 @@
     int index = Phy::lookupRegister(u32Address);
 
-    if (index != -1)
+    if (index > 0)
     {
         PhyLog(("PHY#%d At %02d write      %04X  to  %s (%s)\n",
                 pPhy->iInstance, s_regMap[index].u32Address, u16Value,
                 s_regMap[index].pszAbbrev, s_regMap[index].pszName));
-        s_regMap[index].pfnWrite(pPhy, index, u16Value, pDevIns);
+        s_regMap[index].pfnWrite(pPhy, (uint32_t)index, u16Value, pDevIns);
     }
     else
Index: /trunk/src/VBox/Devices/Network/DevE1000Phy.h
===================================================================
--- /trunk/src/VBox/Devices/Network/DevE1000Phy.h	(revision 82346)
+++ /trunk/src/VBox/Devices/Network/DevE1000Phy.h	(revision 82347)
@@ -108,4 +108,8 @@
 #define MDIO_WRITE_OP 1
 
+/* External callback declaration */
+void e1kPhyLinkResetCallback(PPDMDEVINS pDevIns);
+
+
 typedef struct Phy::Phy_st PHY;
 typedef PHY *PPHY;
Index: /trunk/src/VBox/Devices/Network/DevEEPROM.cpp
===================================================================
--- /trunk/src/VBox/Devices/Network/DevEEPROM.cpp	(revision 82346)
+++ /trunk/src/VBox/Devices/Network/DevEEPROM.cpp	(revision 82347)
@@ -115,5 +115,5 @@
 EEPROM93C46::State EEPROM93C46::opWriteAll()
 {
-    for (int i = 0; i < SIZE; i++)
+    for (unsigned i = 0; i < SIZE; i++)
         storeWord(i, m_u16Word);
     return WAITING_CS_FALL;
@@ -264,7 +264,7 @@
     pHlp->pfnSSMPutU8(  pSSM, EEPROM93C46_SAVEDSTATE_VERSION);
     Assert((uint32_t)m_eState < UINT32_C(256));
-    pHlp->pfnSSMPutU8(  pSSM, m_eState);
+    pHlp->pfnSSMPutU8(  pSSM, (uint8_t)m_eState);
     Assert((uint32_t)m_eOp < UINT32_C(256));
-    pHlp->pfnSSMPutU8(  pSSM, m_eOp);
+    pHlp->pfnSSMPutU8(  pSSM, (uint8_t)m_eOp);
     pHlp->pfnSSMPutBool(pSSM, m_fWriteEnabled);
     pHlp->pfnSSMPutU32( pSSM, m_u32InternalWires);