Index: /trunk/src/VBox/Devices/Audio/DevIchAc97.cpp
===================================================================
--- /trunk/src/VBox/Devices/Audio/DevIchAc97.cpp	(revision 82343)
+++ /trunk/src/VBox/Devices/Audio/DevIchAc97.cpp	(revision 82344)
@@ -501,9 +501,9 @@
     /** R3 pointer to the device instance. */
     PPDMDEVINSR3            pDevInsR3;
-    /** R0 pointer to the device instance. */
-    PPDMDEVINSR0            pDevInsR0;
-    /** RC pointer to the device instance. */
-    PPDMDEVINSRC            pDevInsRC;
-    bool                    afPadding0[4];
+//    /** R0 pointer to the device instance. */
+//    PPDMDEVINSR0            pDevInsR0;
+//    /** RC pointer to the device instance. */
+//    PPDMDEVINSRC            pDevInsRC;
+//    bool                    afPadding0[4];
     /** Global Control (Bus Master Control Register). */
     uint32_t                glob_cnt;
@@ -631,6 +631,6 @@
 static uint32_t           ichac97R3StreamGetUsed(PAC97STREAM pStream);
 static uint32_t           ichac97R3StreamGetFree(PAC97STREAM pStream);
-static int                ichac97R3StreamTransfer(PAC97STATE pThis, PAC97STREAM pStream, uint32_t cbToProcessMax);
-static void               ichac97R3StreamUpdate(PAC97STATE pThis, PAC97STREAM pStream, bool fInTimer);
+static int                ichac97R3StreamTransfer(PPDMDEVINS pDevIns, PAC97STATE pThis, PAC97STREAM pStream, uint32_t cbToProcessMax);
+static void               ichac97R3StreamUpdate(PPDMDEVINS pDevIns, PAC97STATE pThis, PAC97STREAM pStream, bool fInTimer);
 
 static DECLCALLBACK(void) ichac97R3Reset(PPDMDEVINS pDevIns);
@@ -734,11 +734,11 @@
  * Updates the status register (SR) of an AC'97 audio stream.
  *
+ * @param   pDevIns             The device instance.
  * @param   pThis               AC'97 state.
  * @param   pStream             AC'97 stream to update SR for.
  * @param   new_sr              New value for status register (SR).
  */
-static void ichac97StreamUpdateSR(PAC97STATE pThis, PAC97STREAM pStream, uint32_t new_sr)
-{
-    PPDMDEVINS  pDevIns = ICHAC97STATE_2_DEVINS(pThis);
+static void ichac97StreamUpdateSR(PPDMDEVINS pDevIns, PAC97STATE pThis, PAC97STREAM pStream, uint32_t new_sr)
+{
     PAC97BMREGS pRegs   = &pStream->Regs;
 
@@ -791,9 +791,10 @@
  * Writes a new value to a stream's status register (SR).
  *
+ * @param   pDevIns             The device instance.
  * @param   pThis               AC'97 device state.
  * @param   pStream             Stream to update SR for.
  * @param   u32Val              New value to set the stream's SR to.
  */
-static void ichac97StreamWriteSR(PAC97STATE pThis, PAC97STREAM pStream, uint32_t u32Val)
+static void ichac97StreamWriteSR(PPDMDEVINS pDevIns, PAC97STATE pThis, PAC97STREAM pStream, uint32_t u32Val)
 {
     PAC97BMREGS pRegs = &pStream->Regs;
@@ -802,5 +803,5 @@
 
     pRegs->sr |= u32Val & ~(AC97_SR_RO_MASK | AC97_SR_WCLEAR_MASK);
-    ichac97StreamUpdateSR(pThis, pStream, pRegs->sr & ~(u32Val & AC97_SR_WCLEAR_MASK));
+    ichac97StreamUpdateSR(pDevIns, pThis, pStream, pRegs->sr & ~(u32Val & AC97_SR_WCLEAR_MASK));
 }
 
@@ -1245,5 +1246,5 @@
             }
 
-            ichac97R3StreamUpdate(pThis, pStream, false /* fInTimer */);
+            ichac97R3StreamUpdate(pDevIns, pThis, pStream, false /* fInTimer */);
 
             int rc3 = RTCritSectLeave(&pAIO->CritSect);
@@ -1470,4 +1471,5 @@
  * (with fInTimer set to @c false).
  *
+ * @param   pDevIns             The device instance.
  * @param   pThis               AC'97 state.
  * @param   pStream             AC'97 stream to update.
@@ -1475,5 +1477,5 @@
  *                              context or an asynchronous I/O stream thread (if supported).
  */
-static void ichac97R3StreamUpdate(PAC97STATE pThis, PAC97STREAM pStream, bool fInTimer)
+static void ichac97R3StreamUpdate(PPDMDEVINS pDevIns, PAC97STATE pThis, PAC97STREAM pStream, bool fInTimer)
 {
     RT_NOREF(fInTimer);
@@ -1503,5 +1505,5 @@
 
                 /* Do the DMA transfer. */
-                rc2 = ichac97R3StreamTransfer(pThis, pStream, RT_MIN(pStream->State.cbTransferChunk, cbStreamFree));
+                rc2 = ichac97R3StreamTransfer(pDevIns, pThis, pStream, RT_MIN(pStream->State.cbTransferChunk, cbStreamFree));
                 AssertRC(rc2);
 
@@ -1591,5 +1593,5 @@
                 /* When running synchronously, do the DMA data transfers here.
                  * Otherwise this will be done in the stream's async I/O thread. */
-                rc2 = ichac97R3StreamTransfer(pThis, pStream, cbStreamUsed);
+                rc2 = ichac97R3StreamTransfer(pDevIns, pThis, pStream, cbStreamUsed);
                 AssertRC(rc2);
             }
@@ -2626,5 +2628,5 @@
     Assert(PDMDevHlpTimerIsLockOwner(pDevIns, RT_SAFE_SUBSCRIPT8(pThis->ahTimers, pStream->u8SD)));
 
-    ichac97R3StreamUpdate(pThis, pStream, true /* fInTimer */);
+    ichac97R3StreamUpdate(pDevIns, pThis, pStream, true /* fInTimer */);
 
     PAUDMIXSINK pSink = ichac97R3IndexToSink(pThis, pStream->u8SD);
@@ -2667,9 +2669,10 @@
  *
  * @returns IPRT status code.
+ * @param   pDevIns             The device instance.
  * @param   pThis               AC'97 state.
  * @param   pStream             AC'97 stream to update.
  * @param   cbToProcessMax      Maximum of data (in bytes) to process.
  */
-static int ichac97R3StreamTransfer(PAC97STATE pThis, PAC97STREAM pStream, uint32_t cbToProcessMax)
+static int ichac97R3StreamTransfer(PPDMDEVINS pDevIns, PAC97STATE pThis, PAC97STREAM pStream, uint32_t cbToProcessMax)
 {
     AssertPtrReturn(pThis,       VERR_INVALID_POINTER);
@@ -2852,5 +2855,5 @@
             }
 
-            ichac97StreamUpdateSR(pThis, pStream, new_sr);
+            ichac97StreamUpdateSR(pDevIns, pThis, pStream, new_sr);
         }
 
@@ -3109,5 +3112,5 @@
                         ichac97R3StreamReset(pThis, pStream);
 
-                        ichac97StreamUpdateSR(pThis, pStream, AC97_SR_DCH); /** @todo Do we need to do that? */
+                        ichac97StreamUpdateSR(pDevIns, pThis, pStream, AC97_SR_DCH); /** @todo Do we need to do that? */
                     }
                     else
@@ -3157,5 +3160,5 @@
                 case MC_SR:
                 {
-                    ichac97StreamWriteSR(pThis, pStream, u32);
+                    ichac97StreamWriteSR(pDevIns, pThis, pStream, u32);
                     break;
                 }
@@ -3175,5 +3178,5 @@
                 case PO_SR:
                 case MC_SR:
-                    ichac97StreamWriteSR(pThis, pStream, u32);
+                    ichac97StreamWriteSR(pDevIns, pThis, pStream, u32);
                     break;
                 default:
@@ -3933,14 +3936,4 @@
 
 /**
- * @interface_method_impl{PDMDEVREG,pfnRelocate}
- */
-static DECLCALLBACK(void) ichac97R3Relocate(PPDMDEVINS pDevIns, RTGCINTPTR offDelta)
-{
-    NOREF(offDelta);
-    PAC97STATE pThis = PDMDEVINS_2_DATA(pDevIns, PAC97STATE);
-    pThis->pDevInsRC = PDMDEVINS_2_RCPTR(pDevIns);
-}
-
-/**
  * @interface_method_impl{PDMDEVREG,pfnDestruct}
  */
@@ -3980,6 +3973,4 @@
      */
     pThis->pDevInsR3                = pDevIns;
-    pThis->pDevInsR0                = PDMDEVINS_2_R0PTR(pDevIns);
-    pThis->pDevInsRC                = PDMDEVINS_2_RCPTR(pDevIns);
     pThis->IBase.pfnQueryInterface  = ichac97R3QueryInterface;
     RTListInit(&pThis->lstDrv);
@@ -4337,5 +4328,5 @@
     /* .pfnConstruct = */           ichac97R3Construct,
     /* .pfnDestruct = */            ichac97R3Destruct,
-    /* .pfnRelocate = */            ichac97R3Relocate,
+    /* .pfnRelocate = */            NULL,
     /* .pfnMemSetup = */            NULL,
     /* .pfnPowerOn = */             NULL,