Index: /trunk/include/VBox/vmm/mm.h =================================================================== --- /trunk/include/VBox/vmm/mm.h (revision 82315) +++ /trunk/include/VBox/vmm/mm.h (revision 82316) @@ -264,5 +264,4 @@ VMMR3DECL(int) MMR3HyperMapHCPhys(PVM pVM, void *pvR3, RTR0PTR pvR0, RTHCPHYS HCPhys, size_t cb, const char *pszDesc, PRTGCPTR pGCPtr); VMMR3DECL(int) MMR3HyperMapGCPhys(PVM pVM, RTGCPHYS GCPhys, size_t cb, const char *pszDesc, PRTGCPTR pGCPtr); -VMMR3DECL(int) MMR3HyperMapMMIO2(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTRCPTR pRCPtr); VMMR3DECL(int) MMR3HyperReserve(PVM pVM, unsigned cb, const char *pszDesc, PRTGCPTR pGCPtr); #endif Index: /trunk/include/VBox/vmm/pdmdev.h =================================================================== --- /trunk/include/VBox/vmm/pdmdev.h (revision 82315) +++ /trunk/include/VBox/vmm/pdmdev.h (revision 82316) @@ -1164,5 +1164,5 @@ /** Current PDMPCIHLPR0 version number. */ -#define PDM_PCIHLPR0_VERSION PDM_VERSION_MAKE(0xfffc, 4, 0) +#define PDM_PCIHLPR0_VERSION PDM_VERSION_MAKE(0xfffc, 5, 0) /** @@ -1203,15 +1203,4 @@ */ DECLR3CALLBACKMEMBER(void, pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc)); - - /** - * Checks if the given address is an MMIO2 or pre-registered MMIO base address. - * - * @returns true/false accordingly. - * @param pDevIns The PCI device instance. - * @param pOwner The owner of the memory, optional. - * @param GCPhys The address to check. - * @sa PGMR3PhysMMIOExIsBase - */ - DECLR3CALLBACKMEMBER(bool, pfnIsMMIOExBase,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys)); /** Index: /trunk/include/VBox/vmm/pgm.h =================================================================== --- /trunk/include/VBox/vmm/pgm.h (revision 82315) +++ /trunk/include/VBox/vmm/pgm.h (revision 82316) @@ -726,16 +726,14 @@ RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC, const char *pszDesc); VMMR3DECL(int) PGMR3PhysMMIODeregister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb); -VMMR3_INT_DECL(int) PGMR3PhysMMIO2Register(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, RTGCPHYS cb, +VMMR3_INT_DECL(int) PGMR3PhysMmio2Register(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, const char *pszDesc, void **ppv, PGMMMIO2HANDLE *phRegion); -VMMR3_INT_DECL(int) PGMR3PhysMMIOExDeregister(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, PGMMMIO2HANDLE hMmio2); -VMMR3_INT_DECL(int) PGMR3PhysMMIOExMap(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, PGMMMIO2HANDLE hMmio2, RTGCPHYS GCPhys); -VMMR3_INT_DECL(int) PGMR3PhysMMIOExUnmap(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, PGMMMIO2HANDLE hMmio2, RTGCPHYS GCPhys); -VMMR3_INT_DECL(int) PGMR3PhysMMIOExReduce(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, PGMMMIO2HANDLE hMmio2, RTGCPHYS cbRegion); +VMMR3_INT_DECL(int) PGMR3PhysMmio2Deregister(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2); +VMMR3_INT_DECL(int) PGMR3PhysMmio2Map(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, RTGCPHYS GCPhys); +VMMR3_INT_DECL(int) PGMR3PhysMmio2Unmap(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, RTGCPHYS GCPhys); +VMMR3_INT_DECL(int) PGMR3PhysMmio2Reduce(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, RTGCPHYS cbRegion); VMMR3_INT_DECL(int) PGMR3PhysMmio2ValidateHandle(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2); VMMR3_INT_DECL(RTGCPHYS) PGMR3PhysMmio2GetMappingAddress(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2); -VMMR3_INT_DECL(int) PGMR3PhysMMIOExChangeRegionNo(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, PGMMMIO2HANDLE hMmio2, uint32_t iNewRegion); -VMMR3DECL(bool) PGMR3PhysMMIOExIsBase(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhys); +VMMR3_INT_DECL(int) PGMR3PhysMmio2ChangeRegionNo(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, uint32_t iNewRegion); VMMR3_INT_DECL(int) PGMR3PhysMMIO2GetHCPhys(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, RTGCPHYS off, PRTHCPHYS pHCPhys); -VMMR3_INT_DECL(int) PGMR3PhysMMIO2MapKernel(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTR0PTR pR0Ptr); Index: /trunk/src/VBox/VMM/VMMR3/PDM.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR3/PDM.cpp (revision 82315) +++ /trunk/src/VBox/VMM/VMMR3/PDM.cpp (revision 82316) @@ -837,5 +837,5 @@ pdmR3ThreadDestroyDevice(pVM, pDevIns); PDMR3QueueDestroyDevice(pVM, pDevIns); - PGMR3PhysMMIOExDeregister(pVM, pDevIns, UINT32_MAX, UINT32_MAX, NIL_PGMMMIO2HANDLE); + PGMR3PhysMmio2Deregister(pVM, pDevIns, NIL_PGMMMIO2HANDLE); #ifdef VBOX_WITH_PDM_ASYNC_COMPLETION pdmR3AsyncCompletionTemplateDestroyDevice(pVM, pDevIns); Index: /trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp (revision 82315) +++ /trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp (revision 82316) @@ -237,7 +237,7 @@ AssertReturn(!(iPciRegion & UINT16_MAX), VERR_INVALID_PARAMETER); /* not implemented. */ - /** @todo PGMR3PhysMMIO2Register mangles the description, move it here and + /** @todo PGMR3PhysMmio2Register mangles the description, move it here and * use a real string cache. */ - int rc = PGMR3PhysMMIO2Register(pVM, pDevIns, pPciDev ? pPciDev->Int.s.idxDevCfg : 254, iPciRegion >> 16, + int rc = PGMR3PhysMmio2Register(pVM, pDevIns, pPciDev ? pPciDev->Int.s.idxDevCfg : 254, iPciRegion >> 16, cbRegion, fFlags, pszDesc, ppvMapping, phRegion); @@ -261,5 +261,5 @@ ("state %s, expected DESTROYING or LOADING\n", VMGetStateName(pVM->enmVMState)), VERR_VM_INVALID_VM_STATE); - int rc = PGMR3PhysMMIOExDeregister(pDevIns->Internal.s.pVMR3, pDevIns, UINT32_MAX, UINT32_MAX, hRegion); + int rc = PGMR3PhysMmio2Deregister(pDevIns->Internal.s.pVMR3, pDevIns, hRegion); LogFlow(("pdmR3DevHlp_Mmio2Destroy: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc)); @@ -277,5 +277,5 @@ VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT); - int rc = PGMR3PhysMMIOExMap(pDevIns->Internal.s.pVMR3, pDevIns, UINT32_MAX, UINT32_MAX, hRegion, GCPhys); + int rc = PGMR3PhysMmio2Map(pDevIns->Internal.s.pVMR3, pDevIns, hRegion, GCPhys); LogFlow(("pdmR3DevHlp_Mmio2Map: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc)); @@ -293,5 +293,5 @@ VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT); - int rc = PGMR3PhysMMIOExUnmap(pDevIns->Internal.s.pVMR3, pDevIns, UINT32_MAX, UINT32_MAX, hRegion, NIL_RTGCPHYS); + int rc = PGMR3PhysMmio2Unmap(pDevIns->Internal.s.pVMR3, pDevIns, hRegion, NIL_RTGCPHYS); LogFlow(("pdmR3DevHlp_Mmio2Unmap: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc)); @@ -309,5 +309,5 @@ VM_ASSERT_STATE_RETURN(pVM, VMSTATE_LOADING, VERR_VM_INVALID_VM_STATE); - int rc = PGMR3PhysMMIOExReduce(pDevIns->Internal.s.pVMR3, pDevIns, UINT32_MAX, UINT32_MAX, hRegion, cbRegion); + int rc = PGMR3PhysMmio2Reduce(pDevIns->Internal.s.pVMR3, pDevIns, hRegion, cbRegion); LogFlow(("pdmR3DevHlp_Mmio2Reduce: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc)); @@ -340,5 +340,5 @@ VM_ASSERT_EMT0_RETURN(pVM, VERR_VM_THREAD_NOT_EMT); - int rc = PGMR3PhysMMIOExChangeRegionNo(pVM, pDevIns, UINT32_MAX, UINT32_MAX, hRegion, iNewRegion); + int rc = PGMR3PhysMmio2ChangeRegionNo(pVM, pDevIns, hRegion, iNewRegion); LogFlow(("pdmR3DevHlp_Mmio2ChangeRegionNo: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc)); Index: /trunk/src/VBox/VMM/VMMR3/PDMDevMiscHlp.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR3/PDMDevMiscHlp.cpp (revision 82315) +++ /trunk/src/VBox/VMM/VMMR3/PDMDevMiscHlp.cpp (revision 82316) @@ -169,4 +169,5 @@ } + /** @interface_method_impl{PDMPCIHLPR3,pfnIoApicSetIrq} */ static DECLCALLBACK(void) pdmR3PciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc) @@ -177,4 +178,5 @@ } + /** @interface_method_impl{PDMPCIHLPR3,pfnIoApicSendMsi} */ static DECLCALLBACK(void) pdmR3PciHlp_IoApicSendMsi(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc) @@ -183,14 +185,4 @@ Log4(("pdmR3PciHlp_IoApicSendMsi: address=%p value=%x uTagSrc=%#x\n", GCPhys, uValue, uTagSrc)); PDMIoApicSendMsi(pDevIns->Internal.s.pVMR3, GCPhys, uValue, uTagSrc); -} - -/** @interface_method_impl{PDMPCIHLPR3,pfnIsMMIOExBase} */ -static DECLCALLBACK(bool) pdmR3PciHlp_IsMMIO2Base(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys) -{ - PDMDEV_ASSERT_DEVINS(pDevIns); - VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3); - bool fRc = PGMR3PhysMMIOExIsBase(pDevIns->Internal.s.pVMR3, pOwner, GCPhys); - Log4(("pdmR3PciHlp_IsMMIOExBase: pOwner=%p GCPhys=%RGp -> %RTbool\n", pOwner, GCPhys, fRc)); - return fRc; } @@ -235,5 +227,4 @@ pdmR3PciHlp_IoApicSetIrq, pdmR3PciHlp_IoApicSendMsi, - pdmR3PciHlp_IsMMIO2Base, pdmR3PciHlp_Lock, pdmR3PciHlp_Unlock, Index: /trunk/src/VBox/VMM/VMMR3/PGMPhys.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR3/PGMPhys.cpp (revision 82315) +++ /trunk/src/VBox/VMM/VMMR3/PGMPhys.cpp (revision 82316) @@ -2602,6 +2602,6 @@ * @a iRegion. */ -DECLINLINE(PPGMREGMMIO2RANGE) pgmR3PhysMMIOExFind(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, - uint32_t iRegion, PGMMMIO2HANDLE hMmio2) +DECLINLINE(PPGMREGMMIO2RANGE) pgmR3PhysMmio2Find(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, + uint32_t iRegion, PGMMMIO2HANDLE hMmio2) { if (hMmio2 != NIL_PGMMMIO2HANDLE) @@ -2650,6 +2650,6 @@ * @sa pgmR3PhysRamRangeRelocate */ -static DECLCALLBACK(bool) pgmR3PhysMMIOExRangeRelocate(PVM pVM, RTGCPTR GCPtrOld, RTGCPTR GCPtrNew, - PGMRELOCATECALL enmMode, void *pvUser) +static DECLCALLBACK(bool) pgmR3PhysMmio2RangeRelocate(PVM pVM, RTGCPTR GCPtrOld, RTGCPTR GCPtrNew, + PGMRELOCATECALL enmMode, void *pvUser) { PPGMREGMMIO2RANGE pMmio = (PPGMREGMMIO2RANGE)pvUser; @@ -2696,5 +2696,5 @@ * @param pcbChunk Where to return the guest mapping size for a chunk. */ -static uint16_t pgmR3PhysMMIOExCalcChunkCount(PVM pVM, RTGCPHYS cb, uint32_t *pcPagesPerChunk, uint32_t *pcbChunk) +static uint16_t pgmR3PhysMmio2CalcChunkCount(PVM pVM, RTGCPHYS cb, uint32_t *pcPagesPerChunk, uint32_t *pcbChunk) { RT_NOREF_PV(pVM); /* without raw mode */ @@ -2731,5 +2731,5 @@ * Caller must set type specfic members and initialize the PGMPAGE structures. * - * This was previously also used by PGMR3PhysMMIOExPreRegister, a function for + * This was previously also used by PGMR3PhysMmio2PreRegister, a function for * pre-registering MMIO that was later (6.1) replaced by a new handle based IOM * interface. The reference to caller and type above is purely historical. @@ -2750,6 +2750,6 @@ * @thread EMT */ -static int pgmR3PhysMMIOExCreate(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, RTGCPHYS cb, - const char *pszDesc, PPGMREGMMIO2RANGE *ppHeadRet) +static int pgmR3PhysMmio2Create(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, RTGCPHYS cb, + const char *pszDesc, PPGMREGMMIO2RANGE *ppHeadRet) { /* @@ -2757,5 +2757,5 @@ */ uint32_t cPagesPerChunk; - uint16_t cChunks = pgmR3PhysMMIOExCalcChunkCount(pVM, cb, &cPagesPerChunk, NULL); + uint16_t cChunks = pgmR3PhysMmio2CalcChunkCount(pVM, cb, &cPagesPerChunk, NULL); AssertReturn(cChunks, VERR_PGM_PHYS_MMIO_EX_IPE); @@ -2877,11 +2877,11 @@ /** - * Common worker PGMR3PhysMMIOExPreRegister & PGMR3PhysMMIO2Register that links - * a complete registration entry into the lists and lookup tables. + * Common worker PGMR3PhysMmio2PreRegister & PGMR3PhysMMIO2Register that links a + * complete registration entry into the lists and lookup tables. * * @param pVM The cross context VM structure. * @param pNew The new MMIO / MMIO2 registration to link. */ -static void pgmR3PhysMMIOExLink(PVM pVM, PPGMREGMMIO2RANGE pNew) +static void pgmR3PhysMmio2Link(PVM pVM, PPGMREGMMIO2RANGE pNew) { /* @@ -2968,5 +2968,5 @@ * @thread EMT */ -VMMR3_INT_DECL(int) PGMR3PhysMMIO2Register(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, RTGCPHYS cb, +VMMR3_INT_DECL(int) PGMR3PhysMmio2Register(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, RTGCPHYS cb, uint32_t fFlags, const char *pszDesc, void **ppv, PGMMMIO2HANDLE *phRegion) { @@ -2987,5 +2987,5 @@ AssertPtrReturn(pszDesc, VERR_INVALID_POINTER); AssertReturn(*pszDesc, VERR_INVALID_PARAMETER); - AssertReturn(pgmR3PhysMMIOExFind(pVM, pDevIns, iSubDev, iRegion, NIL_PGMMMIO2HANDLE) == NULL, VERR_ALREADY_EXISTS); + AssertReturn(pgmR3PhysMmio2Find(pVM, pDevIns, iSubDev, iRegion, NIL_PGMMMIO2HANDLE) == NULL, VERR_ALREADY_EXISTS); AssertReturn(!(cb & PAGE_OFFSET_MASK), VERR_INVALID_PARAMETER); AssertReturn(cb, VERR_INVALID_PARAMETER); @@ -3012,5 +3012,5 @@ * the IDs goes from 1 thru PGM_MMIO2_MAX_RANGES. */ - unsigned cChunks = pgmR3PhysMMIOExCalcChunkCount(pVM, cb, NULL, NULL); + unsigned cChunks = pgmR3PhysMmio2CalcChunkCount(pVM, cb, NULL, NULL); pgmLock(pVM); uint8_t idMmio2 = pVM->pgm.s.cMmio2Regions + 1; @@ -3044,5 +3044,5 @@ */ PPGMREGMMIO2RANGE pNew; - rc = pgmR3PhysMMIOExCreate(pVM, pDevIns, iSubDev, iRegion, cb, pszDesc, &pNew); + rc = pgmR3PhysMmio2Create(pVM, pDevIns, iSubDev, iRegion, cb, pszDesc, &pNew); if (RT_SUCCESS(rc)) { @@ -3082,5 +3082,5 @@ pVM->pgm.s.cPrivatePages += cPages; - pgmR3PhysMMIOExLink(pVM, pNew); + pgmR3PhysMmio2Link(pVM, pNew); *ppv = pvPages; @@ -3101,21 +3101,16 @@ /** - * Deregisters and frees an MMIO2 region or a pre-registered MMIO region - * - * Any physical (and virtual) access handlers registered for the region must - * be deregistered before calling this function. + * Deregisters and frees an MMIO2 region. + * + * Any physical access handlers registered for the region must be deregistered + * before calling this function. * * @returns VBox status code. * @param pVM The cross context VM structure. * @param pDevIns The device instance owning the region. - * @param iSubDev The sub-device number. Pass UINT32_MAX for wildcard - * matching or using @a hMmio2. - * @param iRegion The region. Pass UINT32_MAX for wildcard matching - * or using @a hMmio2. - * @param hMmio2 The MMIO2 handle to use instead of iSubDev and - * iRegion, pass NIL to use those two. - */ -VMMR3_INT_DECL(int) PGMR3PhysMMIOExDeregister(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, - uint32_t iRegion, PGMMMIO2HANDLE hMmio2) + * @param hMmio2 The MMIO2 handle to deregister, or NIL if all + * regions for the given device is to be deregistered. + */ +VMMR3_INT_DECL(int) PGMR3PhysMmio2Deregister(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2) { /* @@ -3124,14 +3119,4 @@ VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT); AssertPtrReturn(pDevIns, VERR_INVALID_PARAMETER); - if (hMmio2 != NIL_PGMMMIO2HANDLE) - { - AssertReturn(iSubDev == UINT32_MAX, VERR_INVALID_PARAMETER); - AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER); - } - else - { - AssertReturn(iSubDev <= UINT8_MAX || iSubDev == UINT32_MAX, VERR_INVALID_PARAMETER); - AssertReturn(iRegion <= UINT8_MAX || iRegion == UINT32_MAX, VERR_INVALID_PARAMETER); - } /* @@ -3148,14 +3133,8 @@ uint32_t const fFlags = pCur->fFlags; if ( pCur->pDevInsR3 == pDevIns - && ( hMmio2 == NIL_PGMMMIO2HANDLE - ? ( iRegion == UINT32_MAX - || pCur->iRegion == iRegion) - && ( iSubDev == UINT32_MAX - || pCur->iSubDev == iSubDev) - : pCur->idMmio2 == hMmio2 - && (fFlags & PGMREGMMIO2RANGE_F_MMIO2) - ) - ) - { + && ( hMmio2 == NIL_PGMMMIO2HANDLE + || pCur->idMmio2 == hMmio2)) + { + Assert(fFlags & PGMREGMMIO2RANGE_F_MMIO2); cFound++; @@ -3165,5 +3144,5 @@ if (fFlags & PGMREGMMIO2RANGE_F_MAPPED) { - int rc2 = PGMR3PhysMMIOExUnmap(pVM, pCur->pDevInsR3, pCur->iSubDev, pCur->iRegion, hMmio2, pCur->RamRange.GCPhys); + int rc2 = PGMR3PhysMmio2Unmap(pVM, pCur->pDevInsR3, pCur->idMmio2, pCur->RamRange.GCPhys); AssertRC(rc2); if (RT_FAILURE(rc2) && RT_SUCCESS(rc)) @@ -3260,14 +3239,14 @@ pgmPhysInvalidatePageMapTLB(pVM); pgmUnlock(pVM); - return !cFound && (hMmio2 != NIL_PGMMMIO2HANDLE || (iRegion != UINT32_MAX && iSubDev != UINT32_MAX)) ? VERR_NOT_FOUND : rc; -} - - -/** - * Maps a MMIO2 region or a pre-registered MMIO region. - * - * This is done when a guest / the bios / state loading changes the - * PCI config. The replacing of base memory has the same restrictions - * as during registration, of course. + return !cFound && hMmio2 != NIL_PGMMMIO2HANDLE ? VERR_NOT_FOUND : rc; +} + + +/** + * Maps a MMIO2 region. + * + * This is typically done when a guest / the bios / state loading changes the + * PCI config. The replacing of base memory has the same restrictions as during + * registration, of course. * * @returns VBox status code. @@ -3275,15 +3254,8 @@ * @param pVM The cross context VM structure. * @param pDevIns The device instance owning the region. - * @param iSubDev The sub-device number of the registered region. - * Pass UINT32_MAX if @a hMmio2 is given. - * @param iRegion The index of the registered region. Pass UINT32_MAX - * if @a hMmio2 is given. - * @param hMmio2 The handle of the region to map as an alternative to - * @a iSubDev and @a iRegion, pass NIL to use the - * other two. + * @param hMmio2 The handle of the region to map. * @param GCPhys The guest-physical address to be remapped. */ -VMMR3_INT_DECL(int) PGMR3PhysMMIOExMap(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, - PGMMMIO2HANDLE hMmio2, RTGCPHYS GCPhys) +VMMR3_INT_DECL(int) PGMR3PhysMmio2Map(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, RTGCPHYS GCPhys) { /* @@ -3295,19 +3267,10 @@ VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT); AssertPtrReturn(pDevIns, VERR_INVALID_PARAMETER); - if (hMmio2 != NIL_PGMMMIO2HANDLE) - { - AssertReturn(iSubDev == UINT32_MAX, VERR_INVALID_PARAMETER); - AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER); - } - else - { - AssertReturn(iSubDev <= UINT8_MAX, VERR_INVALID_PARAMETER); - AssertReturn(iRegion <= UINT8_MAX, VERR_INVALID_PARAMETER); - } AssertReturn(GCPhys != NIL_RTGCPHYS, VERR_INVALID_PARAMETER); AssertReturn(GCPhys != 0, VERR_INVALID_PARAMETER); AssertReturn(!(GCPhys & PAGE_OFFSET_MASK), VERR_INVALID_PARAMETER); - - PPGMREGMMIO2RANGE pFirstMmio = pgmR3PhysMMIOExFind(pVM, pDevIns, iSubDev, iRegion, hMmio2); + AssertReturn(hMmio2 != NIL_PGMMMIO2HANDLE, VERR_INVALID_HANDLE); + + PPGMREGMMIO2RANGE pFirstMmio = pgmR3PhysMmio2Find(pVM, pDevIns, UINT32_MAX, UINT32_MAX, hMmio2); AssertReturn(pFirstMmio, VERR_NOT_FOUND); Assert(pFirstMmio->fFlags & PGMREGMMIO2RANGE_F_FIRST_CHUNK); @@ -3386,5 +3349,5 @@ pRam = pRam->pNextR3; } - Log(("PGMR3PhysMMIOExMap: %RGp-%RGp fRamExists=%RTbool %s\n", GCPhys, GCPhysLast, fRamExists, pFirstMmio->RamRange.pszDesc)); + Log(("PGMR3PhysMmio2Map: %RGp-%RGp fRamExists=%RTbool %s\n", GCPhys, GCPhysLast, fRamExists, pFirstMmio->RamRange.pszDesc)); @@ -3573,12 +3536,11 @@ /** - * Unmaps a MMIO2 or a pre-registered MMIO region. - * - * This is done when a guest / the bios / state loading changes the - * PCI config. The replacing of base memory has the same restrictions - * as during registration, of course. - */ -VMMR3_INT_DECL(int) PGMR3PhysMMIOExUnmap(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, - PGMMMIO2HANDLE hMmio2, RTGCPHYS GCPhys) + * Unmaps an MMIO2 region. + * + * This is typically done when a guest / the bios / state loading changes the + * PCI config. The replacing of base memory has the same restrictions as during + * registration, of course. + */ +VMMR3_INT_DECL(int) PGMR3PhysMmio2Unmap(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, RTGCPHYS GCPhys) { /* @@ -3587,15 +3549,5 @@ VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT); AssertPtrReturn(pDevIns, VERR_INVALID_PARAMETER); - if (hMmio2 != NIL_PGMMMIO2HANDLE) - { - AssertReturn(iSubDev == UINT32_MAX, VERR_INVALID_PARAMETER); - AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER); - } - else - { - AssertReturn(iSubDev <= UINT8_MAX, VERR_INVALID_PARAMETER); - AssertReturn(iRegion <= UINT8_MAX, VERR_INVALID_PARAMETER); - AssertReturn(GCPhys != NIL_RTGCPHYS, VERR_INVALID_PARAMETER); - } + AssertReturn(hMmio2 != NIL_PGMMMIO2HANDLE, VERR_INVALID_HANDLE); if (GCPhys != NIL_RTGCPHYS) { @@ -3604,7 +3556,10 @@ } - PPGMREGMMIO2RANGE pFirstMmio = pgmR3PhysMMIOExFind(pVM, pDevIns, iSubDev, iRegion, hMmio2); + PPGMREGMMIO2RANGE pFirstMmio = pgmR3PhysMmio2Find(pVM, pDevIns, UINT32_MAX, UINT32_MAX, hMmio2); AssertReturn(pFirstMmio, VERR_NOT_FOUND); Assert(pFirstMmio->fFlags & PGMREGMMIO2RANGE_F_FIRST_CHUNK); + + int rc = pgmLock(pVM); + AssertRCReturn(rc, rc); PPGMREGMMIO2RANGE pLastMmio = pFirstMmio; @@ -3612,6 +3567,6 @@ for (;;) { - AssertReturn(pLastMmio->fFlags & PGMREGMMIO2RANGE_F_MAPPED, VERR_WRONG_ORDER); - AssertReturn(pLastMmio->RamRange.GCPhys == GCPhys + cbRange || GCPhys == NIL_RTGCPHYS, VERR_INVALID_PARAMETER); + AssertReturnStmt(pLastMmio->fFlags & PGMREGMMIO2RANGE_F_MAPPED, pgmUnlock(pVM), VERR_WRONG_ORDER); + AssertReturnStmt(pLastMmio->RamRange.GCPhys == GCPhys + cbRange || GCPhys == NIL_RTGCPHYS, pgmUnlock(pVM), VERR_INVALID_PARAMETER); Assert(pLastMmio->pDevInsR3 == pFirstMmio->pDevInsR3); Assert(pLastMmio->iSubDev == pFirstMmio->iSubDev); @@ -3623,9 +3578,7 @@ } - Log(("PGMR3PhysMMIOExUnmap: %RGp-%RGp %s\n", + Log(("PGMR3PhysMmio2Unmap: %RGp-%RGp %s\n", pFirstMmio->RamRange.GCPhys, pLastMmio->RamRange.GCPhysLast, pFirstMmio->RamRange.pszDesc)); - int rc = pgmLock(pVM); - AssertRCReturn(rc, rc); uint16_t const fOldFlags = pFirstMmio->fFlags; AssertReturnStmt(fOldFlags & PGMREGMMIO2RANGE_F_MAPPED, pgmUnlock(pVM), VERR_WRONG_ORDER); @@ -3722,4 +3675,5 @@ | (fOldFlags & PGMREGMMIO2RANGE_F_OVERLAPPING ? NEM_NOTIFY_PHYS_MMIO_EX_F_REPLACE : 0); rc = NEMR3NotifyPhysMmioExUnmap(pVM, GCPhysRangeNotify, cbRange, fNemFlags); + pgmUnlock(pVM); return rc; @@ -3728,5 +3682,5 @@ /** - * Reduces the mapping size of a MMIO2 or pre-registered MMIO region. + * Reduces the mapping size of a MMIO2 region. * * This is mainly for dealing with old saved states after changing the default @@ -3740,15 +3694,8 @@ * @param pVM The cross context VM structure. * @param pDevIns The device instance owning the region. - * @param iSubDev The sub-device number of the registered region. - * Pass UINT32_MAX if @a hMmio2 is given. - * @param iRegion The index of the registered region. Pass UINT32_MAX - * if @a hMmio2 is given. - * @param hMmio2 The handle of the region to reduce as an alternative - * to @a iSubDev and @a iRegion, pass NIL to use the - * other two. + * @param hMmio2 The handle of the region to reduce. * @param cbRegion The new mapping size. */ -VMMR3_INT_DECL(int) PGMR3PhysMMIOExReduce(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, - PGMMMIO2HANDLE hMmio2, RTGCPHYS cbRegion) +VMMR3_INT_DECL(int) PGMR3PhysMmio2Reduce(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, RTGCPHYS cbRegion) { /* @@ -3757,14 +3704,5 @@ VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT); AssertPtrReturn(pDevIns, VERR_INVALID_PARAMETER); - if (hMmio2 != NIL_PGMMMIO2HANDLE) - { - AssertReturn(iSubDev == UINT32_MAX, VERR_INVALID_PARAMETER); - AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER); - } - else - { - AssertReturn(iSubDev <= UINT8_MAX, VERR_INVALID_PARAMETER); - AssertReturn(iRegion <= UINT8_MAX, VERR_INVALID_PARAMETER); - } + AssertReturn(hMmio2 != NIL_PGMMMIO2HANDLE, VERR_INVALID_HANDLE); AssertReturn(cbRegion >= X86_PAGE_SIZE, VERR_INVALID_PARAMETER); AssertReturn(!(cbRegion & X86_PAGE_OFFSET_MASK), VERR_UNSUPPORTED_ALIGNMENT); @@ -3778,5 +3716,5 @@ AssertRCReturn(rc, rc); - PPGMREGMMIO2RANGE pFirstMmio = pgmR3PhysMMIOExFind(pVM, pDevIns, iSubDev, iRegion, hMmio2); + PPGMREGMMIO2RANGE pFirstMmio = pgmR3PhysMmio2Find(pVM, pDevIns, UINT32_MAX, UINT32_MAX, hMmio2); if (pFirstMmio) { @@ -3796,5 +3734,5 @@ * Make the change. */ - Log(("PGMR3PhysMMIOExReduce: %s changes from %RGp bytes (%RGp) to %RGp bytes.\n", + Log(("PGMR3PhysMmio2Reduce: %s changes from %RGp bytes (%RGp) to %RGp bytes.\n", pFirstMmio->RamRange.pszDesc, pFirstMmio->RamRange.cb, pFirstMmio->cbReal, cbRegion)); @@ -3839,5 +3777,5 @@ */ pgmLock(pVM); - PPGMREGMMIO2RANGE pFirstMmio = pgmR3PhysMMIOExFind(pVM, pDevIns, UINT32_MAX, UINT32_MAX, hMmio2); + PPGMREGMMIO2RANGE pFirstMmio = pgmR3PhysMmio2Find(pVM, pDevIns, UINT32_MAX, UINT32_MAX, hMmio2); pgmUnlock(pVM); AssertReturn(pFirstMmio, VERR_INVALID_HANDLE); @@ -3848,41 +3786,5 @@ -/** - * Checks if the given address is an MMIO2 or pre-registered MMIO base address - * or not. - * - * @returns true/false accordingly. - * @param pVM The cross context VM structure. - * @param pDevIns The owner of the memory, optional. - * @param GCPhys The address to check. - */ -VMMR3DECL(bool) PGMR3PhysMMIOExIsBase(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhys) -{ - /* - * Validate input - */ - VM_ASSERT_EMT_RETURN(pVM, false); - AssertPtrReturn(pDevIns, false); - AssertReturn(GCPhys != NIL_RTGCPHYS, false); - AssertReturn(GCPhys != 0, false); - AssertReturn(!(GCPhys & PAGE_OFFSET_MASK), false); - - /* - * Search the list. - */ - pgmLock(pVM); - for (PPGMREGMMIO2RANGE pCurMmio = pVM->pgm.s.pRegMmioRangesR3; pCurMmio; pCurMmio = pCurMmio->pNextR3) - if (pCurMmio->RamRange.GCPhys == GCPhys) - { - Assert(pCurMmio->fFlags & PGMREGMMIO2RANGE_F_MAPPED); - bool fRet = RT_BOOL(pCurMmio->fFlags & PGMREGMMIO2RANGE_F_FIRST_CHUNK); - pgmUnlock(pVM); - return fRet; - } - pgmUnlock(pVM); - return false; -} - - +#ifndef PGM_WITHOUT_MAPPINGS /** * Gets the HC physical address of a page in the MMIO2 region. @@ -3911,5 +3813,5 @@ pgmLock(pVM); - PPGMREGMMIO2RANGE pCurMmio = pgmR3PhysMMIOExFind(pVM, pDevIns, iSubDev, iRegion, NIL_PGMMMIO2HANDLE); + PPGMREGMMIO2RANGE pCurMmio = pgmR3PhysMmio2Find(pVM, pDevIns, iSubDev, iRegion, NIL_PGMMMIO2HANDLE); AssertReturn(pCurMmio, VERR_NOT_FOUND); AssertReturn(pCurMmio->fFlags & (PGMREGMMIO2RANGE_F_MMIO2 | PGMREGMMIO2RANGE_F_FIRST_CHUNK), VERR_WRONG_TYPE); @@ -3928,55 +3830,5 @@ return VINF_SUCCESS; } - - -/** - * Maps a portion of an MMIO2 region into kernel space (host). - * - * The kernel mapping will become invalid when the MMIO2 memory is deregistered - * or the VM is terminated. - * - * @return VBox status code. - * - * @param pVM The cross context VM structure. - * @param pDevIns The device owning the MMIO2 memory. - * @param iSubDev The sub-device number. - * @param iRegion The region. - * @param off The offset into the region. Must be page aligned. - * @param cb The number of bytes to map. Must be page aligned. - * @param pszDesc Mapping description. - * @param pR0Ptr Where to store the R0 address. - */ -VMMR3_INT_DECL(int) PGMR3PhysMMIO2MapKernel(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, - RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTR0PTR pR0Ptr) -{ - /* - * Validate input. - */ - VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT); - AssertPtrReturn(pDevIns, VERR_INVALID_PARAMETER); - AssertReturn(iSubDev <= UINT8_MAX, VERR_INVALID_PARAMETER); - AssertReturn(iRegion <= UINT8_MAX, VERR_INVALID_PARAMETER); - - PPGMREGMMIO2RANGE pFirstRegMmio = pgmR3PhysMMIOExFind(pVM, pDevIns, iSubDev, iRegion, NIL_PGMMMIO2HANDLE); - AssertReturn(pFirstRegMmio, VERR_NOT_FOUND); - AssertReturn(pFirstRegMmio->fFlags & (PGMREGMMIO2RANGE_F_MMIO2 | PGMREGMMIO2RANGE_F_FIRST_CHUNK), VERR_WRONG_TYPE); - AssertReturn(off < pFirstRegMmio->RamRange.cb, VERR_INVALID_PARAMETER); - AssertReturn(cb <= pFirstRegMmio->RamRange.cb, VERR_INVALID_PARAMETER); - AssertReturn(off + cb <= pFirstRegMmio->RamRange.cb, VERR_INVALID_PARAMETER); - NOREF(pszDesc); - - /* - * Pass the request on to the support library/driver. - */ -#if defined(RT_OS_WINDOWS) || defined(RT_OS_LINUX) || defined(RT_OS_OS2) /** @todo Fully implement RTR0MemObjMapKernelEx everywhere. */ - AssertLogRelReturn(off == 0, VERR_NOT_SUPPORTED); - AssertLogRelReturn(pFirstRegMmio->fFlags & PGMREGMMIO2RANGE_F_LAST_CHUNK, VERR_NOT_SUPPORTED); - int rc = SUPR3PageMapKernel(pFirstRegMmio->pvR3, 0 /*off*/, pFirstRegMmio->RamRange.cb, 0 /*fFlags*/, pR0Ptr); -#else - int rc = SUPR3PageMapKernel(pFirstRegMmio->pvR3, off, cb, 0 /*fFlags*/, pR0Ptr); -#endif - - return rc; -} +#endif /* !PGM_WITHOUT_MAPPINGS */ @@ -3994,5 +3846,5 @@ AssertPtrReturn(pDevIns, NIL_RTGCPHYS); - PPGMREGMMIO2RANGE pFirstRegMmio = pgmR3PhysMMIOExFind(pVM, pDevIns, UINT32_MAX, UINT32_MAX, hMmio2); + PPGMREGMMIO2RANGE pFirstRegMmio = pgmR3PhysMmio2Find(pVM, pDevIns, UINT32_MAX, UINT32_MAX, hMmio2); AssertReturn(pFirstRegMmio, NIL_RTGCPHYS); @@ -4003,5 +3855,5 @@ /** - * Changes the region number of an MMIO2 or pre-registered MMIO region. + * Changes the region number of an MMIO2 region. * * This is only for dealing with save state issues, nothing else. @@ -4011,10 +3863,5 @@ * @param pVM The cross context VM structure. * @param pDevIns The device owning the MMIO2 memory. - * @param iSubDev The sub-device number. Pass UINT32_MAX if @a hMmio2 is - * given. - * @param iRegion The region. Pass UINT32_MAX if @a hMmio2 is given. - * @param hMmio2 The handle of the region to map as an alternative to - * @a iSubDev and @a iRegion, pass NIL to use the - * other two. + * @param hMmio2 The handle of the region. * @param iNewRegion The new region index. * @@ -4022,6 +3869,5 @@ * @sa @bugref{9359} */ -VMMR3_INT_DECL(int) PGMR3PhysMMIOExChangeRegionNo(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, - PGMMMIO2HANDLE hMmio2, uint32_t iNewRegion) +VMMR3_INT_DECL(int) PGMR3PhysMmio2ChangeRegionNo(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, uint32_t iNewRegion) { /* @@ -4029,23 +3875,18 @@ */ VM_ASSERT_EMT0_RETURN(pVM, VERR_VM_THREAD_NOT_EMT); + VM_ASSERT_STATE_RETURN(pVM, VMSTATE_LOADING, VERR_VM_INVALID_VM_STATE); AssertPtrReturn(pDevIns, VERR_INVALID_PARAMETER); - if (hMmio2 != NIL_PGMMMIO2HANDLE) - { - AssertReturn(iSubDev == UINT32_MAX, VERR_INVALID_PARAMETER); - AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER); - } - else - { - AssertReturn(iSubDev <= UINT8_MAX, VERR_INVALID_PARAMETER); - AssertReturn(iRegion <= UINT8_MAX, VERR_INVALID_PARAMETER); - } + AssertReturn(hMmio2 != NIL_PGMMMIO2HANDLE, VERR_INVALID_HANDLE); AssertReturn(iNewRegion <= UINT8_MAX, VERR_INVALID_PARAMETER); AssertReturn(pVM->enmVMState == VMSTATE_LOADING, VERR_INVALID_STATE); - PPGMREGMMIO2RANGE pFirstRegMmio = pgmR3PhysMMIOExFind(pVM, pDevIns, iSubDev, iRegion, hMmio2); - AssertReturn(pFirstRegMmio, VERR_NOT_FOUND); - AssertReturn(pgmR3PhysMMIOExFind(pVM, pDevIns, pFirstRegMmio->iSubDev, iNewRegion, NIL_PGMMMIO2HANDLE) == NULL, - VERR_RESOURCE_IN_USE); + int rc = pgmLock(pVM); + AssertRCReturn(rc, rc); + + PPGMREGMMIO2RANGE pFirstRegMmio = pgmR3PhysMmio2Find(pVM, pDevIns, UINT32_MAX, UINT32_MAX, hMmio2); + AssertReturnStmt(pFirstRegMmio, pgmUnlock(pVM), VERR_NOT_FOUND); + AssertReturnStmt(pgmR3PhysMmio2Find(pVM, pDevIns, pFirstRegMmio->iSubDev, iNewRegion, NIL_PGMMMIO2HANDLE) == NULL, + pgmUnlock(pVM), VERR_RESOURCE_IN_USE); /* @@ -4054,4 +3895,5 @@ pFirstRegMmio->iRegion = (uint8_t)iNewRegion; + pgmUnlock(pVM); return VINF_SUCCESS; }