VirtualBox

Changeset 82316 in vbox


Ignore:
Timestamp:
Dec 2, 2019 12:06:08 PM (5 years ago)
Author:
vboxsync
Message:

VMM(PDM,PGM,MM): MMIO2 cleanups. bugref:9218

Location:
trunk
Files:
7 edited

Legend:

Unmodified
Added
Removed

  • trunk/include/VBox/vmm/mm.h

    r80281 r82316  
    264264VMMR3DECL(int)      MMR3HyperMapHCPhys(PVM pVM, void *pvR3, RTR0PTR pvR0, RTHCPHYS HCPhys, size_t cb, const char *pszDesc, PRTGCPTR pGCPtr);
    265265VMMR3DECL(int)      MMR3HyperMapGCPhys(PVM pVM, RTGCPHYS GCPhys, size_t cb, const char *pszDesc, PRTGCPTR pGCPtr);
    266 VMMR3DECL(int)      MMR3HyperMapMMIO2(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTRCPTR pRCPtr);
    267266VMMR3DECL(int)      MMR3HyperReserve(PVM pVM, unsigned cb, const char *pszDesc, PRTGCPTR pGCPtr);
    268267#endif

  • trunk/include/VBox/vmm/pdmdev.h

    r82313 r82316  
    11641164
    11651165/** Current PDMPCIHLPR0 version number. */
    1166 #define PDM_PCIHLPR0_VERSION                    PDM_VERSION_MAKE(0xfffc, 4, 0)
     1166#define PDM_PCIHLPR0_VERSION                    PDM_VERSION_MAKE(0xfffc, 5, 0)
    11671167
    11681168/**
    … …  
    12031203     */
    12041204    DECLR3CALLBACKMEMBER(void,  pfnIoApicSendMsi,(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc));
    1205 
    1206     /**
    1207      * Checks if the given address is an MMIO2 or pre-registered MMIO base address.
    1208      *
    1209      * @returns true/false accordingly.
    1210      * @param   pDevIns         The PCI device instance.
    1211      * @param   pOwner          The owner of the memory, optional.
    1212      * @param   GCPhys          The address to check.
    1213      * @sa      PGMR3PhysMMIOExIsBase
    1214      */
    1215     DECLR3CALLBACKMEMBER(bool,  pfnIsMMIOExBase,(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys));
    12161205
    12171206    /**

  • trunk/include/VBox/vmm/pgm.h

    r82094 r82316  
    726726                                          RTR3PTR pvUserR3, RTR0PTR pvUserR0, RTRCPTR pvUserRC, const char *pszDesc);
    727727VMMR3DECL(int)      PGMR3PhysMMIODeregister(PVM pVM, RTGCPHYS GCPhys, RTGCPHYS cb);
    728 VMMR3_INT_DECL(int) PGMR3PhysMMIO2Register(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, RTGCPHYS cb,
     728VMMR3_INT_DECL(int) PGMR3PhysMmio2Register(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, RTGCPHYS cb,
    729729                                           uint32_t fFlags, const char *pszDesc, void **ppv, PGMMMIO2HANDLE *phRegion);
    730 VMMR3_INT_DECL(int) PGMR3PhysMMIOExDeregister(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, PGMMMIO2HANDLE hMmio2);
    731 VMMR3_INT_DECL(int) PGMR3PhysMMIOExMap(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, PGMMMIO2HANDLE hMmio2, RTGCPHYS GCPhys);
    732 VMMR3_INT_DECL(int) PGMR3PhysMMIOExUnmap(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, PGMMMIO2HANDLE hMmio2, RTGCPHYS GCPhys);
    733 VMMR3_INT_DECL(int) PGMR3PhysMMIOExReduce(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, PGMMMIO2HANDLE hMmio2, RTGCPHYS cbRegion);
     730VMMR3_INT_DECL(int) PGMR3PhysMmio2Deregister(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2);
     731VMMR3_INT_DECL(int) PGMR3PhysMmio2Map(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, RTGCPHYS GCPhys);
     732VMMR3_INT_DECL(int) PGMR3PhysMmio2Unmap(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, RTGCPHYS GCPhys);
     733VMMR3_INT_DECL(int) PGMR3PhysMmio2Reduce(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, RTGCPHYS cbRegion);
    734734VMMR3_INT_DECL(int) PGMR3PhysMmio2ValidateHandle(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2);
    735735VMMR3_INT_DECL(RTGCPHYS) PGMR3PhysMmio2GetMappingAddress(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2);
    736 VMMR3_INT_DECL(int) PGMR3PhysMMIOExChangeRegionNo(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, PGMMMIO2HANDLE hMmio2, uint32_t iNewRegion);
    737 VMMR3DECL(bool)     PGMR3PhysMMIOExIsBase(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhys);
     736VMMR3_INT_DECL(int) PGMR3PhysMmio2ChangeRegionNo(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, uint32_t iNewRegion);
    738737VMMR3_INT_DECL(int) PGMR3PhysMMIO2GetHCPhys(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, RTGCPHYS off, PRTHCPHYS pHCPhys);
    739 VMMR3_INT_DECL(int) PGMR3PhysMMIO2MapKernel(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTR0PTR pR0Ptr);
    740738
    741739

  • trunk/src/VBox/VMM/VMMR3/PDM.cpp

    r82261 r82316  
    837837        pdmR3ThreadDestroyDevice(pVM, pDevIns);
    838838        PDMR3QueueDestroyDevice(pVM, pDevIns);
    839         PGMR3PhysMMIOExDeregister(pVM, pDevIns, UINT32_MAX, UINT32_MAX, NIL_PGMMMIO2HANDLE);
     839        PGMR3PhysMmio2Deregister(pVM, pDevIns, NIL_PGMMMIO2HANDLE);
    840840#ifdef VBOX_WITH_PDM_ASYNC_COMPLETION
    841841        pdmR3AsyncCompletionTemplateDestroyDevice(pVM, pDevIns);

  • trunk/src/VBox/VMM/VMMR3/PDMDevHlp.cpp

    r82313 r82316  
    237237    AssertReturn(!(iPciRegion & UINT16_MAX), VERR_INVALID_PARAMETER); /* not implemented. */
    238238
    239     /** @todo PGMR3PhysMMIO2Register mangles the description, move it here and
     239    /** @todo PGMR3PhysMmio2Register mangles the description, move it here and
    240240     *        use a real string cache. */
    241     int rc = PGMR3PhysMMIO2Register(pVM, pDevIns, pPciDev ? pPciDev->Int.s.idxDevCfg : 254, iPciRegion >> 16,
     241    int rc = PGMR3PhysMmio2Register(pVM, pDevIns, pPciDev ? pPciDev->Int.s.idxDevCfg : 254, iPciRegion >> 16,
    242242                                    cbRegion, fFlags, pszDesc, ppvMapping, phRegion);
    243243
    … …  
    261261                    ("state %s, expected DESTROYING or LOADING\n", VMGetStateName(pVM->enmVMState)), VERR_VM_INVALID_VM_STATE);
    262262
    263     int rc = PGMR3PhysMMIOExDeregister(pDevIns->Internal.s.pVMR3, pDevIns, UINT32_MAX, UINT32_MAX, hRegion);
     263    int rc = PGMR3PhysMmio2Deregister(pDevIns->Internal.s.pVMR3, pDevIns, hRegion);
    264264
    265265    LogFlow(("pdmR3DevHlp_Mmio2Destroy: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
    … …  
    277277    VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
    278278
    279     int rc = PGMR3PhysMMIOExMap(pDevIns->Internal.s.pVMR3, pDevIns, UINT32_MAX, UINT32_MAX, hRegion, GCPhys);
     279    int rc = PGMR3PhysMmio2Map(pDevIns->Internal.s.pVMR3, pDevIns, hRegion, GCPhys);
    280280
    281281    LogFlow(("pdmR3DevHlp_Mmio2Map: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
    … …  
    293293    VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
    294294
    295     int rc = PGMR3PhysMMIOExUnmap(pDevIns->Internal.s.pVMR3, pDevIns, UINT32_MAX, UINT32_MAX, hRegion, NIL_RTGCPHYS);
     295    int rc = PGMR3PhysMmio2Unmap(pDevIns->Internal.s.pVMR3, pDevIns, hRegion, NIL_RTGCPHYS);
    296296
    297297    LogFlow(("pdmR3DevHlp_Mmio2Unmap: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
    … …  
    309309    VM_ASSERT_STATE_RETURN(pVM, VMSTATE_LOADING, VERR_VM_INVALID_VM_STATE);
    310310
    311     int rc = PGMR3PhysMMIOExReduce(pDevIns->Internal.s.pVMR3, pDevIns, UINT32_MAX, UINT32_MAX, hRegion, cbRegion);
     311    int rc = PGMR3PhysMmio2Reduce(pDevIns->Internal.s.pVMR3, pDevIns, hRegion, cbRegion);
    312312
    313313    LogFlow(("pdmR3DevHlp_Mmio2Reduce: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));
    … …  
    340340    VM_ASSERT_EMT0_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
    341341
    342     int rc = PGMR3PhysMMIOExChangeRegionNo(pVM, pDevIns, UINT32_MAX, UINT32_MAX, hRegion, iNewRegion);
     342    int rc = PGMR3PhysMmio2ChangeRegionNo(pVM, pDevIns, hRegion, iNewRegion);
    343343
    344344    LogFlow(("pdmR3DevHlp_Mmio2ChangeRegionNo: caller='%s'/%d: returns %Rrc\n", pDevIns->pReg->szName, pDevIns->iInstance, rc));

  • trunk/src/VBox/VMM/VMMR3/PDMDevMiscHlp.cpp

    r81961 r82316  
    169169}
    170170
     171
    171172/** @interface_method_impl{PDMPCIHLPR3,pfnIoApicSetIrq} */
    172173static DECLCALLBACK(void) pdmR3PciHlp_IoApicSetIrq(PPDMDEVINS pDevIns, int iIrq, int iLevel, uint32_t uTagSrc)
    … …  
    177178}
    178179
     180
    179181/** @interface_method_impl{PDMPCIHLPR3,pfnIoApicSendMsi} */
    180182static DECLCALLBACK(void) pdmR3PciHlp_IoApicSendMsi(PPDMDEVINS pDevIns, RTGCPHYS GCPhys, uint32_t uValue, uint32_t uTagSrc)
    … …  
    183185    Log4(("pdmR3PciHlp_IoApicSendMsi: address=%p value=%x uTagSrc=%#x\n", GCPhys, uValue, uTagSrc));
    184186    PDMIoApicSendMsi(pDevIns->Internal.s.pVMR3, GCPhys, uValue, uTagSrc);
    185 }
    186 
    187 /** @interface_method_impl{PDMPCIHLPR3,pfnIsMMIOExBase} */
    188 static DECLCALLBACK(bool) pdmR3PciHlp_IsMMIO2Base(PPDMDEVINS pDevIns, PPDMDEVINS pOwner, RTGCPHYS GCPhys)
    189 {
    190     PDMDEV_ASSERT_DEVINS(pDevIns);
    191     VM_ASSERT_EMT(pDevIns->Internal.s.pVMR3);
    192     bool fRc = PGMR3PhysMMIOExIsBase(pDevIns->Internal.s.pVMR3, pOwner, GCPhys);
    193     Log4(("pdmR3PciHlp_IsMMIOExBase: pOwner=%p GCPhys=%RGp -> %RTbool\n", pOwner, GCPhys, fRc));
    194     return fRc;
    195187}
    196188
    … …  
    235227    pdmR3PciHlp_IoApicSetIrq,
    236228    pdmR3PciHlp_IoApicSendMsi,
    237     pdmR3PciHlp_IsMMIO2Base,
    238229    pdmR3PciHlp_Lock,
    239230    pdmR3PciHlp_Unlock,

  • trunk/src/VBox/VMM/VMMR3/PGMPhys.cpp

    r82313 r82316  
    26022602 *                          @a iRegion.
    26032603 */
    2604 DECLINLINE(PPGMREGMMIO2RANGE) pgmR3PhysMMIOExFind(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev,
    2605                                                   uint32_t iRegion, PGMMMIO2HANDLE hMmio2)
     2604DECLINLINE(PPGMREGMMIO2RANGE) pgmR3PhysMmio2Find(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev,
     2605                                                 uint32_t iRegion, PGMMMIO2HANDLE hMmio2)
    26062606{
    26072607    if (hMmio2 != NIL_PGMMMIO2HANDLE)
    … …  
    26502650 * @sa pgmR3PhysRamRangeRelocate
    26512651 */
    2652 static DECLCALLBACK(bool) pgmR3PhysMMIOExRangeRelocate(PVM pVM, RTGCPTR GCPtrOld, RTGCPTR GCPtrNew,
    2653                                                        PGMRELOCATECALL enmMode, void *pvUser)
     2652static DECLCALLBACK(bool) pgmR3PhysMmio2RangeRelocate(PVM pVM, RTGCPTR GCPtrOld, RTGCPTR GCPtrNew,
     2653                                                      PGMRELOCATECALL enmMode, void *pvUser)
    26542654{
    26552655    PPGMREGMMIO2RANGE pMmio = (PPGMREGMMIO2RANGE)pvUser;
    … …  
    26962696 * @param   pcbChunk        Where to return the guest mapping size for a chunk.
    26972697 */
    2698 static uint16_t pgmR3PhysMMIOExCalcChunkCount(PVM pVM, RTGCPHYS cb, uint32_t *pcPagesPerChunk, uint32_t *pcbChunk)
     2698static uint16_t pgmR3PhysMmio2CalcChunkCount(PVM pVM, RTGCPHYS cb, uint32_t *pcPagesPerChunk, uint32_t *pcbChunk)
    26992699{
    27002700    RT_NOREF_PV(pVM); /* without raw mode */
    … …  
    27312731 * Caller must set type specfic members and initialize the PGMPAGE structures.
    27322732 *
    2733  * This was previously also used by PGMR3PhysMMIOExPreRegister, a function for
     2733 * This was previously also used by PGMR3PhysMmio2PreRegister, a function for
    27342734 * pre-registering MMIO that was later (6.1) replaced by a new handle based IOM
    27352735 * interface.  The reference to caller and type above is purely historical.
    … …  
    27502750 * @thread  EMT
    27512751 */
    2752 static int pgmR3PhysMMIOExCreate(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, RTGCPHYS cb,
    2753                                  const char *pszDesc, PPGMREGMMIO2RANGE *ppHeadRet)
     2752static int pgmR3PhysMmio2Create(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, RTGCPHYS cb,
     2753                                const char *pszDesc, PPGMREGMMIO2RANGE *ppHeadRet)
    27542754{
    27552755    /*
    … …  
    27572757     */
    27582758    uint32_t cPagesPerChunk;
    2759     uint16_t cChunks = pgmR3PhysMMIOExCalcChunkCount(pVM, cb, &cPagesPerChunk, NULL);
     2759    uint16_t cChunks = pgmR3PhysMmio2CalcChunkCount(pVM, cb, &cPagesPerChunk, NULL);
    27602760    AssertReturn(cChunks, VERR_PGM_PHYS_MMIO_EX_IPE);
    27612761
    … …  
    28772877
    28782878/**
    2879  * Common worker PGMR3PhysMMIOExPreRegister & PGMR3PhysMMIO2Register that links
    2880  * a complete registration entry into the lists and lookup tables.
     2879 * Common worker PGMR3PhysMmio2PreRegister & PGMR3PhysMMIO2Register that links a
     2880 * complete registration entry into the lists and lookup tables.
    28812881 *
    28822882 * @param   pVM             The cross context VM structure.
    28832883 * @param   pNew            The new MMIO / MMIO2 registration to link.
    28842884 */
    2885 static void pgmR3PhysMMIOExLink(PVM pVM, PPGMREGMMIO2RANGE pNew)
     2885static void pgmR3PhysMmio2Link(PVM pVM, PPGMREGMMIO2RANGE pNew)
    28862886{
    28872887    /*
    … …  
    29682968 * @thread  EMT
    29692969 */
    2970 VMMR3_INT_DECL(int) PGMR3PhysMMIO2Register(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, RTGCPHYS cb,
     2970VMMR3_INT_DECL(int) PGMR3PhysMmio2Register(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion, RTGCPHYS cb,
    29712971                                           uint32_t fFlags, const char *pszDesc, void **ppv, PGMMMIO2HANDLE *phRegion)
    29722972{
    … …  
    29872987    AssertPtrReturn(pszDesc, VERR_INVALID_POINTER);
    29882988    AssertReturn(*pszDesc, VERR_INVALID_PARAMETER);
    2989     AssertReturn(pgmR3PhysMMIOExFind(pVM, pDevIns, iSubDev, iRegion, NIL_PGMMMIO2HANDLE) == NULL, VERR_ALREADY_EXISTS);
     2989    AssertReturn(pgmR3PhysMmio2Find(pVM, pDevIns, iSubDev, iRegion, NIL_PGMMMIO2HANDLE) == NULL, VERR_ALREADY_EXISTS);
    29902990    AssertReturn(!(cb & PAGE_OFFSET_MASK), VERR_INVALID_PARAMETER);
    29912991    AssertReturn(cb, VERR_INVALID_PARAMETER);
    … …  
    30123012     * the IDs goes from 1 thru PGM_MMIO2_MAX_RANGES.
    30133013     */
    3014     unsigned cChunks = pgmR3PhysMMIOExCalcChunkCount(pVM, cb, NULL, NULL);
     3014    unsigned cChunks = pgmR3PhysMmio2CalcChunkCount(pVM, cb, NULL, NULL);
    30153015    pgmLock(pVM);
    30163016    uint8_t  idMmio2 = pVM->pgm.s.cMmio2Regions + 1;
    … …  
    30443044                 */
    30453045                PPGMREGMMIO2RANGE pNew;
    3046                 rc = pgmR3PhysMMIOExCreate(pVM, pDevIns, iSubDev, iRegion, cb, pszDesc, &pNew);
     3046                rc = pgmR3PhysMmio2Create(pVM, pDevIns, iSubDev, iRegion, cb, pszDesc, &pNew);
    30473047                if (RT_SUCCESS(rc))
    30483048                {
    … …  
    30823082                    pVM->pgm.s.cPrivatePages += cPages;
    30833083
    3084                     pgmR3PhysMMIOExLink(pVM, pNew);
     3084                    pgmR3PhysMmio2Link(pVM, pNew);
    30853085
    30863086                    *ppv = pvPages;
    … …  
    31013101
    31023102/**
    3103  * Deregisters and frees an MMIO2 region or a pre-registered MMIO region
    3104  *
    3105  * Any physical (and virtual) access handlers registered for the region must
    3106  * be deregistered before calling this function.
     3103 * Deregisters and frees an MMIO2 region.
     3104 *
     3105 * Any physical access handlers registered for the region must be deregistered
     3106 * before calling this function.
    31073107 *
    31083108 * @returns VBox status code.
    31093109 * @param   pVM             The cross context VM structure.
    31103110 * @param   pDevIns         The device instance owning the region.
    3111  * @param   iSubDev         The sub-device number.  Pass UINT32_MAX for wildcard
    3112  *                          matching or using @a hMmio2.
    3113  * @param   iRegion         The region.  Pass UINT32_MAX for wildcard matching
    3114  *                          or using @a hMmio2.
    3115  * @param   hMmio2          The MMIO2 handle to use instead of iSubDev and
    3116  *                          iRegion, pass NIL to use those two.
    3117  */
    3118 VMMR3_INT_DECL(int) PGMR3PhysMMIOExDeregister(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev,
    3119                                               uint32_t iRegion, PGMMMIO2HANDLE hMmio2)
     3111 * @param   hMmio2          The MMIO2 handle to deregister, or NIL if all
     3112 *                          regions for the given device is to be deregistered.
     3113 */
     3114VMMR3_INT_DECL(int) PGMR3PhysMmio2Deregister(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2)
    31203115{
    31213116    /*
    … …  
    31243119    VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
    31253120    AssertPtrReturn(pDevIns, VERR_INVALID_PARAMETER);
    3126     if (hMmio2 != NIL_PGMMMIO2HANDLE)
    3127     {
    3128         AssertReturn(iSubDev == UINT32_MAX, VERR_INVALID_PARAMETER);
    3129         AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
    3130     }
    3131     else
    3132     {
    3133         AssertReturn(iSubDev <= UINT8_MAX || iSubDev == UINT32_MAX, VERR_INVALID_PARAMETER);
    3134         AssertReturn(iRegion <= UINT8_MAX || iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
    3135     }
    31363121
    31373122    /*
    … …  
    31483133        uint32_t const fFlags = pCur->fFlags;
    31493134        if (    pCur->pDevInsR3 == pDevIns
    3150             &&  (  hMmio2 == NIL_PGMMMIO2HANDLE
    3151                  ?        (   iRegion == UINT32_MAX
    3152                            || pCur->iRegion == iRegion)
    3153                       &&  (   iSubDev == UINT32_MAX
    3154                            || pCur->iSubDev == iSubDev)
    3155                  :    pCur->idMmio2 == hMmio2
    3156                    && (fFlags & PGMREGMMIO2RANGE_F_MMIO2)
    3157                 )
    3158            )
    3159         {
     3135            &&  (   hMmio2 == NIL_PGMMMIO2HANDLE
     3136                 || pCur->idMmio2 == hMmio2))
     3137        {
     3138            Assert(fFlags & PGMREGMMIO2RANGE_F_MMIO2);
    31603139            cFound++;
    31613140
    … …  
    31653144            if (fFlags & PGMREGMMIO2RANGE_F_MAPPED)
    31663145            {
    3167                 int rc2 = PGMR3PhysMMIOExUnmap(pVM, pCur->pDevInsR3, pCur->iSubDev, pCur->iRegion, hMmio2, pCur->RamRange.GCPhys);
     3146                int rc2 = PGMR3PhysMmio2Unmap(pVM, pCur->pDevInsR3, pCur->idMmio2, pCur->RamRange.GCPhys);
    31683147                AssertRC(rc2);
    31693148                if (RT_FAILURE(rc2) && RT_SUCCESS(rc))
    … …  
    32603239    pgmPhysInvalidatePageMapTLB(pVM);
    32613240    pgmUnlock(pVM);
    3262     return !cFound && (hMmio2 != NIL_PGMMMIO2HANDLE || (iRegion != UINT32_MAX && iSubDev != UINT32_MAX)) ? VERR_NOT_FOUND : rc;
    3263 }
    3264 
    3265 
    3266 /**
    3267  * Maps a MMIO2 region or a pre-registered MMIO region.
    3268  *
    3269  * This is done when a guest / the bios / state loading changes the
    3270  * PCI config. The replacing of base memory has the same restrictions
    3271  * as during registration, of course.
     3241    return !cFound && hMmio2 != NIL_PGMMMIO2HANDLE ? VERR_NOT_FOUND : rc;
     3242}
     3243
     3244
     3245/**
     3246 * Maps a MMIO2 region.
     3247 *
     3248 * This is typically done when a guest / the bios / state loading changes the
     3249 * PCI config.  The replacing of base memory has the same restrictions as during
     3250 * registration, of course.
    32723251 *
    32733252 * @returns VBox status code.
    … …  
    32753254 * @param   pVM             The cross context VM structure.
    32763255 * @param   pDevIns         The device instance owning the region.
    3277  * @param   iSubDev         The sub-device number of the registered region.
    3278  *                          Pass UINT32_MAX if @a hMmio2 is given.
    3279  * @param   iRegion         The index of the registered region.  Pass UINT32_MAX
    3280  *                          if @a hMmio2 is given.
    3281  * @param   hMmio2          The handle of the region to map as an alternative to
    3282  *                          @a iSubDev and @a iRegion, pass NIL to use the
    3283  *                          other two.
     3256 * @param   hMmio2          The handle of the region to map.
    32843257 * @param   GCPhys          The guest-physical address to be remapped.
    32853258 */
    3286 VMMR3_INT_DECL(int) PGMR3PhysMMIOExMap(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion,
    3287                                        PGMMMIO2HANDLE hMmio2, RTGCPHYS GCPhys)
     3259VMMR3_INT_DECL(int) PGMR3PhysMmio2Map(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, RTGCPHYS GCPhys)
    32883260{
    32893261    /*
    … …  
    32953267    VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
    32963268    AssertPtrReturn(pDevIns, VERR_INVALID_PARAMETER);
    3297     if (hMmio2 != NIL_PGMMMIO2HANDLE)
    3298     {
    3299         AssertReturn(iSubDev == UINT32_MAX, VERR_INVALID_PARAMETER);
    3300         AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
    3301     }
    3302     else
    3303     {
    3304         AssertReturn(iSubDev <= UINT8_MAX, VERR_INVALID_PARAMETER);
    3305         AssertReturn(iRegion <= UINT8_MAX, VERR_INVALID_PARAMETER);
    3306     }
    33073269    AssertReturn(GCPhys != NIL_RTGCPHYS, VERR_INVALID_PARAMETER);
    33083270    AssertReturn(GCPhys != 0, VERR_INVALID_PARAMETER);
    33093271    AssertReturn(!(GCPhys & PAGE_OFFSET_MASK), VERR_INVALID_PARAMETER);
    3310 
    3311     PPGMREGMMIO2RANGE pFirstMmio = pgmR3PhysMMIOExFind(pVM, pDevIns, iSubDev, iRegion, hMmio2);
     3272    AssertReturn(hMmio2 != NIL_PGMMMIO2HANDLE, VERR_INVALID_HANDLE);
     3273
     3274    PPGMREGMMIO2RANGE pFirstMmio = pgmR3PhysMmio2Find(pVM, pDevIns, UINT32_MAX, UINT32_MAX, hMmio2);
    33123275    AssertReturn(pFirstMmio, VERR_NOT_FOUND);
    33133276    Assert(pFirstMmio->fFlags & PGMREGMMIO2RANGE_F_FIRST_CHUNK);
    … …  
    33863349        pRam = pRam->pNextR3;
    33873350    }
    3388     Log(("PGMR3PhysMMIOExMap: %RGp-%RGp fRamExists=%RTbool %s\n", GCPhys, GCPhysLast, fRamExists, pFirstMmio->RamRange.pszDesc));
     3351    Log(("PGMR3PhysMmio2Map: %RGp-%RGp fRamExists=%RTbool %s\n", GCPhys, GCPhysLast, fRamExists, pFirstMmio->RamRange.pszDesc));
    33893352
    33903353
    … …  
    35733536
    35743537/**
    3575  * Unmaps a MMIO2 or a pre-registered MMIO region.
    3576  *
    3577  * This is done when a guest / the bios / state loading changes the
    3578  * PCI config. The replacing of base memory has the same restrictions
    3579  * as during registration, of course.
    3580  */
    3581 VMMR3_INT_DECL(int) PGMR3PhysMMIOExUnmap(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion,
    3582                                          PGMMMIO2HANDLE hMmio2, RTGCPHYS GCPhys)
     3538 * Unmaps an MMIO2 region.
     3539 *
     3540 * This is typically done when a guest / the bios / state loading changes the
     3541 * PCI config. The replacing of base memory has the same restrictions as during
     3542 * registration, of course.
     3543 */
     3544VMMR3_INT_DECL(int) PGMR3PhysMmio2Unmap(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, RTGCPHYS GCPhys)
    35833545{
    35843546    /*
    … …  
    35873549    VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
    35883550    AssertPtrReturn(pDevIns, VERR_INVALID_PARAMETER);
    3589     if (hMmio2 != NIL_PGMMMIO2HANDLE)
    3590     {
    3591         AssertReturn(iSubDev == UINT32_MAX, VERR_INVALID_PARAMETER);
    3592         AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
    3593     }
    3594     else
    3595     {
    3596         AssertReturn(iSubDev <= UINT8_MAX, VERR_INVALID_PARAMETER);
    3597         AssertReturn(iRegion <= UINT8_MAX, VERR_INVALID_PARAMETER);
    3598         AssertReturn(GCPhys != NIL_RTGCPHYS, VERR_INVALID_PARAMETER);
    3599     }
     3551    AssertReturn(hMmio2 != NIL_PGMMMIO2HANDLE, VERR_INVALID_HANDLE);
    36003552    if (GCPhys != NIL_RTGCPHYS)
    36013553    {
    … …  
    36043556    }
    36053557
    3606     PPGMREGMMIO2RANGE pFirstMmio = pgmR3PhysMMIOExFind(pVM, pDevIns, iSubDev, iRegion, hMmio2);
     3558    PPGMREGMMIO2RANGE pFirstMmio = pgmR3PhysMmio2Find(pVM, pDevIns, UINT32_MAX, UINT32_MAX, hMmio2);
    36073559    AssertReturn(pFirstMmio, VERR_NOT_FOUND);
    36083560    Assert(pFirstMmio->fFlags & PGMREGMMIO2RANGE_F_FIRST_CHUNK);
     3561
     3562    int rc = pgmLock(pVM);
     3563    AssertRCReturn(rc, rc);
    36093564
    36103565    PPGMREGMMIO2RANGE pLastMmio = pFirstMmio;
    … …  
    36123567    for (;;)
    36133568    {
    3614         AssertReturn(pLastMmio->fFlags & PGMREGMMIO2RANGE_F_MAPPED, VERR_WRONG_ORDER);
    3615         AssertReturn(pLastMmio->RamRange.GCPhys == GCPhys + cbRange || GCPhys == NIL_RTGCPHYS, VERR_INVALID_PARAMETER);
     3569        AssertReturnStmt(pLastMmio->fFlags & PGMREGMMIO2RANGE_F_MAPPED, pgmUnlock(pVM), VERR_WRONG_ORDER);
     3570        AssertReturnStmt(pLastMmio->RamRange.GCPhys == GCPhys + cbRange || GCPhys == NIL_RTGCPHYS, pgmUnlock(pVM), VERR_INVALID_PARAMETER);
    36163571        Assert(pLastMmio->pDevInsR3 == pFirstMmio->pDevInsR3);
    36173572        Assert(pLastMmio->iSubDev   == pFirstMmio->iSubDev);
    … …  
    36233578    }
    36243579
    3625     Log(("PGMR3PhysMMIOExUnmap: %RGp-%RGp %s\n",
     3580    Log(("PGMR3PhysMmio2Unmap: %RGp-%RGp %s\n",
    36263581         pFirstMmio->RamRange.GCPhys, pLastMmio->RamRange.GCPhysLast, pFirstMmio->RamRange.pszDesc));
    36273582
    3628     int rc = pgmLock(pVM);
    3629     AssertRCReturn(rc, rc);
    36303583    uint16_t const fOldFlags = pFirstMmio->fFlags;
    36313584    AssertReturnStmt(fOldFlags & PGMREGMMIO2RANGE_F_MAPPED, pgmUnlock(pVM), VERR_WRONG_ORDER);
    … …  
    37223675                             | (fOldFlags & PGMREGMMIO2RANGE_F_OVERLAPPING ? NEM_NOTIFY_PHYS_MMIO_EX_F_REPLACE : 0);
    37233676    rc = NEMR3NotifyPhysMmioExUnmap(pVM, GCPhysRangeNotify, cbRange, fNemFlags);
     3677
    37243678    pgmUnlock(pVM);
    37253679    return rc;
    … …  
    37283682
    37293683/**
    3730  * Reduces the mapping size of a MMIO2 or pre-registered MMIO region.
     3684 * Reduces the mapping size of a MMIO2 region.
    37313685 *
    37323686 * This is mainly for dealing with old saved states after changing the default
    … …  
    37403694 * @param   pVM             The cross context VM structure.
    37413695 * @param   pDevIns         The device instance owning the region.
    3742  * @param   iSubDev         The sub-device number of the registered region.
    3743  *                          Pass UINT32_MAX if @a hMmio2 is given.
    3744  * @param   iRegion         The index of the registered region.  Pass UINT32_MAX
    3745  *                          if @a hMmio2 is given.
    3746  * @param   hMmio2          The handle of the region to reduce as an alternative
    3747  *                          to @a iSubDev and @a iRegion, pass NIL to use the
    3748  *                          other two.
     3696 * @param   hMmio2          The handle of the region to reduce.
    37493697 * @param   cbRegion        The new mapping size.
    37503698 */
    3751 VMMR3_INT_DECL(int) PGMR3PhysMMIOExReduce(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion,
    3752                                           PGMMMIO2HANDLE hMmio2, RTGCPHYS cbRegion)
     3699VMMR3_INT_DECL(int) PGMR3PhysMmio2Reduce(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, RTGCPHYS cbRegion)
    37533700{
    37543701    /*
    … …  
    37573704    VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
    37583705    AssertPtrReturn(pDevIns, VERR_INVALID_PARAMETER);
    3759     if (hMmio2 != NIL_PGMMMIO2HANDLE)
    3760     {
    3761         AssertReturn(iSubDev == UINT32_MAX, VERR_INVALID_PARAMETER);
    3762         AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
    3763     }
    3764     else
    3765     {
    3766         AssertReturn(iSubDev <= UINT8_MAX, VERR_INVALID_PARAMETER);
    3767         AssertReturn(iRegion <= UINT8_MAX, VERR_INVALID_PARAMETER);
    3768     }
     3706    AssertReturn(hMmio2 != NIL_PGMMMIO2HANDLE, VERR_INVALID_HANDLE);
    37693707    AssertReturn(cbRegion >= X86_PAGE_SIZE, VERR_INVALID_PARAMETER);
    37703708    AssertReturn(!(cbRegion & X86_PAGE_OFFSET_MASK), VERR_UNSUPPORTED_ALIGNMENT);
    … …  
    37783716    AssertRCReturn(rc, rc);
    37793717
    3780     PPGMREGMMIO2RANGE pFirstMmio = pgmR3PhysMMIOExFind(pVM, pDevIns, iSubDev, iRegion, hMmio2);
     3718    PPGMREGMMIO2RANGE pFirstMmio = pgmR3PhysMmio2Find(pVM, pDevIns, UINT32_MAX, UINT32_MAX, hMmio2);
    37813719    if (pFirstMmio)
    37823720    {
    … …  
    37963734                 * Make the change.
    37973735                 */
    3798                 Log(("PGMR3PhysMMIOExReduce: %s changes from %RGp bytes (%RGp) to %RGp bytes.\n",
     3736                Log(("PGMR3PhysMmio2Reduce: %s changes from %RGp bytes (%RGp) to %RGp bytes.\n",
    37993737                     pFirstMmio->RamRange.pszDesc, pFirstMmio->RamRange.cb, pFirstMmio->cbReal, cbRegion));
    38003738
    … …  
    38393777     */
    38403778    pgmLock(pVM);
    3841     PPGMREGMMIO2RANGE pFirstMmio = pgmR3PhysMMIOExFind(pVM, pDevIns, UINT32_MAX, UINT32_MAX, hMmio2);
     3779    PPGMREGMMIO2RANGE pFirstMmio = pgmR3PhysMmio2Find(pVM, pDevIns, UINT32_MAX, UINT32_MAX, hMmio2);
    38423780    pgmUnlock(pVM);
    38433781    AssertReturn(pFirstMmio, VERR_INVALID_HANDLE);
    … …  
    38483786
    38493787
    3850 /**
    3851  * Checks if the given address is an MMIO2 or pre-registered MMIO base address
    3852  * or not.
    3853  *
    3854  * @returns true/false accordingly.
    3855  * @param   pVM             The cross context VM structure.
    3856  * @param   pDevIns         The owner of the memory, optional.
    3857  * @param   GCPhys          The address to check.
    3858  */
    3859 VMMR3DECL(bool) PGMR3PhysMMIOExIsBase(PVM pVM, PPDMDEVINS pDevIns, RTGCPHYS GCPhys)
    3860 {
    3861     /*
    3862      * Validate input
    3863      */
    3864     VM_ASSERT_EMT_RETURN(pVM, false);
    3865     AssertPtrReturn(pDevIns, false);
    3866     AssertReturn(GCPhys != NIL_RTGCPHYS, false);
    3867     AssertReturn(GCPhys != 0, false);
    3868     AssertReturn(!(GCPhys & PAGE_OFFSET_MASK), false);
    3869 
    3870     /*
    3871      * Search the list.
    3872      */
    3873     pgmLock(pVM);
    3874     for (PPGMREGMMIO2RANGE pCurMmio = pVM->pgm.s.pRegMmioRangesR3; pCurMmio; pCurMmio = pCurMmio->pNextR3)
    3875         if (pCurMmio->RamRange.GCPhys == GCPhys)
    3876         {
    3877             Assert(pCurMmio->fFlags & PGMREGMMIO2RANGE_F_MAPPED);
    3878             bool fRet = RT_BOOL(pCurMmio->fFlags & PGMREGMMIO2RANGE_F_FIRST_CHUNK);
    3879             pgmUnlock(pVM);
    3880             return fRet;
    3881         }
    3882     pgmUnlock(pVM);
    3883     return false;
    3884 }
    3885 
    3886 
     3788#ifndef PGM_WITHOUT_MAPPINGS
    38873789/**
    38883790 * Gets the HC physical address of a page in the MMIO2 region.
    … …  
    39113813
    39123814    pgmLock(pVM);
    3913     PPGMREGMMIO2RANGE pCurMmio = pgmR3PhysMMIOExFind(pVM, pDevIns, iSubDev, iRegion, NIL_PGMMMIO2HANDLE);
     3815    PPGMREGMMIO2RANGE pCurMmio = pgmR3PhysMmio2Find(pVM, pDevIns, iSubDev, iRegion, NIL_PGMMMIO2HANDLE);
    39143816    AssertReturn(pCurMmio, VERR_NOT_FOUND);
    39153817    AssertReturn(pCurMmio->fFlags & (PGMREGMMIO2RANGE_F_MMIO2 | PGMREGMMIO2RANGE_F_FIRST_CHUNK), VERR_WRONG_TYPE);
    … …  
    39283830    return VINF_SUCCESS;
    39293831}
    3930 
    3931 
    3932 /**
    3933  * Maps a portion of an MMIO2 region into kernel space (host).
    3934  *
    3935  * The kernel mapping will become invalid when the MMIO2 memory is deregistered
    3936  * or the VM is terminated.
    3937  *
    3938  * @return VBox status code.
    3939  *
    3940  * @param   pVM         The cross context VM structure.
    3941  * @param   pDevIns     The device owning the MMIO2 memory.
    3942  * @param   iSubDev     The sub-device number.
    3943  * @param   iRegion     The region.
    3944  * @param   off         The offset into the region. Must be page aligned.
    3945  * @param   cb          The number of bytes to map. Must be page aligned.
    3946  * @param   pszDesc     Mapping description.
    3947  * @param   pR0Ptr      Where to store the R0 address.
    3948  */
    3949 VMMR3_INT_DECL(int) PGMR3PhysMMIO2MapKernel(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion,
    3950                                             RTGCPHYS off, RTGCPHYS cb, const char *pszDesc, PRTR0PTR pR0Ptr)
    3951 {
    3952     /*
    3953      * Validate input.
    3954      */
    3955     VM_ASSERT_EMT_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
    3956     AssertPtrReturn(pDevIns, VERR_INVALID_PARAMETER);
    3957     AssertReturn(iSubDev <= UINT8_MAX, VERR_INVALID_PARAMETER);
    3958     AssertReturn(iRegion <= UINT8_MAX, VERR_INVALID_PARAMETER);
    3959 
    3960     PPGMREGMMIO2RANGE pFirstRegMmio = pgmR3PhysMMIOExFind(pVM, pDevIns, iSubDev, iRegion, NIL_PGMMMIO2HANDLE);
    3961     AssertReturn(pFirstRegMmio, VERR_NOT_FOUND);
    3962     AssertReturn(pFirstRegMmio->fFlags & (PGMREGMMIO2RANGE_F_MMIO2 | PGMREGMMIO2RANGE_F_FIRST_CHUNK), VERR_WRONG_TYPE);
    3963     AssertReturn(off < pFirstRegMmio->RamRange.cb, VERR_INVALID_PARAMETER);
    3964     AssertReturn(cb <= pFirstRegMmio->RamRange.cb, VERR_INVALID_PARAMETER);
    3965     AssertReturn(off + cb <= pFirstRegMmio->RamRange.cb, VERR_INVALID_PARAMETER);
    3966     NOREF(pszDesc);
    3967 
    3968     /*
    3969      * Pass the request on to the support library/driver.
    3970      */
    3971 #if defined(RT_OS_WINDOWS) || defined(RT_OS_LINUX) || defined(RT_OS_OS2) /** @todo Fully implement RTR0MemObjMapKernelEx everywhere. */
    3972     AssertLogRelReturn(off == 0, VERR_NOT_SUPPORTED);
    3973     AssertLogRelReturn(pFirstRegMmio->fFlags & PGMREGMMIO2RANGE_F_LAST_CHUNK, VERR_NOT_SUPPORTED);
    3974     int rc = SUPR3PageMapKernel(pFirstRegMmio->pvR3, 0 /*off*/, pFirstRegMmio->RamRange.cb, 0 /*fFlags*/, pR0Ptr);
    3975 #else
    3976     int rc = SUPR3PageMapKernel(pFirstRegMmio->pvR3, off, cb, 0 /*fFlags*/, pR0Ptr);
    3977 #endif
    3978 
    3979     return rc;
    3980 }
     3832#endif /* !PGM_WITHOUT_MAPPINGS */
    39813833
    39823834
    … …  
    39943846    AssertPtrReturn(pDevIns, NIL_RTGCPHYS);
    39953847
    3996     PPGMREGMMIO2RANGE pFirstRegMmio = pgmR3PhysMMIOExFind(pVM, pDevIns, UINT32_MAX, UINT32_MAX, hMmio2);
     3848    PPGMREGMMIO2RANGE pFirstRegMmio = pgmR3PhysMmio2Find(pVM, pDevIns, UINT32_MAX, UINT32_MAX, hMmio2);
    39973849    AssertReturn(pFirstRegMmio, NIL_RTGCPHYS);
    39983850
    … …  
    40033855
    40043856/**
    4005  * Changes the region number of an MMIO2 or pre-registered MMIO region.
     3857 * Changes the region number of an MMIO2 region.
    40063858 *
    40073859 * This is only for dealing with save state issues, nothing else.
    … …  
    40113863 * @param   pVM         The cross context VM structure.
    40123864 * @param   pDevIns     The device owning the MMIO2 memory.
    4013  * @param   iSubDev     The sub-device number.  Pass UINT32_MAX if @a hMmio2 is
    4014  *                      given.
    4015  * @param   iRegion     The region.  Pass UINT32_MAX if @a hMmio2 is given.
    4016  * @param   hMmio2      The handle of the region to map as an alternative to
    4017  *                      @a iSubDev and @a iRegion, pass NIL to use the
    4018  *                      other two.
     3865 * @param   hMmio2      The handle of the region.
    40193866 * @param   iNewRegion  The new region index.
    40203867 *
    … …  
    40223869 * @sa      @bugref{9359}
    40233870 */
    4024 VMMR3_INT_DECL(int) PGMR3PhysMMIOExChangeRegionNo(PVM pVM, PPDMDEVINS pDevIns, uint32_t iSubDev, uint32_t iRegion,
    4025                                                   PGMMMIO2HANDLE hMmio2, uint32_t iNewRegion)
     3871VMMR3_INT_DECL(int) PGMR3PhysMmio2ChangeRegionNo(PVM pVM, PPDMDEVINS pDevIns, PGMMMIO2HANDLE hMmio2, uint32_t iNewRegion)
    40263872{
    40273873    /*
    … …  
    40293875     */
    40303876    VM_ASSERT_EMT0_RETURN(pVM, VERR_VM_THREAD_NOT_EMT);
     3877    VM_ASSERT_STATE_RETURN(pVM, VMSTATE_LOADING, VERR_VM_INVALID_VM_STATE);
    40313878    AssertPtrReturn(pDevIns, VERR_INVALID_PARAMETER);
    4032     if (hMmio2 != NIL_PGMMMIO2HANDLE)
    4033     {
    4034         AssertReturn(iSubDev == UINT32_MAX, VERR_INVALID_PARAMETER);
    4035         AssertReturn(iRegion == UINT32_MAX, VERR_INVALID_PARAMETER);
    4036     }
    4037     else
    4038     {
    4039         AssertReturn(iSubDev <= UINT8_MAX, VERR_INVALID_PARAMETER);
    4040         AssertReturn(iRegion <= UINT8_MAX, VERR_INVALID_PARAMETER);
    4041     }
     3879    AssertReturn(hMmio2 != NIL_PGMMMIO2HANDLE, VERR_INVALID_HANDLE);
    40423880    AssertReturn(iNewRegion <= UINT8_MAX, VERR_INVALID_PARAMETER);
    40433881
    40443882    AssertReturn(pVM->enmVMState == VMSTATE_LOADING, VERR_INVALID_STATE);
    40453883
    4046     PPGMREGMMIO2RANGE pFirstRegMmio = pgmR3PhysMMIOExFind(pVM, pDevIns, iSubDev, iRegion, hMmio2);
    4047     AssertReturn(pFirstRegMmio, VERR_NOT_FOUND);
    4048     AssertReturn(pgmR3PhysMMIOExFind(pVM, pDevIns, pFirstRegMmio->iSubDev, iNewRegion, NIL_PGMMMIO2HANDLE) == NULL,
    4049                  VERR_RESOURCE_IN_USE);
     3884    int rc = pgmLock(pVM);
     3885    AssertRCReturn(rc, rc);
     3886
     3887    PPGMREGMMIO2RANGE pFirstRegMmio = pgmR3PhysMmio2Find(pVM, pDevIns, UINT32_MAX, UINT32_MAX, hMmio2);
     3888    AssertReturnStmt(pFirstRegMmio, pgmUnlock(pVM), VERR_NOT_FOUND);
     3889    AssertReturnStmt(pgmR3PhysMmio2Find(pVM, pDevIns, pFirstRegMmio->iSubDev, iNewRegion, NIL_PGMMMIO2HANDLE) == NULL,
     3890                     pgmUnlock(pVM), VERR_RESOURCE_IN_USE);
    40503891
    40513892    /*
    … …  
    40543895    pFirstRegMmio->iRegion = (uint8_t)iNewRegion;
    40553896
     3897    pgmUnlock(pVM);
    40563898    return VINF_SUCCESS;
    40573899}
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