- Timestamp:
- Nov 21, 2019 12:00:18 PM (5 years ago)
- Location:
- trunk/src/VBox/Devices/Graphics
- Files:
-
- 4 edited
-
DevVGA-SVGA.cpp (modified) (5 diffs)
-
DevVGA-SVGA.h (modified) (1 diff)
-
DevVGA.cpp (modified) (7 diffs)
-
DevVGA.h (modified) (1 diff)
Legend:
- Unmodified
- Added
- Removed
-
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.cpp
r82072 r82076 5263 5263 * @callback_method_impl{FNPCIIOREGIONMAP} 5264 5264 */ 5265 DECLCALLBACK(int) vmsvgaR3 IORegionMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,5266 RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType)5265 DECLCALLBACK(int) vmsvgaR3PciIORegionFifoMapUnmap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, 5266 RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType) 5267 5267 { 5268 5268 PVGASTATE pThis = PDMINS_2_DATA(pDevIns, PVGASTATE); … … 5271 5271 Assert(pPciDev == pDevIns->apPciDevs[0]); 5272 5272 5273 Log(("v gasvgaR3IORegionMap: iRegion=%d GCPhysAddress=%RGp cb=%RGp enmType=%d\n", iRegion, GCPhysAddress, cb, enmType));5273 Log(("vmsvgaR3PciIORegionFifoMapUnmap: iRegion=%d GCPhysAddress=%RGp cb=%RGp enmType=%d\n", iRegion, GCPhysAddress, cb, enmType)); 5274 5274 AssertReturn(iRegion == pThis->pciRegions.iFIFO && enmType == PCI_ADDRESS_SPACE_MEM_PREFETCH, VERR_INTERNAL_ERROR); 5275 5275 if (GCPhysAddress != NIL_RTGCPHYS) … … 5279 5279 */ 5280 5280 AssertLogRelMsg(cb == pThis->svga.cbFIFO, ("cb=%#RGp cbFIFO=%#x\n", cb, pThis->svga.cbFIFO)); 5281 rc = PDMDevHlpM MIOExMap(pDevIns, pPciDev, iRegion, GCPhysAddress);5281 rc = PDMDevHlpMmio2Map(pDevIns, pThis->hMmio2VmSvgaFifo, GCPhysAddress); 5282 5282 AssertRC(rc); 5283 5283 … … 5301 5301 Log(("vmsvgaR3IORegionMap: GCPhysFIFO=%RGp cbFIFO=%#x\n", GCPhysAddress, pThis->svga.cbFIFO)); 5302 5302 } 5303 rc = VINF_PCI_MAPPING_DONE; /* caller only cares about this status, so it is okay that we overwrite erros here. */ 5303 5304 } 5304 5305 else … … 5308 5309 rc = PGMHandlerPhysicalDeregister(PDMDevHlpGetVM(pDevIns), pThis->svga.GCPhysFIFO); 5309 5310 AssertRC(rc); 5311 # else 5312 rc = VINF_SUCCESS; 5310 5313 # endif 5311 5314 pThis->svga.GCPhysFIFO = 0; 5312 5315 } 5313 return VINF_SUCCESS;5316 return rc; 5314 5317 } 5315 5318 -
trunk/src/VBox/Devices/Graphics/DevVGA-SVGA.h
r82072 r82076 362 362 typedef struct VGAState *PVGASTATE; 363 363 364 DECLCALLBACK(int) vmsvgaR3 IORegionMap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion,365 RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType);364 DECLCALLBACK(int) vmsvgaR3PciIORegionFifoMapUnmap(PPDMDEVINS pDevIns, PPDMPCIDEV pPciDev, uint32_t iRegion, 365 RTGCPHYS GCPhysAddress, RTGCPHYS cb, PCIADDRESSSPACE enmType); 366 366 DECLCALLBACK(VBOXSTRICTRC) vmsvgaIORead(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t *pu32, unsigned cb); 367 367 DECLCALLBACK(VBOXSTRICTRC) vmsvgaIOWrite(PPDMDEVINS pDevIns, void *pvUser, RTIOPORT offPort, uint32_t u32, unsigned cb); -
trunk/src/VBox/Devices/Graphics/DevVGA.cpp
r82074 r82076 5762 5762 5763 5763 /* Update PGM on the region number change so it won't barf when restoring state. */ 5764 AssertLogRelReturn(pDevIns->CTX_SUFF(pHlp)->pfnM MIOExChangeRegionNo, VERR_VERSION_MISMATCH);5765 int rc = pDevIns->CTX_SUFF(pHlp)->pfnM MIOExChangeRegionNo(pDevIns, pPciDev, 0, 1);5764 AssertLogRelReturn(pDevIns->CTX_SUFF(pHlp)->pfnMmio2ChangeRegionNo, VERR_VERSION_MISMATCH); 5765 int rc = pDevIns->CTX_SUFF(pHlp)->pfnMmio2ChangeRegionNo(pDevIns, pThis->hMmio2VRam, 1); 5766 5766 AssertLogRelRCReturn(rc, rc); 5767 /** @todo Update the I/O port too, only currently we don't give a hoot about 5768 * the region number in the I/O port registrations so it can wait... 5769 * (Only visible in the 'info ioport' output IIRC). */ 5767 5770 5768 5771 /* Update the calling PCI device. */ … … 5794 5797 5795 5798 /* Adjust the size down. */ 5796 int rc = PDMDevHlpM MIOExReduce(pDevIns, pPciDev, iRegion, cbRegion);5799 int rc = PDMDevHlpMmio2Reduce(pDevIns, pThis->hMmio2VmSvgaFifo, cbRegion); 5797 5800 AssertLogRelMsgRCReturn(rc, 5798 5801 ("cbRegion=%#RGp cbFIFOConfig=%#x cbFIFO=%#x: %Rrc\n", … … 6632 6635 6633 6636 #ifdef VBOX_WITH_VMSVGA 6634 pThis->hIoPortVmSvga = NIL_IOMIOPORTHANDLE; 6637 pThis->hIoPortVmSvga = NIL_IOMIOPORTHANDLE; 6638 pThis->hMmio2VmSvgaFifo = NIL_PGMMMIO2HANDLE; 6635 6639 if (pThis->fVMSVGAEnabled) 6636 6640 { … … 6640 6644 AssertRCReturn(rc, rc); 6641 6645 6642 rc = PDMDevHlpPCIIORegionRegister(pDevIns, pThis->pciRegions.iFIFO, pThis->svga.cbFIFO, 6643 PCI_ADDRESS_SPACE_MEM_PREFETCH, vmsvgaR3IORegionMap); 6644 AssertRCReturn(rc, rc); 6646 rc = PDMDevHlpPCIIORegionCreateMmio2Ex(pDevIns, pThis->pciRegions.iFIFO, pThis->svga.cbFIFO, 6647 PCI_ADDRESS_SPACE_MEM_PREFETCH, 0 /*fFlags*/, vmsvgaR3PciIORegionFifoMapUnmap, 6648 "VMSVGA-FIFO", (void **)&pThis->svga.pFIFOR3, &pThis->hMmio2VmSvgaFifo); 6649 AssertRCReturn(rc, PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS, 6650 N_("Failed to create VMSVGA FIFO (%u bytes)"), pThis->svga.cbFIFO)); 6651 pThis->svga.pFIFOR0 = (RTR0PTR)pThis->svga.pFIFOR3; 6652 6645 6653 pPciDev->pfnRegionLoadChangeHookR3 = vgaR3PciRegionLoadChangeHook; 6646 6654 } … … 6666 6674 "VGA LFB", &pThis->hLfbAccessHandlerType); 6667 6675 AssertRCReturn(rc, rc); 6668 6669 /*6670 * Allocate VMSVGA FIFO.6671 */6672 #ifdef VBOX_WITH_VMSVGA6673 if (pThis->fVMSVGAEnabled)6674 {6675 /*6676 * Allocate and initialize the FIFO MMIO2 memory.6677 */6678 rc = PDMDevHlpMMIO2Register(pDevIns, pPciDev, pThis->pciRegions.iFIFO, pThis->svga.cbFIFO,6679 0 /*fFlags*/, (void **)&pThis->svga.pFIFOR3, "VMSVGA-FIFO");6680 if (RT_FAILURE(rc))6681 return PDMDevHlpVMSetError(pDevIns, rc, RT_SRC_POS,6682 N_("Failed to allocate %u bytes of memory for the VMSVGA device"), pThis->svga.cbFIFO);6683 pThis->svga.pFIFOR0 = (RTR0PTR)pThis->svga.pFIFOR3;6684 6685 # ifdef VBOX_WITH_RAW_MODE_KEEP6686 /* Don't need a mapping in RC */6687 # endif6688 # if defined(VBOX_WITH_2X_4GB_ADDR_SPACE)6689 if (pDevIns->fR0Enabled)6690 {6691 RTR0PTR pR0Mapping = 0;6692 rc = PDMDevHlpMMIO2MapKernel(pDevIns, pThis->pciRegions.iFIFO, 0 /* off */, pThis->svga.cbFIFO, "VMSVGA-FIFO", &pR0Mapping);6693 AssertLogRelMsgRCReturn(rc, ("PDMDevHlpMapMMIO2IntoR0(%#x,) -> %Rrc\n", pThis->svga.cbFIFO, rc), rc);6694 pThis->svga.pFIFOR0 = pR0Mapping;6695 }6696 # endif6697 }6698 #endif6699 6676 6700 6677 /* … … 7400 7377 if (pThis->hIoPortVmSvga != NIL_IOMIOPORTHANDLE) 7401 7378 { 7379 AssertReturn(pThis->fVMSVGAEnabled, VERR_INVALID_STATE); 7402 7380 rc = PDMDevHlpIoPortSetUpContext(pDevIns, pThis->hIoPortVmSvga, vmsvgaIOWrite, vmsvgaIORead, NULL /*pvUser*/); 7403 7381 AssertRCReturn(rc, rc); 7404 7382 } 7383 else 7384 AssertReturn(!pThis->fVMSVGAEnabled, VERR_INVALID_STATE); 7405 7385 # endif 7406 7386 … … 7412 7392 AssertLogRelMsgRCReturn(rc, ("PDMDevHlpMmio2SetUpContext(,VRAM,0,%#x,) -> %Rrc\n", VGA_MAPPING_SIZE, rc), rc); 7413 7393 # endif 7394 7395 /* 7396 * Map the VMSVGA FIFO into this context (only ring-0). 7397 */ 7398 # if defined(VBOX_WITH_VMSVGA) && !defined(IN_RC) 7399 # if defined(VBOX_WITH_2X_4GB_ADDR_SPACE) 7400 if (pThis->fVMSVGAEnabled) 7401 { 7402 rc = PDMDevHlpMmio2SetUpContext(pDevIns, pThis->hMmio2VmSvgaFifo, 0 /* off */, pThis->svga.cbFIFO, 7403 (void **)&pThis->svga.CTX_SUFF(pFIFO)); 7404 AssertLogRelMsgRCReturn(rc, ("PDMDevHlpMapMMIO2IntoR0(%#x,) -> %Rrc\n", pThis->svga.cbFIFO, rc), rc); 7405 } 7406 # endif 7407 #endif 7414 7408 7415 7409 return VINF_SUCCESS; -
trunk/src/VBox/Devices/Graphics/DevVGA.h
r82074 r82076 554 554 /** VMSVGA: I/O port PCI region. */ 555 555 IOMIOPORTHANDLE hIoPortVmSvga; 556 /** VMSVGA: The MMIO2 handle of the FIFO PCI region. */ 557 PGMMMIO2HANDLE hMmio2VmSvgaFifo; 556 558 # endif 557 559 /** The MMIO2 handle of the VRAM. */
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