Index: /trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp	(revision 80597)
+++ /trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp	(revision 80598)
@@ -4576,10 +4576,22 @@
     Assert(hmR0VmxGetFixedCr0Mask(pVCpu) & X86_CR0_PG);
     if (   (pCtx->cr4 & X86_CR4_PAE)
-        && (pCtx->cr0 & X86_CR0_PG)
-        && (u64GuestEfer & MSR_K6_EFER_NXE) != (u64HostEfer & MSR_K6_EFER_NXE))
-    {
-        /* Assert that host is NX capable. */
-        Assert(pVCpu->CTX_SUFF(pVM)->cpum.ro.HostFeatures.fNoExecute);
-        return true;
+        && (pCtx->cr0 & X86_CR0_PG))
+    {
+        /*
+         * If nested paging is not used, verify that the guest paging mode matches the
+         * shadow paging mode which is/will be placed in the VMCS (which is what will
+         * actually be used while executing the guest and not the CR4 shadow value).
+         */
+        AssertMsg(pVM->hm.s.fNestedPaging || (   pVCpu->hm.s.enmShadowMode == PGMMODE_PAE
+                                              || pVCpu->hm.s.enmShadowMode == PGMMODE_PAE_NX
+                                              || pVCpu->hm.s.enmShadowMode == PGMMODE_AMD64
+                                              || pVCpu->hm.s.enmShadowMode == PGMMODE_AMD64_NX),
+                  ("enmShadowMode=%u\n", pVCpu->hm.s.enmShadowMode));
+        if ((u64GuestEfer & MSR_K6_EFER_NXE) != (u64HostEfer & MSR_K6_EFER_NXE))
+        {
+            /* Verify that the host is NX capable. */
+            Assert(pVCpu->CTX_SUFF(pVM)->cpum.ro.HostFeatures.fNoExecute);
+            return true;
+        }
     }
 
@@ -5650,7 +5662,11 @@
                 case PGMMODE_AMD64:             /* 64-bit AMD paging (long mode). */
                 case PGMMODE_AMD64_NX:          /* 64-bit AMD paging (long mode) with NX enabled. */
+                {
 #ifdef VBOX_WITH_64_BITS_GUESTS
+                    /* For our assumption in hmR0VmxShouldSwapEferMsr. */
+                    Assert(u64GuestCr4 & X86_CR4_PAE);
                     break;
 #endif
+                }
                 default:
                     AssertFailed();
