Index: /trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp	(revision 78257)
+++ /trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp	(revision 78258)
@@ -2855,13 +2855,4 @@
     hmR0VmxSetMsrPermission(pVCpu, pVmcsInfo, fIsNstGstVmcs, MSR_K8_FS_BASE,        VMXMSRPM_ALLOW_RD_WR);
 
-#ifdef VBOX_STRICT
-    /** @todo NSTVMX: Remove this later. */
-    uint32_t fMsrpm = HMGetVmxMsrPermission(pVmcsInfo->pvMsrBitmap, MSR_IA32_SYSENTER_CS);
-    Assert((fMsrpm & VMXMSRPM_ALLOW_RD_WR) == VMXMSRPM_ALLOW_RD_WR);
-
-    fMsrpm = HMGetVmxMsrPermission(pVmcsInfo->pvMsrBitmap, MSR_K8_GS_BASE);
-    Assert((fMsrpm & VMXMSRPM_ALLOW_RD_WR) == VMXMSRPM_ALLOW_RD_WR);
-#endif
-
     /*
      * The IA32_PRED_CMD and IA32_FLUSH_CMD MSRs are write-only and has no state
@@ -2880,8 +2871,4 @@
         hmR0VmxSetMsrPermission(pVCpu, pVmcsInfo, fIsNstGstVmcs, MSR_IA32_SPEC_CTRL, VMXMSRPM_ALLOW_RD_WR);
 
-    /*
-     * IA32_EFER MSR is always intercepted, see @bugref{9180#c37}.
-     */
-
 #if HC_ARCH_BITS == 64
     /*
@@ -2895,10 +2882,14 @@
         hmR0VmxSetMsrPermission(pVCpu, pVmcsInfo, fIsNstGstVmcs, MSR_K8_SF_MASK,        VMXMSRPM_ALLOW_RD_WR);
         hmR0VmxSetMsrPermission(pVCpu, pVmcsInfo, fIsNstGstVmcs, MSR_K8_KERNEL_GS_BASE, VMXMSRPM_ALLOW_RD_WR);
-
-# ifdef VBOX_STRICT
-        fMsrpm = HMGetVmxMsrPermission(pVmcsInfo->pvMsrBitmap, MSR_K8_GS_BASE);
-        Assert((fMsrpm & VMXMSRPM_ALLOW_RD_WR) == VMXMSRPM_ALLOW_RD_WR);
-# endif
-    }
+    }
+#endif
+
+    /*
+     * IA32_EFER MSR is always intercepted, see @bugref{9180#c37}.
+     */
+#ifdef VBOX_STRICT
+    Assert(pVmcsInfo->pvMsrBitmap);
+    uint32_t const fMsrpmEfer = HMGetVmxMsrPermission(pVmcsInfo->pvMsrBitmap, MSR_K6_EFER);
+    Assert(fMsrpmEfer == VMXMSRPM_EXIT_RD_WR);
 #endif
 }
@@ -4927,5 +4918,4 @@
                  * the guest when it's not using paging.
                  */
-                HMVMX_CPUMCTX_ASSERT(pVCpu, CPUMCTX_EXTRN_CR3);
                 GCPhysGuestCR3 = pCtx->cr3;
             }
@@ -7576,4 +7566,5 @@
                     {
                         rc = VMXReadVmcsGstN(VMX_VMCS_GUEST_CR3, &u64Val);
+                        VMXLOCAL_BREAK_RC(rc);
                         if (pCtx->cr3 != u64Val)
                         {
