Index: /trunk/src/VBox/VMM/VMMR0/HMR0A.asm =================================================================== --- /trunk/src/VBox/VMM/VMMR0/HMR0A.asm (revision 77480) +++ /trunk/src/VBox/VMM/VMMR0/HMR0A.asm (revision 77481) @@ -867,6 +867,6 @@ ; load the guest ones when necessary. ; -; @cproto DECLASM(int) HMR0VMXStartVMhmR0DumpDescriptorM(RTHCUINT fResume, PCPUMCTX pCtx, PVMCSCACHE pCache, PVM pVM, -; PVMCPU pVCpu, PFNHMVMXSTARTVM pfnStartVM); +; @cproto DECLASM(int) HMR0VMXStartVMhmR0DumpDescriptorM(RTHCUINT fResume, PCPUMCTX pCtx, PVMXVMCSBATCHCACHE pCache, +; PVM pVM, PVMCPU pVCpu, PFNHMVMXSTARTVM pfnStartVM); ; ; @returns eax @@ -874,5 +874,5 @@ ; @param fResumeVM msc:rcx ; @param pCtx msc:rdx -; @param pVMCSCache msc:r8 +; @param pVmcsCache msc:r8 ; @param pVM msc:r9 ; @param pVCpu msc:[rbp+30h] The cross context virtual CPU structure of the calling EMT. @@ -898,5 +898,5 @@ mov [xBP + 010h], rcx ; fResumeVM mov [xBP + 018h], rdx ; pCtx - mov [xBP + 020h], r8 ; pVMCSCache + mov [xBP + 020h], r8 ; pVmcsCache mov [xBP + 028h], r9 ; pVM @@ -913,5 +913,5 @@ mov rcx, [xBP + 010h] ; fResumeVM mov rdx, [xBP + 018h] ; pCtx - mov r8, [xBP + 020h] ; pVMCSCache + mov r8, [xBP + 020h] ; pVmcsCache mov r9, [xBP + 028h] ; pVM call r11 @@ -954,5 +954,5 @@ mov rcx, [xBP + 010h] ; fResumeVM mov rdx, [xBP + 018h] ; pCtx - mov r8, [xBP + 020h] ; pVMCSCache + mov r8, [xBP + 020h] ; pVmcsCache mov r9, [xBP + 028h] ; pVM call r11 @@ -1016,5 +1016,5 @@ mov rcx, [xBP + 010h] ; fResumeVM mov rdx, [xBP + 018h] ; pCtx - mov r8, [xBP + 020h] ; pVMCSCache + mov r8, [xBP + 020h] ; pVmcsCache mov r9, [xBP + 028h] ; pVM call r11 @@ -1297,10 +1297,10 @@ %ifdef VMX_USE_CACHED_VMCS_ACCESSES - pop xDX ; Saved pCache + pop xDX ; Saved pVmcsCache ; Note! If we get here as a result of invalid VMCS pointer, all the following ; vmread's will fail (only eflags.cf=1 will be set) but that shouldn't cause any ; trouble only just less efficient. - mov ecx, [ss:xDX + VMCSCACHE.Read.cValidEntries] + mov ecx, [ss:xDX + VMXVMCSBATCHCACHE.Read.cValidEntries] cmp ecx, 0 ; Can't happen je %%no_cached_read32 @@ -1310,7 +1310,7 @@ %%cached_read32: dec xCX - mov eax, [ss:xDX + VMCSCACHE.Read.aField + xCX * 4] + mov eax, [ss:xDX + VMXVMCSBATCHCACHE.Read.aField + xCX * 4] ; Note! This leaves the high 32 bits of the cache entry unmodified!! - vmread [ss:xDX + VMCSCACHE.Read.aFieldVal + xCX * 8], xAX + vmread [ss:xDX + VMXVMCSBATCHCACHE.Read.aFieldVal + xCX * 8], xAX cmp xCX, 0 jnz %%cached_read32 @@ -1341,5 +1341,5 @@ ; @param fResume x86:[ebp+8], msc:rcx,gcc:rdi Whether to use vmlauch/vmresume. ; @param pCtx x86:[ebp+c], msc:rdx,gcc:rsi Pointer to the guest-CPU context. -; @param pCache x86:[ebp+10],msc:r8, gcc:rdx Pointer to the VMCS cache. +; @param pVmcsCache x86:[ebp+10],msc:r8, gcc:rdx Pointer to the VMCS cache. ; @param pVM x86:[ebp+14],msc:r9, gcc:rcx The cross context VM structure. ; @param pVCpu x86:[ebp+18],msc:[ebp+30],gcc:r8 The cross context virtual CPU structure of the calling EMT. @@ -1378,14 +1378,14 @@ ; fResume already in rdi ; pCtx already in rsi - mov rbx, rdx ; pCache + mov rbx, rdx ; pVmcsCache %else mov rdi, rcx ; fResume mov rsi, rdx ; pCtx - mov rbx, r8 ; pCache + mov rbx, r8 ; pVmcsCache %endif %else mov edi, [ebp + 8] ; fResume mov esi, [ebp + 12] ; pCtx - mov ebx, [ebp + 16] ; pCache + mov ebx, [ebp + 16] ; pVmcsCache %endif @@ -1428,5 +1428,5 @@ %ifdef VMX_USE_CACHED_VMCS_ACCESSES - mov ecx, [xBX + VMCSCACHE.Write.cValidEntries] + mov ecx, [xBX + VMXVMCSBATCHCACHE.Write.cValidEntries] cmp ecx, 0 je .no_cached_writes @@ -1437,14 +1437,14 @@ ALIGN(16) .cached_write: - mov eax, [xBX + VMCSCACHE.Write.aField + xCX * 4] - vmwrite xAX, [xBX + VMCSCACHE.Write.aFieldVal + xCX * 8] + mov eax, [xBX + VMXVMCSBATCHCACHE.Write.aField + xCX * 4] + vmwrite xAX, [xBX + VMXVMCSBATCHCACHE.Write.aFieldVal + xCX * 8] inc xCX cmp xCX, xDX jl .cached_write - mov dword [xBX + VMCSCACHE.Write.cValidEntries], 0 + mov dword [xBX + VMXVMCSBATCHCACHE.Write.cValidEntries], 0 .no_cached_writes: - ; Save the pCache pointer. + ; Save the pVmcsCache pointer. push xBX %endif @@ -1624,10 +1624,10 @@ %ifdef VMX_USE_CACHED_VMCS_ACCESSES - pop xDX ; Saved pCache + pop xDX ; Saved pVmcsCache ; Note! If we get here as a result of invalid VMCS pointer, all the following ; vmread's will fail (only eflags.cf=1 will be set) but that shouldn't cause any ; trouble only just less efficient. - mov ecx, [xDX + VMCSCACHE.Read.cValidEntries] + mov ecx, [xDX + VMXVMCSBATCHCACHE.Read.cValidEntries] cmp ecx, 0 ; Can't happen je %%no_cached_read64 @@ -1637,6 +1637,6 @@ %%cached_read64: dec xCX - mov eax, [xDX + VMCSCACHE.Read.aField + xCX * 4] - vmread [xDX + VMCSCACHE.Read.aFieldVal + xCX * 8], xAX + mov eax, [xDX + VMXVMCSBATCHCACHE.Read.aField + xCX * 4] + vmread [xDX + VMXVMCSBATCHCACHE.Read.aFieldVal + xCX * 8], xAX cmp xCX, 0 jnz %%cached_read64 @@ -1667,5 +1667,5 @@ ; @param fResume msc:rcx, gcc:rdi Whether to use vmlauch/vmresume. ; @param pCtx msc:rdx, gcc:rsi Pointer to the guest-CPU context. -; @param pCache msc:r8, gcc:rdx Pointer to the VMCS cache. +; @param pVmcsCache msc:r8, gcc:rdx Pointer to the VMCS cache. ; @param pVM msc:r9, gcc:rcx The cross context VM structure. ; @param pVCpu msc:[ebp+30], gcc:r8 The cross context virtual CPU structure of the calling EMT. @@ -1694,9 +1694,9 @@ ; fResume already in rdi ; pCtx already in rsi - mov rbx, rdx ; pCache + mov rbx, rdx ; pVmcsCache %else mov rdi, rcx ; fResume mov rsi, rdx ; pCtx - mov rbx, r8 ; pCache + mov rbx, r8 ; pVmcsCache %endif @@ -1737,5 +1737,5 @@ %ifdef VMX_USE_CACHED_VMCS_ACCESSES - mov ecx, [xBX + VMCSCACHE.Write.cValidEntries] + mov ecx, [xBX + VMXVMCSBATCHCACHE.Write.cValidEntries] cmp ecx, 0 je .no_cached_writes @@ -1746,14 +1746,14 @@ ALIGN(16) .cached_write: - mov eax, [xBX + VMCSCACHE.Write.aField + xCX * 4] - vmwrite xAX, [xBX + VMCSCACHE.Write.aFieldVal + xCX * 8] + mov eax, [xBX + VMXVMCSBATCHCACHE.Write.aField + xCX * 4] + vmwrite xAX, [xBX + VMXVMCSBATCHCACHE.Write.aFieldVal + xCX * 8] inc xCX cmp xCX, xDX jl .cached_write - mov dword [xBX + VMCSCACHE.Write.cValidEntries], 0 + mov dword [xBX + VMXVMCSBATCHCACHE.Write.cValidEntries], 0 .no_cached_writes: - ; Save the pCache pointer. + ; Save the pVmcsCache pointer. push xBX %endif Index: /trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp (revision 77480) +++ /trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp (revision 77481) @@ -4988,7 +4988,7 @@ PVM pVM = pVCpu->CTX_SUFF(pVM); #ifdef VBOX_WITH_KERNEL_USING_XMM - int rc = hmR0VMXStartVMWrapXMM(fResumeVM, pCtx, &pVCpu->hm.s.vmx.VMCSCache, pVM, pVCpu, pVCpu->hm.s.vmx.pfnStartVM); + int rc = hmR0VMXStartVMWrapXMM(fResumeVM, pCtx, &pVCpu->hm.s.vmx.VmcsBatchCache, pVM, pVCpu, pVCpu->hm.s.vmx.pfnStartVM); #else - int rc = pVCpu->hm.s.vmx.pfnStartVM(fResumeVM, pCtx, &pVCpu->hm.s.vmx.VMCSCache, pVM, pVCpu); + int rc = pVCpu->hm.s.vmx.pfnStartVM(fResumeVM, pCtx, &pVCpu->hm.s.vmx.VmcsBatchCache, pVM, pVCpu); #endif AssertMsg(rc <= VINF_SUCCESS, ("%Rrc\n", rc)); @@ -5267,13 +5267,13 @@ AssertReturn(pVM->hm.s.pfnHost32ToGuest64R0, VERR_HM_NO_32_TO_64_SWITCHER); Assert(enmOp > HM64ON32OP_INVALID && enmOp < HM64ON32OP_END); - Assert(pVCpu->hm.s.vmx.VMCSCache.Write.cValidEntries <= RT_ELEMENTS(pVCpu->hm.s.vmx.VMCSCache.Write.aField)); - Assert(pVCpu->hm.s.vmx.VMCSCache.Read.cValidEntries <= RT_ELEMENTS(pVCpu->hm.s.vmx.VMCSCache.Read.aField)); + Assert(pVCpu->hm.s.vmx.VmcsBatchCache.Write.cValidEntries <= RT_ELEMENTS(pVCpu->hm.s.vmx.VmcsBatchCache.Write.aField)); + Assert(pVCpu->hm.s.vmx.VmcsBatchCache.Read.cValidEntries <= RT_ELEMENTS(pVCpu->hm.s.vmx.VmcsBatchCache.Read.aField)); #ifdef VBOX_STRICT - for (uint32_t i = 0; i < pVCpu->hm.s.vmx.VMCSCache.Write.cValidEntries; i++) - Assert(hmR0VmxIsValidWriteField(pVCpu->hm.s.vmx.VMCSCache.Write.aField[i])); - - for (uint32_t i = 0; i hm.s.vmx.VMCSCache.Read.cValidEntries; i++) - Assert(hmR0VmxIsValidReadField(pVCpu->hm.s.vmx.VMCSCache.Read.aField[i])); + for (uint32_t i = 0; i < pVCpu->hm.s.vmx.VmcsBatchCache.Write.cValidEntries; i++) + Assert(hmR0VmxIsValidWriteField(pVCpu->hm.s.vmx.VmcsBatchCache.Write.aField[i])); + + for (uint32_t i = 0; i hm.s.vmx.VmcsBatchCache.Read.cValidEntries; i++) + Assert(hmR0VmxIsValidReadField(pVCpu->hm.s.vmx.VmcsBatchCache.Read.aField[i])); #endif @@ -5343,5 +5343,5 @@ * @param pVCpu The cross context virtual CPU structure. */ -DECLASM(int) VMXR0SwitcherStartVM64(RTHCUINT fResume, PCPUMCTX pCtx, PVMCSCACHE pCache, PVM pVM, PVMCPU pVCpu) +DECLASM(int) VMXR0SwitcherStartVM64(RTHCUINT fResume, PCPUMCTX pCtx, PVMXVMCSBATCHCACHE pCache, PVM pVM, PVMCPU pVCpu) { NOREF(fResume); @@ -5373,5 +5373,5 @@ aParam[2] = RT_LO_U32(pVCpu->hm.s.vmx.HCPhysVmcs); /* Param 2: VMCS physical address - Lo. */ aParam[3] = RT_HI_U32(pVCpu->hm.s.vmx.HCPhysVmcs); /* Param 2: VMCS physical address - Hi. */ - aParam[4] = VM_RC_ADDR(pVM, &pVM->aCpus[pVCpu->idCpu].hm.s.vmx.VMCSCache); + aParam[4] = VM_RC_ADDR(pVM, &pVM->aCpus[pVCpu->idCpu].hm.s.vmx.VmcsBatchCache); aParam[5] = 0; aParam[6] = VM_RC_ADDR(pVM, pVM); @@ -5400,6 +5400,6 @@ AssertMsg(pCache->TestIn.pCache == pCache->TestOut.pCache, ("%RGv vs %RGv\n", pCache->TestIn.pCache, pCache->TestOut.pCache)); - AssertMsg(pCache->TestIn.pCache == VM_RC_ADDR(pVM, &pVM->aCpus[pVCpu->idCpu].hm.s.vmx.VMCSCache), - ("%RGv vs %RGv\n", pCache->TestIn.pCache, VM_RC_ADDR(pVM, &pVM->aCpus[pVCpu->idCpu].hm.s.vmx.VMCSCache))); + AssertMsg(pCache->TestIn.pCache == VM_RC_ADDR(pVM, &pVM->aCpus[pVCpu->idCpu].hm.s.vmx.VmcsBatchCache), + ("%RGv vs %RGv\n", pCache->TestIn.pCache, VM_RC_ADDR(pVM, &pVM->aCpus[pVCpu->idCpu].hm.s.vmx.VmcsBatchCache))); AssertMsg(pCache->TestIn.pCtx == pCache->TestOut.pCtx, ("%RGv vs %RGv\n", pCache->TestIn.pCtx, pCache->TestOut.pCtx)); @@ -5432,5 +5432,5 @@ } while (0) - PVMCSCACHE pCache = &pVCpu->hm.s.vmx.VMCSCache; + PVMXVMCSBATCHCACHE pCache = &pVCpu->hm.s.vmx.VmcsBatchCache; uint32_t cReadFields = 0; @@ -5612,7 +5612,7 @@ { AssertPtr(pVCpu); - PVMCSCACHE pCache = &pVCpu->hm.s.vmx.VMCSCache; - - AssertMsgReturn(pCache->Write.cValidEntries < VMCSCACHE_MAX_ENTRY - 1, + PVMXVMCSBATCHCACHE pCache = &pVCpu->hm.s.vmx.VmcsBatchCache; + + AssertMsgReturn(pCache->Write.cValidEntries < VMX_VMCS_BATCH_CACHE_MAX_ENTRY - 1, ("entries=%u\n", pCache->Write.cValidEntries), VERR_ACCESS_DENIED); Index: /trunk/src/VBox/VMM/VMMR0/HMVMXR0.h =================================================================== --- /trunk/src/VBox/VMM/VMMR0/HMVMXR0.h (revision 77480) +++ /trunk/src/VBox/VMM/VMMR0/HMVMXR0.h (revision 77481) @@ -46,9 +46,9 @@ VMMR0DECL(int) VMXR0ImportStateOnDemand(PVMCPU pVCpu, uint64_t fWhat); VMMR0DECL(VBOXSTRICTRC) VMXR0RunGuestCode(PVMCPU pVCpu); -DECLASM(int) VMXR0StartVM32(RTHCUINT fResume, PCPUMCTX pCtx, PVMCSCACHE pCache, PVM pVM, PVMCPU pVCpu); -DECLASM(int) VMXR0StartVM64(RTHCUINT fResume, PCPUMCTX pCtx, PVMCSCACHE pCache, PVM pVM, PVMCPU pVCpu); +DECLASM(int) VMXR0StartVM32(RTHCUINT fResume, PCPUMCTX pCtx, PVMXVMCSBATCHCACHE pVmcsCache, PVM pVM, PVMCPU pVCpu); +DECLASM(int) VMXR0StartVM64(RTHCUINT fResume, PCPUMCTX pCtx, PVMXVMCSBATCHCACHE pVmcsCache, PVM pVM, PVMCPU pVCpu); # if HC_ARCH_BITS == 32 && defined(VBOX_WITH_64_BITS_GUESTS) -DECLASM(int) VMXR0SwitcherStartVM64(RTHCUINT fResume, PCPUMCTX pCtx, PVMCSCACHE pCache, PVM pVM, PVMCPU pVCpu); +DECLASM(int) VMXR0SwitcherStartVM64(RTHCUINT fResume, PCPUMCTX pCtx, PVMXVMCSBATCHCACHE pVmcsCache, PVM pVM, PVMCPU pVCpu); VMMR0DECL(int) VMXR0Execute64BitsHandler(PVMCPU pVCpu, HM64ON32OP enmOp, uint32_t cbParam, uint32_t *paParam); # endif @@ -61,5 +61,5 @@ { Assert(idxCache <= VMX_VMCS_MAX_NESTED_PAGING_CACHE_IDX); - *pVal = pVCpu->hm.s.vmx.VMCSCache.Read.aFieldVal[idxCache]; + *pVal = pVCpu->hm.s.vmx.VmcsBatchCache.Read.aFieldVal[idxCache]; return VINF_SUCCESS; } Index: /trunk/src/VBox/VMM/VMMR3/HM.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR3/HM.cpp (revision 77480) +++ /trunk/src/VBox/VMM/VMMR3/HM.cpp (revision 77481) @@ -961,7 +961,7 @@ PVMCPU pVCpu = &pVM->aCpus[i]; - PVMCSCACHE pCache = &pVCpu->hm.s.vmx.VMCSCache; - strcpy((char *)pCache->aMagic, "VMCSCACHE Magic"); - pCache->uMagic = UINT64_C(0xdeadbeefdeadbeef); + PVMXVMCSBATCHCACHE pVmcsCache = &pVCpu->hm.s.vmx.VmcsBatchCache; + strcpy((char *)pVmcsCache->aMagic, "VMCSCACHE Magic"); + pVmcsCache->uMagic = UINT64_C(0xdeadbeefdeadbeef); } #endif @@ -1977,7 +1977,7 @@ #ifdef VBOX_WITH_CRASHDUMP_MAGIC - memset(pVCpu->hm.s.vmx.VMCSCache.aMagic, 0, sizeof(pVCpu->hm.s.vmx.VMCSCache.aMagic)); - pVCpu->hm.s.vmx.VMCSCache.uMagic = 0; - pVCpu->hm.s.vmx.VMCSCache.uPos = 0xffffffff; + memset(pVCpu->hm.s.vmx.VmcsBatchCache.aMagic, 0, sizeof(pVCpu->hm.s.vmx.VmcsBatchCache.aMagic)); + pVCpu->hm.s.vmx.VmcsBatchCache.uMagic = 0; + pVCpu->hm.s.vmx.VmcsBatchCache.uPos = 0xffffffff; #endif } @@ -2006,12 +2006,12 @@ /* Reset the contents of the read cache. */ - PVMCSCACHE pCache = &pVCpu->hm.s.vmx.VMCSCache; - for (unsigned j = 0; j < pCache->Read.cValidEntries; j++) - pCache->Read.aFieldVal[j] = 0; + PVMXVMCSBATCHCACHE pVmcsCache = &pVCpu->hm.s.vmx.VmcsBatchCache; + for (unsigned j = 0; j < pVmcsCache->Read.cValidEntries; j++) + pVmcsCache->Read.aFieldVal[j] = 0; #ifdef VBOX_WITH_CRASHDUMP_MAGIC /* Magic marker for searching in crash dumps. */ - strcpy((char *)pCache->aMagic, "VMCSCACHE Magic"); - pCache->uMagic = UINT64_C(0xdeadbeefdeadbeef); + strcpy((char *)pVmcsCache->aMagic, "VMCSCACHE Magic"); + pVmcsCache->uMagic = UINT64_C(0xdeadbeefdeadbeef); #endif } Index: /trunk/src/VBox/VMM/VMMSwitcher/LegacyandAMD64.mac =================================================================== --- /trunk/src/VBox/VMM/VMMSwitcher/LegacyandAMD64.mac (revision 77480) +++ /trunk/src/VBox/VMM/VMMSwitcher/LegacyandAMD64.mac (revision 77481) @@ -863,17 +863,17 @@ %ifdef VBOX_WITH_CRASHDUMP_MAGIC - mov qword [rbx + VMCSCACHE.uPos], 2 + mov qword [rbx + VMXVMCSBATCHCACHE.uPos], 2 %endif %ifdef DEBUG mov rax, [rbp + 8 + 8] ; HCPhysCpuPage - mov [rbx + VMCSCACHE.TestIn.HCPhysCpuPage], rax + mov [rbx + VMXVMCSBATCHCACHE.TestIn.HCPhysCpuPage], rax mov rax, [rbp + 16 + 8] ; HCPhysVmcs - mov [rbx + VMCSCACHE.TestIn.HCPhysVmcs], rax - mov [rbx + VMCSCACHE.TestIn.pCache], rbx - mov [rbx + VMCSCACHE.TestIn.pCtx], rsi + mov [rbx + VMXVMCSBATCHCACHE.TestIn.HCPhysVmcs], rax + mov [rbx + VMXVMCSBATCHCACHE.TestIn.pCache], rbx + mov [rbx + VMXVMCSBATCHCACHE.TestIn.pCtx], rsi %endif - mov ecx, [rbx + VMCSCACHE.Write.cValidEntries] + mov ecx, [rbx + VMXVMCSBATCHCACHE.Write.cValidEntries] cmp ecx, 0 je .no_cached_writes @@ -884,15 +884,15 @@ ALIGN(16) .cached_write: - mov eax, [rbx + VMCSCACHE.Write.aField + rcx*4] - vmwrite rax, qword [rbx + VMCSCACHE.Write.aFieldVal + rcx*8] + mov eax, [rbx + VMXVMCSBATCHCACHE.Write.aField + rcx*4] + vmwrite rax, qword [rbx + VMXVMCSBATCHCACHE.Write.aFieldVal + rcx*8] inc rcx cmp rcx, rdx jl .cached_write - mov dword [rbx + VMCSCACHE.Write.cValidEntries], 0 + mov dword [rbx + VMXVMCSBATCHCACHE.Write.cValidEntries], 0 .no_cached_writes: %ifdef VBOX_WITH_CRASHDUMP_MAGIC - mov qword [rbx + VMCSCACHE.uPos], 3 + mov qword [rbx + VMXVMCSBATCHCACHE.uPos], 3 %endif ; Save the pCache pointer. @@ -946,5 +946,5 @@ %ifdef VBOX_WITH_CRASHDUMP_MAGIC - mov qword [rbx + VMCSCACHE.uPos], 4 + mov qword [rbx + VMXVMCSBATCHCACHE.uPos], 4 %endif @@ -969,5 +969,5 @@ %ifdef VBOX_WITH_CRASHDUMP_MAGIC - mov qword [rbx + VMCSCACHE.uPos], 5 + mov qword [rbx + VMXVMCSBATCHCACHE.uPos], 5 %endif @@ -1084,14 +1084,14 @@ %ifdef VBOX_WITH_CRASHDUMP_MAGIC - mov dword [rdi + VMCSCACHE.uPos], 7 + mov dword [rdi + VMXVMCSBATCHCACHE.uPos], 7 %endif %ifdef DEBUG - mov [rdi + VMCSCACHE.TestOut.pCache], rdi - mov [rdi + VMCSCACHE.TestOut.pCtx], rsi + mov [rdi + VMXVMCSBATCHCACHE.TestOut.pCache], rdi + mov [rdi + VMXVMCSBATCHCACHE.TestOut.pCtx], rsi mov rax, cr8 - mov [rdi + VMCSCACHE.TestOut.cr8], rax + mov [rdi + VMXVMCSBATCHCACHE.TestOut.cr8], rax %endif - mov ecx, [rdi + VMCSCACHE.Read.cValidEntries] + mov ecx, [rdi + VMXVMCSBATCHCACHE.Read.cValidEntries] cmp ecx, 0 ; Can't happen je .no_cached_reads @@ -1101,11 +1101,11 @@ .cached_read: dec rcx - mov eax, [rdi + VMCSCACHE.Read.aField + rcx*4] - vmread qword [rdi + VMCSCACHE.Read.aFieldVal + rcx*8], rax + mov eax, [rdi + VMXVMCSBATCHCACHE.Read.aField + rcx*4] + vmread qword [rdi + VMXVMCSBATCHCACHE.Read.aFieldVal + rcx*8], rax cmp rcx, 0 jnz .cached_read .no_cached_reads: %ifdef VBOX_WITH_CRASHDUMP_MAGIC - mov dword [rdi + VMCSCACHE.uPos], 8 + mov dword [rdi + VMXVMCSBATCHCACHE.uPos], 8 %endif %endif @@ -1117,5 +1117,5 @@ %ifdef VBOX_WITH_CRASHDUMP_MAGIC - mov dword [rdi + VMCSCACHE.uPos], 9 + mov dword [rdi + VMXVMCSBATCHCACHE.uPos], 9 %endif .vmstart64_end: @@ -1124,5 +1124,5 @@ %ifdef DEBUG mov rdx, [rsp] ; HCPhysVmcs - mov [rdi + VMCSCACHE.TestOut.HCPhysVmcs], rdx + mov [rdi + VMXVMCSBATCHCACHE.TestOut.HCPhysVmcs], rdx %endif %endif @@ -1143,7 +1143,7 @@ pushf pop rdx - mov [rdi + VMCSCACHE.TestOut.eflags], rdx + mov [rdi + VMXVMCSBATCHCACHE.TestOut.eflags], rdx %ifdef VBOX_WITH_CRASHDUMP_MAGIC - mov dword [rdi + VMCSCACHE.uPos], 12 + mov dword [rdi + VMXVMCSBATCHCACHE.uPos], 12 %endif .skip_flags_save: @@ -1169,10 +1169,10 @@ pop rdi ; pCache %ifdef VBOX_WITH_CRASHDUMP_MAGIC - mov dword [rdi + VMCSCACHE.uPos], 10 + mov dword [rdi + VMXVMCSBATCHCACHE.uPos], 10 %endif %ifdef DEBUG - mov [rdi + VMCSCACHE.TestOut.pCache], rdi - mov [rdi + VMCSCACHE.TestOut.pCtx], rsi + mov [rdi + VMXVMCSBATCHCACHE.TestOut.pCache], rdi + mov [rdi + VMXVMCSBATCHCACHE.TestOut.pCtx], rsi %endif %endif @@ -1201,9 +1201,9 @@ %ifdef DEBUG - mov [rdi + VMCSCACHE.TestOut.pCache], rdi - mov [rdi + VMCSCACHE.TestOut.pCtx], rsi + mov [rdi + VMXVMCSBATCHCACHE.TestOut.pCache], rdi + mov [rdi + VMXVMCSBATCHCACHE.TestOut.pCtx], rsi %endif %ifdef VBOX_WITH_CRASHDUMP_MAGIC - mov dword [rdi + VMCSCACHE.uPos], 11 + mov dword [rdi + VMXVMCSBATCHCACHE.uPos], 11 %endif %endif Index: /trunk/src/VBox/VMM/include/HMInternal.h =================================================================== --- /trunk/src/VBox/VMM/include/HMInternal.h (revision 77480) +++ /trunk/src/VBox/VMM/include/HMInternal.h (revision 77481) @@ -600,10 +600,10 @@ /* Maximum number of cached entries. */ -#define VMCSCACHE_MAX_ENTRY 128 +#define VMX_VMCS_BATCH_CACHE_MAX_ENTRY 128 /** - * Structure for storing read and write VMCS actions. - */ -typedef struct VMCSCACHE + * Cache of a VMCS for batch reads or writes. + */ +typedef struct VMXVMCSBATCHCACHE { #ifdef VBOX_WITH_CRASHDUMP_MAGIC @@ -625,6 +625,6 @@ uint32_t cValidEntries; uint32_t uAlignment; - uint32_t aField[VMCSCACHE_MAX_ENTRY]; - uint64_t aFieldVal[VMCSCACHE_MAX_ENTRY]; + uint32_t aField[VMX_VMCS_BATCH_CACHE_MAX_ENTRY]; + uint64_t aFieldVal[VMX_VMCS_BATCH_CACHE_MAX_ENTRY]; } Write; struct @@ -632,6 +632,6 @@ uint32_t cValidEntries; uint32_t uAlignment; - uint32_t aField[VMCSCACHE_MAX_ENTRY]; - uint64_t aFieldVal[VMCSCACHE_MAX_ENTRY]; + uint32_t aField[VMX_VMCS_BATCH_CACHE_MAX_ENTRY]; + uint64_t aFieldVal[VMX_VMCS_BATCH_CACHE_MAX_ENTRY]; } Read; #ifdef VBOX_STRICT @@ -659,8 +659,8 @@ } ScratchPad; #endif -} VMCSCACHE; -/** Pointer to VMCSCACHE. */ -typedef VMCSCACHE *PVMCSCACHE; -AssertCompileSizeAlignment(VMCSCACHE, 8); +} VMXVMCSBATCHCACHE; +/** Pointer to VMXVMCSBATCHCACHE. */ +typedef VMXVMCSBATCHCACHE *PVMXVMCSBATCHCACHE; +AssertCompileSizeAlignment(VMXVMCSBATCHCACHE, 8); /** @@ -670,9 +670,9 @@ * @param fResume Whether to use VMRESUME (true) or VMLAUNCH (false). * @param pCtx The CPU register context. - * @param pCache The VMCS cache. + * @param pVmcsCache The VMCS batch cache. * @param pVM Pointer to the cross context VM structure. * @param pVCpu Pointer to the cross context per-CPU structure. */ -typedef DECLCALLBACK(int) FNHMVMXSTARTVM(RTHCUINT fResume, PCPUMCTX pCtx, PVMCSCACHE pCache, PVM pVM, PVMCPU pVCpu); +typedef DECLCALLBACK(int) FNHMVMXSTARTVM(RTHCUINT fResume, PCPUMCTX pCtx, PVMXVMCSBATCHCACHE pVmcsCache, PVM pVM, PVMCPU pVCpu); /** Pointer to a VMX StartVM function. */ typedef R0PTRTYPE(FNHMVMXSTARTVM *) PFNHMVMXSTARTVM; @@ -835,6 +835,6 @@ uint64_t u64TscOffset; - /** VMCS cache. */ - VMCSCACHE VMCSCache; + /** VMCS cache for batched vmread/vmwrites. */ + VMXVMCSBATCHCACHE VmcsBatchCache; /** Real-mode emulation state. */ @@ -1110,5 +1110,5 @@ # ifdef VBOX_WITH_KERNEL_USING_XMM -DECLASM(int) hmR0VMXStartVMWrapXMM(RTHCUINT fResume, PCPUMCTX pCtx, PVMCSCACHE pCache, PVM pVM, PVMCPU pVCpu, +DECLASM(int) hmR0VMXStartVMWrapXMM(RTHCUINT fResume, PCPUMCTX pCtx, PVMXVMCSBATCHCACHE pVmcsCache, PVM pVM, PVMCPU pVCpu, PFNHMVMXSTARTVM pfnStartVM); DECLASM(int) hmR0SVMRunWrapXMM(RTHCPHYS pVmcbHostPhys, RTHCPHYS pVmcbPhys, PCPUMCTX pCtx, PVM pVM, PVMCPU pVCpu, Index: /trunk/src/VBox/VMM/include/HMInternal.mac =================================================================== --- /trunk/src/VBox/VMM/include/HMInternal.mac (revision 77480) +++ /trunk/src/VBox/VMM/include/HMInternal.mac (revision 77481) @@ -21,8 +21,8 @@ ;Maximum number of cached entries. -%define VMCSCACHE_MAX_ENTRY 128 +%define VMX_VMCS_BATCH_CACHE_MAX_ENTRY 128 ; Structure for storing read and write VMCS actions. -struc VMCSCACHE +struc VMXVMCSBATCHCACHE %ifdef VBOX_WITH_CRASHDUMP_MAGIC .aMagic resb 16 @@ -39,10 +39,10 @@ .Write.cValidEntries resd 1 .Write.uAlignment resd 1 - .Write.aField resd VMCSCACHE_MAX_ENTRY - .Write.aFieldVal resq VMCSCACHE_MAX_ENTRY + .Write.aField resd VMX_VMCS_BATCH_CACHE_MAX_ENTRY + .Write.aFieldVal resq VMX_VMCS_BATCH_CACHE_MAX_ENTRY .Read.cValidEntries resd 1 .Read.uAlignment resd 1 - .Read.aField resd VMCSCACHE_MAX_ENTRY - .Read.aFieldVal resq VMCSCACHE_MAX_ENTRY + .Read.aField resd VMX_VMCS_BATCH_CACHE_MAX_ENTRY + .Read.aFieldVal resq VMX_VMCS_BATCH_CACHE_MAX_ENTRY %ifdef VBOX_STRICT .TestIn.HCPhysCpuPage resq 1