Index: /trunk/src/VBox/VMM/VMMR3/CPUM.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR3/CPUM.cpp	(revision 76206)
+++ /trunk/src/VBox/VMM/VMMR3/CPUM.cpp	(revision 76207)
@@ -1390,5 +1390,6 @@
     {
         uint64_t uHostMsr = 0;
-        HMVmxGetHostMsr(pVM, MSR_IA32_VMX_MISC, &uHostMsr);
+        if (cpumR3IsHwAssistVmxNstGstExecAllowed(pVM))
+            HMVmxGetHostMsr(pVM, MSR_IA32_VMX_MISC, &uHostMsr);
         uint8_t const cMaxMsrs       = RT_MIN(RT_BF_GET(uHostMsr, VMX_BF_MISC_MAX_MSRS), VMX_V_AUTOMSR_COUNT_MAX);
         uint8_t const fActivityState = RT_BF_GET(uHostMsr, VMX_BF_MISC_ACTIVITY_STATES) & VMX_V_GUEST_ACTIVITY_STATE_MASK;
@@ -1412,5 +1413,6 @@
     {
         uint64_t uHostMsr = 0;
-        HMVmxGetHostMsr(pVM, MSR_IA32_VMX_CR0_FIXED1, &uHostMsr);
+        if (cpumR3IsHwAssistVmxNstGstExecAllowed(pVM))
+            HMVmxGetHostMsr(pVM, MSR_IA32_VMX_CR0_FIXED1, &uHostMsr);
         pVmxMsrs->u64Cr0Fixed1 = uHostMsr | VMX_V_CR0_FIXED0;   /* Make sure the CR0 MB1 bits are not clear. */
     }
@@ -1422,5 +1424,6 @@
     {
         uint64_t uHostMsr = 0;
-        HMVmxGetHostMsr(pVM, MSR_IA32_VMX_CR4_FIXED1, &uHostMsr);
+        if (cpumR3IsHwAssistVmxNstGstExecAllowed(pVM))
+            HMVmxGetHostMsr(pVM, MSR_IA32_VMX_CR4_FIXED1, &uHostMsr);
         pVmxMsrs->u64Cr4Fixed1 = uHostMsr | VMX_V_CR4_FIXED0;   /* Make sure the CR4 MB1 bits are not clear. */
     }