Index: /trunk/include/VBox/vmm/hm_vmx.h =================================================================== --- /trunk/include/VBox/vmm/hm_vmx.h (revision 76197) +++ /trunk/include/VBox/vmm/hm_vmx.h (revision 76198) @@ -1123,5 +1123,5 @@ { /** Bits set here -must- be set in the corresponding VM-execution controls. */ - uint32_t disallowed0; + uint32_t allowed0; /** Bits cleared here -must- be cleared in the corresponding VM-execution * controls. */ Index: /trunk/src/VBox/VMM/VMMAll/IEMAllCImplVmxInstr.cpp.h =================================================================== --- /trunk/src/VBox/VMM/VMMAll/IEMAllCImplVmxInstr.cpp.h (revision 76197) +++ /trunk/src/VBox/VMM/VMMAll/IEMAllCImplVmxInstr.cpp.h (revision 76198) @@ -6227,5 +6227,5 @@ VMXCTLSMSR EntryCtls; EntryCtls.u = CPUMGetGuestIa32VmxEntryCtls(pVCpu); - if (~pVmcs->u32EntryCtls & EntryCtls.n.disallowed0) + if (~pVmcs->u32EntryCtls & EntryCtls.n.allowed0) IEM_VMX_VMENTRY_FAILED_RET(pVCpu, pszInstr, pszFailure, kVmxVDiag_Vmentry_EntryCtlsDisallowed0); @@ -6330,5 +6330,5 @@ VMXCTLSMSR ExitCtls; ExitCtls.u = CPUMGetGuestIa32VmxExitCtls(pVCpu); - if (~pVmcs->u32ExitCtls & ExitCtls.n.disallowed0) + if (~pVmcs->u32ExitCtls & ExitCtls.n.allowed0) IEM_VMX_VMENTRY_FAILED_RET(pVCpu, pszInstr, pszFailure, kVmxVDiag_Vmentry_ExitCtlsDisallowed0); @@ -6385,5 +6385,5 @@ VMXCTLSMSR PinCtls; PinCtls.u = CPUMGetGuestIa32VmxPinbasedCtls(pVCpu); - if (~pVmcs->u32PinCtls & PinCtls.n.disallowed0) + if (~pVmcs->u32PinCtls & PinCtls.n.allowed0) IEM_VMX_VMENTRY_FAILED_RET(pVCpu, pszInstr, pszFailure, kVmxVDiag_Vmentry_PinCtlsDisallowed0); @@ -6396,5 +6396,5 @@ VMXCTLSMSR ProcCtls; ProcCtls.u = CPUMGetGuestIa32VmxProcbasedCtls(pVCpu); - if (~pVmcs->u32ProcCtls & ProcCtls.n.disallowed0) + if (~pVmcs->u32ProcCtls & ProcCtls.n.allowed0) IEM_VMX_VMENTRY_FAILED_RET(pVCpu, pszInstr, pszFailure, kVmxVDiag_Vmentry_ProcCtlsDisallowed0); @@ -6408,5 +6408,5 @@ VMXCTLSMSR ProcCtls2; ProcCtls2.u = CPUMGetGuestIa32VmxProcbasedCtls2(pVCpu); - if (~pVmcs->u32ProcCtls2 & ProcCtls2.n.disallowed0) + if (~pVmcs->u32ProcCtls2 & ProcCtls2.n.allowed0) IEM_VMX_VMENTRY_FAILED_RET(pVCpu, pszInstr, pszFailure, kVmxVDiag_Vmentry_ProcCtls2Disallowed0); Index: /trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp (revision 76197) +++ /trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp (revision 76198) @@ -2288,5 +2288,5 @@ { PVM pVM = pVCpu->CTX_SUFF(pVM); - uint32_t fVal = pVM->hm.s.vmx.Msrs.PinCtls.n.disallowed0; /* Bits set here must always be set. */ + uint32_t fVal = pVM->hm.s.vmx.Msrs.PinCtls.n.allowed0; /* Bits set here must always be set. */ uint32_t const fZap = pVM->hm.s.vmx.Msrs.PinCtls.n.allowed1; /* Bits cleared here must always be cleared. */ @@ -2317,5 +2317,5 @@ { LogRelFunc(("Invalid pin-based VM-execution controls combo! Cpu=%#RX32 fVal=%#RX32 fZap=%#RX32\n", - pVM->hm.s.vmx.Msrs.PinCtls.n.disallowed0, fVal, fZap)); + pVM->hm.s.vmx.Msrs.PinCtls.n.allowed0, fVal, fZap)); pVCpu->hm.s.u32HMError = VMX_UFC_CTRL_PIN_EXEC; return VERR_HM_UNSUPPORTED_CPU_FEATURE_COMBO; @@ -2343,5 +2343,5 @@ { PVM pVM = pVCpu->CTX_SUFF(pVM); - uint32_t fVal = pVM->hm.s.vmx.Msrs.ProcCtls2.n.disallowed0; /* Bits set here must be set in the VMCS. */ + uint32_t fVal = pVM->hm.s.vmx.Msrs.ProcCtls2.n.allowed0; /* Bits set here must be set in the VMCS. */ uint32_t const fZap = pVM->hm.s.vmx.Msrs.ProcCtls2.n.allowed1; /* Bits cleared here must be cleared in the VMCS. */ @@ -2414,5 +2414,5 @@ { LogRelFunc(("Invalid secondary processor-based VM-execution controls combo! cpu=%#RX32 fVal=%#RX32 fZap=%#RX32\n", - pVM->hm.s.vmx.Msrs.ProcCtls2.n.disallowed0, fVal, fZap)); + pVM->hm.s.vmx.Msrs.ProcCtls2.n.allowed0, fVal, fZap)); pVCpu->hm.s.u32HMError = VMX_UFC_CTRL_PROC_EXEC2; return VERR_HM_UNSUPPORTED_CPU_FEATURE_COMBO; @@ -2440,5 +2440,5 @@ { PVM pVM = pVCpu->CTX_SUFF(pVM); - uint32_t fVal = pVM->hm.s.vmx.Msrs.ProcCtls.n.disallowed0; /* Bits set here must be set in the VMCS. */ + uint32_t fVal = pVM->hm.s.vmx.Msrs.ProcCtls.n.allowed0; /* Bits set here must be set in the VMCS. */ uint32_t const fZap = pVM->hm.s.vmx.Msrs.ProcCtls.n.allowed1; /* Bits cleared here must be cleared in the VMCS. */ @@ -2453,5 +2453,5 @@ /* We toggle VMX_PROC_CTLS_MOV_DR_EXIT later, check if it's not -always- needed to be set or clear. */ if ( !(pVM->hm.s.vmx.Msrs.ProcCtls.n.allowed1 & VMX_PROC_CTLS_MOV_DR_EXIT) - || (pVM->hm.s.vmx.Msrs.ProcCtls.n.disallowed0 & VMX_PROC_CTLS_MOV_DR_EXIT)) + || (pVM->hm.s.vmx.Msrs.ProcCtls.n.allowed0 & VMX_PROC_CTLS_MOV_DR_EXIT)) { LogRelFunc(("Unsupported VMX_PROC_CTLS_MOV_DR_EXIT combo!")); @@ -2545,5 +2545,5 @@ { LogRelFunc(("Invalid processor-based VM-execution controls combo! cpu=%#RX32 fVal=%#RX32 fZap=%#RX32\n", - pVM->hm.s.vmx.Msrs.ProcCtls.n.disallowed0, fVal, fZap)); + pVM->hm.s.vmx.Msrs.ProcCtls.n.allowed0, fVal, fZap)); pVCpu->hm.s.u32HMError = VMX_UFC_CTRL_PROC_EXEC; return VERR_HM_UNSUPPORTED_CPU_FEATURE_COMBO; @@ -3227,5 +3227,5 @@ { PVM pVM = pVCpu->CTX_SUFF(pVM); - uint32_t fVal = pVM->hm.s.vmx.Msrs.EntryCtls.n.disallowed0; /* Bits set here must be set in the VMCS. */ + uint32_t fVal = pVM->hm.s.vmx.Msrs.EntryCtls.n.allowed0; /* Bits set here must be set in the VMCS. */ uint32_t const fZap = pVM->hm.s.vmx.Msrs.EntryCtls.n.allowed1; /* Bits cleared here must be cleared in the VMCS. */ @@ -3261,6 +3261,6 @@ if ((fVal & fZap) != fVal) { - Log4Func(("Invalid VM-entry controls combo! Cpu=%RX32 fVal=%RX32 fZap=%RX32\n", - pVM->hm.s.vmx.Msrs.EntryCtls.n.disallowed0, fVal, fZap)); + Log4Func(("Invalid VM-entry controls combo! Cpu=%#RX32 fVal=%#RX32 fZap=%#RX32\n", + pVM->hm.s.vmx.Msrs.EntryCtls.n.allowed0, fVal, fZap)); pVCpu->hm.s.u32HMError = VMX_UFC_CTRL_ENTRY; return VERR_HM_UNSUPPORTED_CPU_FEATURE_COMBO; @@ -3294,5 +3294,5 @@ { PVM pVM = pVCpu->CTX_SUFF(pVM); - uint32_t fVal = pVM->hm.s.vmx.Msrs.ExitCtls.n.disallowed0; /* Bits set here must be set in the VMCS. */ + uint32_t fVal = pVM->hm.s.vmx.Msrs.ExitCtls.n.allowed0; /* Bits set here must be set in the VMCS. */ uint32_t const fZap = pVM->hm.s.vmx.Msrs.ExitCtls.n.allowed1; /* Bits cleared here must be cleared in the VMCS. */ @@ -3345,6 +3345,6 @@ if ((fVal & fZap) != fVal) { - LogRelFunc(("Invalid VM-exit controls combo! cpu=%RX32 fVal=%RX32 fZap=%RX32\n", - pVM->hm.s.vmx.Msrs.ExitCtls.n.disallowed0, fVal, fZap)); + LogRelFunc(("Invalid VM-exit controls combo! cpu=%#RX32 fVal=%#RX32 fZap=%R#X32\n", + pVM->hm.s.vmx.Msrs.ExitCtls.n.allowed0, fVal, fZap)); pVCpu->hm.s.u32HMError = VMX_UFC_CTRL_EXIT; return VERR_HM_UNSUPPORTED_CPU_FEATURE_COMBO; @@ -9435,5 +9435,5 @@ pDbgState->fCpe1Extra |= VMX_PROC_CTLS_USE_SECONDARY_CTLS; pDbgState->fCpe1Extra &= pVM->hm.s.vmx.Msrs.ProcCtls.n.allowed1; - pDbgState->fCpe1Unwanted &= ~pVM->hm.s.vmx.Msrs.ProcCtls.n.disallowed0; + pDbgState->fCpe1Unwanted &= ~pVM->hm.s.vmx.Msrs.ProcCtls.n.allowed0; if (pVCpu->hm.s.fDebugWantRdTscExit != RT_BOOL(pDbgState->fCpe1Extra & VMX_PROC_CTLS_RDTSC_EXIT)) { Index: /trunk/src/VBox/VMM/VMMR3/HM.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR3/HM.cpp (revision 76197) +++ /trunk/src/VBox/VMM/VMMR3/HM.cpp (revision 76198) @@ -333,20 +333,20 @@ * Reports VT-x feature to the release log. * - * @param allowed1 Mask of allowed feature bits. - * @param disallowed0 Mask of disallowed feature bits. - * @param strdesc The description string to report. - * @param featflag Mask of the feature to report. - */ -#define HMVMX_REPORT_FEAT(allowed1, disallowed0, strdesc, featflag) \ + * @param a_uAllowed1 Mask of allowed-1 feature bits. + * @param a_uAllowed0 Mask of allowed-0 feature bits. + * @param a_StrDesc The description string to report. + * @param a_Featflag Mask of the feature to report. + */ +#define HMVMX_REPORT_FEAT(a_uAllowed1, a_uAllowed0, a_StrDesc, a_Featflag) \ do { \ - if ((allowed1) & (featflag)) \ + if ((a_uAllowed1) & (a_Featflag)) \ { \ - if ((disallowed0) & (featflag)) \ - LogRel(("HM: " strdesc " (must be set)\n")); \ + if ((a_uAllowed0) & (a_Featflag)) \ + LogRel(("HM: " a_StrDesc " (must be set)\n")); \ else \ - LogRel(("HM: " strdesc "\n")); \ + LogRel(("HM: " a_StrDesc "\n")); \ } \ else \ - LogRel(("HM: " strdesc " (must be cleared)\n")); \ + LogRel(("HM: " a_StrDesc " (must be cleared)\n")); \ } while (0) @@ -354,14 +354,14 @@ * Reports an allowed VT-x feature to the release log. * - * @param allowed1 Mask of allowed feature bits. - * @param strdesc The description string to report. - * @param featflag Mask of the feature to report. - */ -#define HMVMX_REPORT_ALLOWED_FEAT(allowed1, strdesc, featflag) \ + * @param a_uAllowed1 Mask of allowed-1 feature bits. + * @param a_StrDesc The description string to report. + * @param a_FeatFlag Mask of the feature to report. + */ +#define HMVMX_REPORT_ALLOWED_FEAT(a_uAllowed1, a_StrDesc, a_FeatFlag) \ do { \ - if ((allowed1) & (featflag)) \ - LogRel(("HM: " strdesc "\n")); \ + if ((a_uAllowed1) & (a_FeatFlag)) \ + LogRel(("HM: " a_StrDesc "\n")); \ else \ - LogRel(("HM: " strdesc " not supported\n")); \ + LogRel(("HM: " a_StrDesc " not supported\n")); \ } while (0) @@ -369,12 +369,12 @@ * Reports MSR feature capability. * - * @param msrcaps Mask of MSR feature bits. - * @param strdesc The description string to report. - * @param cap Mask of the feature to report. - */ -#define HMVMX_REPORT_MSR_CAP(msrcaps, strdesc, cap) \ + * @param a_MsrCaps Mask of MSR feature bits. + * @param a_StrDesc The description string to report. + * @param a_fCap Mask of the feature to report. + */ +#define HMVMX_REPORT_MSR_CAP(a_MsrCaps, a_StrDesc, a_fCap) \ do { \ - if ((msrcaps) & (cap)) \ - LogRel(("HM: " strdesc "\n")); \ + if ((a_MsrCaps) & (a_fCap)) \ + LogRel(("HM: " a_StrDesc "\n")); \ } while (0) @@ -1443,12 +1443,12 @@ static void hmR3VmxReportPinBasedCtlsMsr(PCVMXCTLSMSR pVmxMsr) { - uint64_t const val = pVmxMsr->n.allowed1; - uint64_t const zap = pVmxMsr->n.disallowed0; + uint64_t const fAllowed1 = pVmxMsr->n.allowed1; + uint64_t const fAllowed0 = pVmxMsr->n.allowed0; LogRel(("HM: MSR_IA32_VMX_PINBASED_CTLS = %#RX64\n", pVmxMsr->u)); - HMVMX_REPORT_FEAT(val, zap, "EXT_INT_EXIT", VMX_PIN_CTLS_EXT_INT_EXIT); - HMVMX_REPORT_FEAT(val, zap, "NMI_EXIT", VMX_PIN_CTLS_NMI_EXIT); - HMVMX_REPORT_FEAT(val, zap, "VIRTUAL_NMI", VMX_PIN_CTLS_VIRT_NMI); - HMVMX_REPORT_FEAT(val, zap, "PREEMPT_TIMER", VMX_PIN_CTLS_PREEMPT_TIMER); - HMVMX_REPORT_FEAT(val, zap, "POSTED_INT", VMX_PIN_CTLS_POSTED_INT); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "EXT_INT_EXIT", VMX_PIN_CTLS_EXT_INT_EXIT); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "NMI_EXIT", VMX_PIN_CTLS_NMI_EXIT); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "VIRTUAL_NMI", VMX_PIN_CTLS_VIRT_NMI); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "PREEMPT_TIMER", VMX_PIN_CTLS_PREEMPT_TIMER); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "POSTED_INT", VMX_PIN_CTLS_POSTED_INT); } @@ -1461,28 +1461,28 @@ static void hmR3VmxReportProcBasedCtlsMsr(PCVMXCTLSMSR pVmxMsr) { - uint64_t const val = pVmxMsr->n.allowed1; - uint64_t const zap = pVmxMsr->n.disallowed0; + uint64_t const fAllowed1 = pVmxMsr->n.allowed1; + uint64_t const fAllowed0 = pVmxMsr->n.allowed0; LogRel(("HM: MSR_IA32_VMX_PROCBASED_CTLS = %#RX64\n", pVmxMsr->u)); - HMVMX_REPORT_FEAT(val, zap, "INT_WINDOW_EXIT", VMX_PROC_CTLS_INT_WINDOW_EXIT); - HMVMX_REPORT_FEAT(val, zap, "USE_TSC_OFFSETTING", VMX_PROC_CTLS_USE_TSC_OFFSETTING); - HMVMX_REPORT_FEAT(val, zap, "HLT_EXIT", VMX_PROC_CTLS_HLT_EXIT); - HMVMX_REPORT_FEAT(val, zap, "INVLPG_EXIT", VMX_PROC_CTLS_INVLPG_EXIT); - HMVMX_REPORT_FEAT(val, zap, "MWAIT_EXIT", VMX_PROC_CTLS_MWAIT_EXIT); - HMVMX_REPORT_FEAT(val, zap, "RDPMC_EXIT", VMX_PROC_CTLS_RDPMC_EXIT); - HMVMX_REPORT_FEAT(val, zap, "RDTSC_EXIT", VMX_PROC_CTLS_RDTSC_EXIT); - HMVMX_REPORT_FEAT(val, zap, "CR3_LOAD_EXIT", VMX_PROC_CTLS_CR3_LOAD_EXIT); - HMVMX_REPORT_FEAT(val, zap, "CR3_STORE_EXIT", VMX_PROC_CTLS_CR3_STORE_EXIT); - HMVMX_REPORT_FEAT(val, zap, "CR8_LOAD_EXIT", VMX_PROC_CTLS_CR8_LOAD_EXIT); - HMVMX_REPORT_FEAT(val, zap, "CR8_STORE_EXIT", VMX_PROC_CTLS_CR8_STORE_EXIT); - HMVMX_REPORT_FEAT(val, zap, "USE_TPR_SHADOW", VMX_PROC_CTLS_USE_TPR_SHADOW); - HMVMX_REPORT_FEAT(val, zap, "NMI_WINDOW_EXIT", VMX_PROC_CTLS_NMI_WINDOW_EXIT); - HMVMX_REPORT_FEAT(val, zap, "MOV_DR_EXIT", VMX_PROC_CTLS_MOV_DR_EXIT); - HMVMX_REPORT_FEAT(val, zap, "UNCOND_IO_EXIT", VMX_PROC_CTLS_UNCOND_IO_EXIT); - HMVMX_REPORT_FEAT(val, zap, "USE_IO_BITMAPS", VMX_PROC_CTLS_USE_IO_BITMAPS); - HMVMX_REPORT_FEAT(val, zap, "MONITOR_TRAP_FLAG", VMX_PROC_CTLS_MONITOR_TRAP_FLAG); - HMVMX_REPORT_FEAT(val, zap, "USE_MSR_BITMAPS", VMX_PROC_CTLS_USE_MSR_BITMAPS); - HMVMX_REPORT_FEAT(val, zap, "MONITOR_EXIT", VMX_PROC_CTLS_MONITOR_EXIT); - HMVMX_REPORT_FEAT(val, zap, "PAUSE_EXIT", VMX_PROC_CTLS_PAUSE_EXIT); - HMVMX_REPORT_FEAT(val, zap, "USE_SECONDARY_CTLS", VMX_PROC_CTLS_USE_SECONDARY_CTLS); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "INT_WINDOW_EXIT", VMX_PROC_CTLS_INT_WINDOW_EXIT); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "USE_TSC_OFFSETTING", VMX_PROC_CTLS_USE_TSC_OFFSETTING); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "HLT_EXIT", VMX_PROC_CTLS_HLT_EXIT); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "INVLPG_EXIT", VMX_PROC_CTLS_INVLPG_EXIT); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "MWAIT_EXIT", VMX_PROC_CTLS_MWAIT_EXIT); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "RDPMC_EXIT", VMX_PROC_CTLS_RDPMC_EXIT); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "RDTSC_EXIT", VMX_PROC_CTLS_RDTSC_EXIT); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "CR3_LOAD_EXIT", VMX_PROC_CTLS_CR3_LOAD_EXIT); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "CR3_STORE_EXIT", VMX_PROC_CTLS_CR3_STORE_EXIT); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "CR8_LOAD_EXIT", VMX_PROC_CTLS_CR8_LOAD_EXIT); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "CR8_STORE_EXIT", VMX_PROC_CTLS_CR8_STORE_EXIT); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "USE_TPR_SHADOW", VMX_PROC_CTLS_USE_TPR_SHADOW); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "NMI_WINDOW_EXIT", VMX_PROC_CTLS_NMI_WINDOW_EXIT); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "MOV_DR_EXIT", VMX_PROC_CTLS_MOV_DR_EXIT); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "UNCOND_IO_EXIT", VMX_PROC_CTLS_UNCOND_IO_EXIT); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "USE_IO_BITMAPS", VMX_PROC_CTLS_USE_IO_BITMAPS); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "MONITOR_TRAP_FLAG", VMX_PROC_CTLS_MONITOR_TRAP_FLAG); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "USE_MSR_BITMAPS", VMX_PROC_CTLS_USE_MSR_BITMAPS); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "MONITOR_EXIT", VMX_PROC_CTLS_MONITOR_EXIT); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "PAUSE_EXIT", VMX_PROC_CTLS_PAUSE_EXIT); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "USE_SECONDARY_CTLS", VMX_PROC_CTLS_USE_SECONDARY_CTLS); } @@ -1495,29 +1495,29 @@ static void hmR3VmxReportProcBasedCtls2Msr(PCVMXCTLSMSR pVmxMsr) { - uint64_t const val = pVmxMsr->n.allowed1; - uint64_t const zap = pVmxMsr->n.disallowed0; + uint64_t const fAllowed1 = pVmxMsr->n.allowed1; + uint64_t const fAllowed0 = pVmxMsr->n.allowed0; LogRel(("HM: MSR_IA32_VMX_PROCBASED_CTLS2 = %#RX64\n", pVmxMsr->u)); - HMVMX_REPORT_FEAT(val, zap, "VIRT_APIC_ACCESS", VMX_PROC_CTLS2_VIRT_APIC_ACCESS); - HMVMX_REPORT_FEAT(val, zap, "EPT", VMX_PROC_CTLS2_EPT); - HMVMX_REPORT_FEAT(val, zap, "DESC_TABLE_EXIT", VMX_PROC_CTLS2_DESC_TABLE_EXIT); - HMVMX_REPORT_FEAT(val, zap, "RDTSCP", VMX_PROC_CTLS2_RDTSCP); - HMVMX_REPORT_FEAT(val, zap, "VIRT_X2APIC_MODE", VMX_PROC_CTLS2_VIRT_X2APIC_MODE); - HMVMX_REPORT_FEAT(val, zap, "VPID", VMX_PROC_CTLS2_VPID); - HMVMX_REPORT_FEAT(val, zap, "WBINVD_EXIT", VMX_PROC_CTLS2_WBINVD_EXIT); - HMVMX_REPORT_FEAT(val, zap, "UNRESTRICTED_GUEST", VMX_PROC_CTLS2_UNRESTRICTED_GUEST); - HMVMX_REPORT_FEAT(val, zap, "APIC_REG_VIRT", VMX_PROC_CTLS2_APIC_REG_VIRT); - HMVMX_REPORT_FEAT(val, zap, "VIRT_INT_DELIVERY", VMX_PROC_CTLS2_VIRT_INT_DELIVERY); - HMVMX_REPORT_FEAT(val, zap, "PAUSE_LOOP_EXIT", VMX_PROC_CTLS2_PAUSE_LOOP_EXIT); - HMVMX_REPORT_FEAT(val, zap, "RDRAND_EXIT", VMX_PROC_CTLS2_RDRAND_EXIT); - HMVMX_REPORT_FEAT(val, zap, "INVPCID", VMX_PROC_CTLS2_INVPCID); - HMVMX_REPORT_FEAT(val, zap, "VMFUNC", VMX_PROC_CTLS2_VMFUNC); - HMVMX_REPORT_FEAT(val, zap, "VMCS_SHADOWING", VMX_PROC_CTLS2_VMCS_SHADOWING); - HMVMX_REPORT_FEAT(val, zap, "ENCLS_EXIT", VMX_PROC_CTLS2_ENCLS_EXIT); - HMVMX_REPORT_FEAT(val, zap, "RDSEED_EXIT", VMX_PROC_CTLS2_RDSEED_EXIT); - HMVMX_REPORT_FEAT(val, zap, "PML", VMX_PROC_CTLS2_PML); - HMVMX_REPORT_FEAT(val, zap, "EPT_VE", VMX_PROC_CTLS2_EPT_VE); - HMVMX_REPORT_FEAT(val, zap, "CONCEAL_FROM_PT", VMX_PROC_CTLS2_CONCEAL_FROM_PT); - HMVMX_REPORT_FEAT(val, zap, "XSAVES_XRSTORS", VMX_PROC_CTLS2_XSAVES_XRSTORS); - HMVMX_REPORT_FEAT(val, zap, "TSC_SCALING", VMX_PROC_CTLS2_TSC_SCALING); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "VIRT_APIC_ACCESS", VMX_PROC_CTLS2_VIRT_APIC_ACCESS); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "EPT", VMX_PROC_CTLS2_EPT); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "DESC_TABLE_EXIT", VMX_PROC_CTLS2_DESC_TABLE_EXIT); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "RDTSCP", VMX_PROC_CTLS2_RDTSCP); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "VIRT_X2APIC_MODE", VMX_PROC_CTLS2_VIRT_X2APIC_MODE); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "VPID", VMX_PROC_CTLS2_VPID); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "WBINVD_EXIT", VMX_PROC_CTLS2_WBINVD_EXIT); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "UNRESTRICTED_GUEST", VMX_PROC_CTLS2_UNRESTRICTED_GUEST); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "APIC_REG_VIRT", VMX_PROC_CTLS2_APIC_REG_VIRT); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "VIRT_INT_DELIVERY", VMX_PROC_CTLS2_VIRT_INT_DELIVERY); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "PAUSE_LOOP_EXIT", VMX_PROC_CTLS2_PAUSE_LOOP_EXIT); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "RDRAND_EXIT", VMX_PROC_CTLS2_RDRAND_EXIT); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "INVPCID", VMX_PROC_CTLS2_INVPCID); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "VMFUNC", VMX_PROC_CTLS2_VMFUNC); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "VMCS_SHADOWING", VMX_PROC_CTLS2_VMCS_SHADOWING); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "ENCLS_EXIT", VMX_PROC_CTLS2_ENCLS_EXIT); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "RDSEED_EXIT", VMX_PROC_CTLS2_RDSEED_EXIT); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "PML", VMX_PROC_CTLS2_PML); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "EPT_VE", VMX_PROC_CTLS2_EPT_VE); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "CONCEAL_FROM_PT", VMX_PROC_CTLS2_CONCEAL_FROM_PT); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "XSAVES_XRSTORS", VMX_PROC_CTLS2_XSAVES_XRSTORS); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "TSC_SCALING", VMX_PROC_CTLS2_TSC_SCALING); } @@ -1530,14 +1530,14 @@ static void hmR3VmxReportEntryCtlsMsr(PCVMXCTLSMSR pVmxMsr) { - uint64_t const val = pVmxMsr->n.allowed1; - uint64_t const zap = pVmxMsr->n.disallowed0; + uint64_t const fAllowed1 = pVmxMsr->n.allowed1; + uint64_t const fAllowed0 = pVmxMsr->n.allowed0; LogRel(("HM: MSR_IA32_VMX_ENTRY_CTLS = %#RX64\n", pVmxMsr->u)); - HMVMX_REPORT_FEAT(val, zap, "LOAD_DEBUG", VMX_ENTRY_CTLS_LOAD_DEBUG); - HMVMX_REPORT_FEAT(val, zap, "IA32E_MODE_GUEST", VMX_ENTRY_CTLS_IA32E_MODE_GUEST); - HMVMX_REPORT_FEAT(val, zap, "ENTRY_TO_SMM", VMX_ENTRY_CTLS_ENTRY_TO_SMM); - HMVMX_REPORT_FEAT(val, zap, "DEACTIVATE_DUAL_MON", VMX_ENTRY_CTLS_DEACTIVATE_DUAL_MON); - HMVMX_REPORT_FEAT(val, zap, "LOAD_PERF_MSR", VMX_ENTRY_CTLS_LOAD_PERF_MSR); - HMVMX_REPORT_FEAT(val, zap, "LOAD_PAT_MSR", VMX_ENTRY_CTLS_LOAD_PAT_MSR); - HMVMX_REPORT_FEAT(val, zap, "LOAD_EFER_MSR", VMX_ENTRY_CTLS_LOAD_EFER_MSR); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "LOAD_DEBUG", VMX_ENTRY_CTLS_LOAD_DEBUG); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "IA32E_MODE_GUEST", VMX_ENTRY_CTLS_IA32E_MODE_GUEST); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "ENTRY_TO_SMM", VMX_ENTRY_CTLS_ENTRY_TO_SMM); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "DEACTIVATE_DUAL_MON", VMX_ENTRY_CTLS_DEACTIVATE_DUAL_MON); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "LOAD_PERF_MSR", VMX_ENTRY_CTLS_LOAD_PERF_MSR); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "LOAD_PAT_MSR", VMX_ENTRY_CTLS_LOAD_PAT_MSR); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "LOAD_EFER_MSR", VMX_ENTRY_CTLS_LOAD_EFER_MSR); } @@ -1550,16 +1550,16 @@ static void hmR3VmxReportExitCtlsMsr(PCVMXCTLSMSR pVmxMsr) { - uint64_t const val = pVmxMsr->n.allowed1; - uint64_t const zap = pVmxMsr->n.disallowed0; + uint64_t const fAllowed1 = pVmxMsr->n.allowed1; + uint64_t const fAllowed0 = pVmxMsr->n.allowed0; LogRel(("HM: MSR_IA32_VMX_EXIT_CTLS = %#RX64\n", pVmxMsr->u)); - HMVMX_REPORT_FEAT(val, zap, "SAVE_DEBUG", VMX_EXIT_CTLS_SAVE_DEBUG); - HMVMX_REPORT_FEAT(val, zap, "HOST_ADDR_SPACE_SIZE", VMX_EXIT_CTLS_HOST_ADDR_SPACE_SIZE); - HMVMX_REPORT_FEAT(val, zap, "LOAD_PERF_MSR", VMX_EXIT_CTLS_LOAD_PERF_MSR); - HMVMX_REPORT_FEAT(val, zap, "ACK_EXT_INT", VMX_EXIT_CTLS_ACK_EXT_INT); - HMVMX_REPORT_FEAT(val, zap, "SAVE_PAT_MSR", VMX_EXIT_CTLS_SAVE_PAT_MSR); - HMVMX_REPORT_FEAT(val, zap, "LOAD_PAT_MSR", VMX_EXIT_CTLS_LOAD_PAT_MSR); - HMVMX_REPORT_FEAT(val, zap, "SAVE_EFER_MSR", VMX_EXIT_CTLS_SAVE_EFER_MSR); - HMVMX_REPORT_FEAT(val, zap, "LOAD_EFER_MSR", VMX_EXIT_CTLS_LOAD_EFER_MSR); - HMVMX_REPORT_FEAT(val, zap, "SAVE_PREEMPT_TIMER", VMX_EXIT_CTLS_SAVE_PREEMPT_TIMER); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "SAVE_DEBUG", VMX_EXIT_CTLS_SAVE_DEBUG); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "HOST_ADDR_SPACE_SIZE", VMX_EXIT_CTLS_HOST_ADDR_SPACE_SIZE); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "LOAD_PERF_MSR", VMX_EXIT_CTLS_LOAD_PERF_MSR); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "ACK_EXT_INT", VMX_EXIT_CTLS_ACK_EXT_INT); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "SAVE_PAT_MSR", VMX_EXIT_CTLS_SAVE_PAT_MSR); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "LOAD_PAT_MSR", VMX_EXIT_CTLS_LOAD_PAT_MSR); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "SAVE_EFER_MSR", VMX_EXIT_CTLS_SAVE_EFER_MSR); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "LOAD_EFER_MSR", VMX_EXIT_CTLS_LOAD_EFER_MSR); + HMVMX_REPORT_FEAT(fAllowed1, fAllowed0, "SAVE_PREEMPT_TIMER", VMX_EXIT_CTLS_SAVE_PREEMPT_TIMER); } @@ -3208,6 +3208,6 @@ if (iStatusCode == VERR_VMX_UNABLE_TO_START_VM) { - LogRel(("HM: VERR_VMX_UNABLE_TO_START_VM: VM-entry allowed %#RX32\n", pVM->hm.s.vmx.Msrs.EntryCtls.n.allowed1)); - LogRel(("HM: VERR_VMX_UNABLE_TO_START_VM: VM-entry disallowed %#RX32\n", pVM->hm.s.vmx.Msrs.EntryCtls.n.disallowed0)); + LogRel(("HM: VERR_VMX_UNABLE_TO_START_VM: VM-entry allowed-1 %#RX32\n", pVM->hm.s.vmx.Msrs.EntryCtls.n.allowed1)); + LogRel(("HM: VERR_VMX_UNABLE_TO_START_VM: VM-entry allowed-0 %#RX32\n", pVM->hm.s.vmx.Msrs.EntryCtls.n.allowed0)); } else if (iStatusCode == VERR_VMX_INVALID_VMXON_PTR)