Index: /trunk/include/VBox/vmm/vm.h
===================================================================
--- /trunk/include/VBox/vmm/vm.h	(revision 74796)
+++ /trunk/include/VBox/vmm/vm.h	(revision 74797)
@@ -99,33 +99,56 @@
 typedef struct VMCPU
 {
+    /** @name Volatile per-cpu data.
+     * @{ */
     /** Per CPU forced action.
      * See the VMCPU_FF_* \#defines. Updated atomically. */
-    uint32_t volatile       fLocalForcedActions;                    /* 0 */
+    uint32_t volatile       fLocalForcedActions;
+    uint32_t                fForLocalForcedActionsExpansion;
     /** The CPU state. */
-    VMCPUSTATE volatile     enmState;                               /* 4 */
-
-    /** Pointer to the ring-3 UVMCPU structure. */
-    PUVMCPU                 pUVCpu;                                 /* 8 */
-    /** Ring-3 Host Context VM Pointer. */
-    PVMR3                   pVMR3;                                  /* 16 / 12 */
-    /** Ring-0 Host Context VM Pointer. */
-    PVMR0                   pVMR0;                                  /* 24 / 16 */
-    /** Raw-mode Context VM Pointer. */
-    PVMRC                   pVMRC;                                  /* 32 / 20 */
+    VMCPUSTATE volatile     enmState;
+
+    /** Which host CPU ID is this EMT running on.
+     * Only valid when in RC or HMR0 with scheduling disabled. */
+    RTCPUID volatile        idHostCpu;
+    /** The CPU set index corresponding to idHostCpu, UINT32_MAX if not valid.
+     * @remarks Best to make sure iHostCpuSet shares cache line with idHostCpu! */
+    uint32_t volatile       iHostCpuSet;
+    /** Padding up to 64 bytes. */
+    uint8_t                 abAlignment0[64 - 20];
+    /** @} */
+
+    /** IEM part.
+     * @remarks This comes first as it allows the use of 8-bit immediates for the
+     *          first 64 bytes of the structure, reducing code size a wee bit. */
+#ifdef ___IEMInternal_h /* For PDB hacking. */
+    union VMCPUUNIONIEMFULL
+#else
+    union VMCPUUNIONIEMSTUB
+#endif
+    {
+#ifdef ___IEMInternal_h
+        struct IEMCPU       s;
+#endif
+        uint8_t             padding[18496];     /* multiple of 64 */
+    } iem;
+
+    /** @name Static per-cpu data.
+     * (Putting this after IEM, hoping that it's less frequently used than it.)
+     * @{ */
     /** The CPU ID.
      * This is the index into the VM::aCpu array. */
-    VMCPUID                 idCpu;                                  /* 36 / 24 */
+    VMCPUID                 idCpu;
+    /** Raw-mode Context VM Pointer. */
+    PVMRC                   pVMRC;
+    /** Ring-3 Host Context VM Pointer. */
+    PVMR3                   pVMR3;
+    /** Ring-0 Host Context VM Pointer. */
+    PVMR0                   pVMR0;
+    /** Pointer to the ring-3 UVMCPU structure. */
+    PUVMCPU                 pUVCpu;
     /** The native thread handle. */
-    RTNATIVETHREAD          hNativeThread;                          /* 40 / 28 */
+    RTNATIVETHREAD          hNativeThread;
     /** The native R0 thread handle. (different from the R3 handle!) */
-    RTNATIVETHREAD          hNativeThreadR0;                        /* 48 / 32 */
-    /** Which host CPU ID is this EMT running on.
-     * Only valid when in RC or HMR0 with scheduling disabled. */
-    RTCPUID volatile        idHostCpu;                              /* 56 / 36 */
-    /** The CPU set index corresponding to idHostCpu, UINT32_MAX if not valid.
-     * @remarks Best to make sure iHostCpuSet shares cache line with idHostCpu! */
-    uint32_t volatile       iHostCpuSet;                            /* 60 / 40 */
-
-#if HC_ARCH_BITS == 32
+    RTNATIVETHREAD          hNativeThreadR0;
     /** Align the structures below bit on a 64-byte boundary and make sure it starts
      * at the same offset in both 64-bit and 32-bit builds.
@@ -136,21 +159,6 @@
      *          following it (to grow into and align the struct size).
      */
-    uint8_t                 abAlignment1[HC_ARCH_BITS == 64 ? 0 : 20];
-#endif
-
-    /** IEM part.
-     * @remarks This comes first as it allows the use of 8-bit immediates for the
-     *          first 64 bytes of the structure, reducing code size a wee bit. */
-#ifdef ___IEMInternal_h /* For PDB hacking. */
-    union VMCPUUNIONIEMFULL
-#else
-    union VMCPUUNIONIEMSTUB
-#endif
-    {
-#ifdef ___IEMInternal_h
-        struct IEMCPU       s;
-#endif
-        uint8_t             padding[18496];     /* multiple of 64 */
-    } iem;
+    uint8_t                 abAlignment1[64 - 4 - 4 - 5 * (HC_ARCH_BITS == 64 ? 8 : 4)];
+    /** @} */
 
     /** HM part. */
@@ -258,5 +266,5 @@
 
     /** Align the following members on page boundary. */
-    uint8_t                 abAlignment2[2872];
+    uint8_t                 abAlignment2[2808];
 
     /** PGM part. */
Index: /trunk/include/VBox/vmm/vm.mac
===================================================================
--- /trunk/include/VBox/vmm/vm.mac	(revision 74796)
+++ /trunk/include/VBox/vmm/vm.mac	(revision 74797)
@@ -43,23 +43,22 @@
 struc VMCPU
     .fLocalForcedActions    resd 1
+    alignb 8
     .enmState               resd 1
-    .pUVCpu                 RTR3PTR_RES 1
-    .pVMR3                  RTR3PTR_RES 1
-    .pVMR0                  RTR0PTR_RES 1
-    .pVMRC                  RTRCPTR_RES 1
-    .idCpu                  resd 1
-
-    .hNativeThread          RTR0PTR_RES 1
-    .hNativeThreadR0        RTR0PTR_RES 1
     .idHostCpu              resd 1
     .iHostCpuSet            resd 1
-%if HC_ARCH_BITS == 32
-    .abAlignment1           resb 12
-%else
-;    .abAlignment1           resb 0
-%endif
 
     alignb 64
     .iem                    resb 18496
+
+    alignb 64
+    .idCpu                  resd 1
+    .pVMRC                  RTRCPTR_RES 1
+    .pVMR3                  RTR3PTR_RES 1
+    .pVMR0                  RTR0PTR_RES 1
+    .pUVCpu                 RTR3PTR_RES 1
+    .hNativeThread          RTR0PTR_RES 1
+    .hNativeThreadR0        RTR0PTR_RES 1
+
+    alignb 64
     .hm                     resb 5888
     .nem                    resb 512