Index: /trunk/include/VBox/vmm/vm.h
===================================================================
--- /trunk/include/VBox/vmm/vm.h	(revision 74784)
+++ /trunk/include/VBox/vmm/vm.h	(revision 74785)
@@ -673,4 +673,5 @@
 #define VM_FF_IS_SET(pVM, fFlag)            (((pVM)->fGlobalForcedActions & (fFlag)) == (fFlag))
 
+
 /** @def VMCPU_FF_IS_SET
  * Checks if a force action flag is set for the given VCPU.
@@ -679,5 +680,14 @@
  * @param   fFlag   The flag to check.
  */
-#define VMCPU_FF_IS_SET(pVCpu, fFlag)       (((pVCpu)->fLocalForcedActions & (fFlag)) == (fFlag))
+#if !defined(VBOX_STRICT) || !defined(RT_COMPILER_SUPPORTS_LAMBDA)
+# define VMCPU_FF_IS_SET(pVCpu, fFlag)      (((pVCpu)->fLocalForcedActions & (fFlag)) == (fFlag))
+#else
+# define VMCPU_FF_IS_SET(pVCpu, fFlag) \
+                   ([](PVMCPU a_pVCpu) -> bool \
+                   { \
+                       AssertCompile(RT_IS_POWER_OF_TWO(fFlag)); \
+                       return (a_pVCpu->fLocalForcedActions & (fFlag)) == (fFlag); \
+                   }(pVCpu))
+#endif
 
 /** @def VM_FF_IS_PENDING
@@ -688,4 +698,12 @@
  */
 #define VM_FF_IS_PENDING(pVM, fFlags)       RT_BOOL((pVM)->fGlobalForcedActions & (fFlags))
+
+/** @def VMCPU_FF_IS_PENDING
+ * Checks if one or more force action in the specified set is pending for the given VCPU.
+ *
+ * @param   pVCpu   The cross context virtual CPU structure.
+ * @param   fFlags  The flags to check for.
+ */
+#define VMCPU_FF_IS_PENDING(pVCpu, fFlags)  RT_BOOL((pVCpu)->fLocalForcedActions & (fFlags))
 
 /** @def VM_FF_TEST_AND_CLEAR
@@ -709,12 +727,4 @@
 #define VMCPU_FF_TEST_AND_CLEAR(pVCpu, iBit) (ASMAtomicBitTestAndClear(&(pVCpu)->fLocalForcedActions, iBit##_BIT))
 
-/** @def VMCPU_FF_IS_PENDING
- * Checks if one or more force action in the specified set is pending for the given VCPU.
- *
- * @param   pVCpu   The cross context virtual CPU structure.
- * @param   fFlags  The flags to check for.
- */
-#define VMCPU_FF_IS_PENDING(pVCpu, fFlags)  RT_BOOL((pVCpu)->fLocalForcedActions & (fFlags))
-
 /** @def VM_FF_IS_PENDING_EXCEPT
  * Checks if one or more force action in the specified set is pending while one
@@ -725,5 +735,5 @@
  * @param   fExcpt  The flags that should not be set.
  */
-#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt)      ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
+#define VM_FF_IS_PENDING_EXCEPT(pVM, fFlags, fExcpt) ( ((pVM)->fGlobalForcedActions & (fFlags)) && !((pVM)->fGlobalForcedActions & (fExcpt)) )
 
 /** @def VM_IS_EMT
Index: /trunk/src/VBox/VMM/VMMAll/APICAll.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/APICAll.cpp	(revision 74784)
+++ /trunk/src/VBox/VMM/VMMAll/APICAll.cpp	(revision 74785)
@@ -3341,5 +3341,5 @@
 
     if (   fHasPendingIntrs
-        && !VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INTERRUPT_APIC))
+        && !VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_APIC))
         apicSignalNextPendingIntr(pVCpu);
 }
Index: /trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h	(revision 74784)
+++ /trunk/src/VBox/VMM/VMMAll/IEMAllCImpl.cpp.h	(revision 74785)
@@ -7189,5 +7189,5 @@
         {
             if (   IEM_VMX_IS_PROCCTLS_SET(pVCpu, VMX_PROC_CTLS_INT_WINDOW_EXIT)
-                || VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INTERRUPT_NESTED_GUEST))
+                || VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_NESTED_GUEST))
             {
                 iemRegAddToRipAndClearRF(pVCpu, cbInstr);
Index: /trunk/src/VBox/VMM/VMMAll/IEMAllCImplSvmInstr.cpp.h
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/IEMAllCImplSvmInstr.cpp.h	(revision 74784)
+++ /trunk/src/VBox/VMM/VMMAll/IEMAllCImplSvmInstr.cpp.h	(revision 74785)
@@ -202,5 +202,5 @@
              */
             PSVMVMCBCTRL pVmcbMemCtrl = &pVmcbMem->ctrl;
-            if (!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INTERRUPT_NESTED_GUEST))       /* V_IRQ. */
+            if (!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_NESTED_GUEST))           /* V_IRQ. */
                 pVmcbMemCtrl->IntCtrl.n.u1VIrqPending = 0;
             else
@@ -212,5 +212,5 @@
             pVmcbMemCtrl->IntCtrl.n.u8VTPR = pVmcbCtrl->IntCtrl.n.u8VTPR;           /* V_TPR. */
 
-            if (   VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)          /* Interrupt shadow. */
+            if (   VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)              /* Interrupt shadow. */
                 && EMGetInhibitInterruptsPC(pVCpu) == pVCpu->cpum.GstCtx.rip)
             {
@@ -733,5 +733,5 @@
             VMCPU_FF_SET(pVCpu, VMCPU_FF_INTERRUPT_NESTED_GUEST);
         else
-            Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INTERRUPT_NESTED_GUEST));
+            Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_NESTED_GUEST));
 
         /*
Index: /trunk/src/VBox/VMM/VMMAll/IEMAllCImplVmxInstr.cpp.h
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/IEMAllCImplVmxInstr.cpp.h	(revision 74784)
+++ /trunk/src/VBox/VMM/VMMAll/IEMAllCImplVmxInstr.cpp.h	(revision 74785)
@@ -1925,5 +1925,5 @@
 
     /* MTF should not be set outside VMX non-root mode. */
-    Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_MTF));
+    Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_MTF));
 
     /*
@@ -2131,8 +2131,8 @@
     if (pVmcs->u32PinCtls & VMX_PIN_CTLS_VIRT_NMI)
     { /** @todo NSTVMX: Virtual-NMI blocking. */ }
-    else if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_BLOCK_NMIS))
+    else if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_BLOCK_NMIS))
         pVmcs->u32GuestIntrState |= VMX_VMCS_GUEST_INT_STATE_BLOCK_NMI;
 
-    if (   VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
+    if (   VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
         && pVCpu->cpum.GstCtx.rip == EMGetInhibitInterruptsPC(pVCpu))
     {
@@ -5782,10 +5782,10 @@
         }
         else
-            Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_BLOCK_NMIS));
+            Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_BLOCK_NMIS));
 
         if (pVmcs->u32GuestIntrState & (VMX_VMCS_GUEST_INT_STATE_BLOCK_STI | VMX_VMCS_GUEST_INT_STATE_BLOCK_MOVSS))
             EMSetInhibitInterruptsPC(pVCpu, pVCpu->cpum.GstCtx.rip);
         else
-            Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS));
+            Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS));
 
         /* SMI blocking is irrelevant. We don't support SMIs yet. */
@@ -5930,5 +5930,5 @@
     /** @todo Distinguish block-by-MOV-SS from block-by-STI. Currently we
      *        use block-by-STI here which is not quite correct. */
-    if (   VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
+    if (   VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
         && pVCpu->cpum.GstCtx.rip == EMGetInhibitInterruptsPC(pVCpu))
     {
Index: /trunk/src/VBox/VMM/VMMAll/NEMAllNativeTemplate-win.cpp.h
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/NEMAllNativeTemplate-win.cpp.h	(revision 74784)
+++ /trunk/src/VBox/VMM/VMMAll/NEMAllNativeTemplate-win.cpp.h	(revision 74785)
@@ -417,8 +417,8 @@
     {
         ADD_REG64(WHvRegisterInterruptState, 0);
-        if (   VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
+        if (   VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
             && EMGetInhibitInterruptsPC(pVCpu) == pVCpu->cpum.GstCtx.rip)
             aValues[iReg - 1].InterruptState.InterruptShadow = 1;
-        if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_BLOCK_NMIS))
+        if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_BLOCK_NMIS))
             aValues[iReg - 1].InterruptState.NmiMasked = 1;
     }
@@ -426,9 +426,9 @@
     {
         if (   pVCpu->nem.s.fLastInterruptShadow
-            || (   VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
+            || (   VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
                 && EMGetInhibitInterruptsPC(pVCpu) == pVCpu->cpum.GstCtx.rip))
         {
             ADD_REG64(WHvRegisterInterruptState, 0);
-            if (   VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
+            if (   VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
                 && EMGetInhibitInterruptsPC(pVCpu) == pVCpu->cpum.GstCtx.rip)
                 aValues[iReg - 1].InterruptState.InterruptShadow = 1;
@@ -1575,5 +1575,5 @@
 
     /* Update interrupt inhibition. */
-    if (!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS))
+    if (!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS))
     { /* likely */ }
     else if (pVCpu->cpum.GstCtx.rip != EMGetInhibitInterruptsPC(pVCpu))
@@ -1600,5 +1600,5 @@
 
     /* Update interrupt inhibition. */
-    if (!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS))
+    if (!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS))
     { /* likely */ }
     else if (pVCpu->cpum.GstCtx.rip != EMGetInhibitInterruptsPC(pVCpu))
@@ -1916,5 +1916,5 @@
     if (!pHdr->ExecutionState.InterruptShadow)
     {
-        if (!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS))
+        if (!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS))
         { /* likely */ }
         else
@@ -1947,5 +1947,5 @@
     if (!pExitCtx->ExecutionState.InterruptShadow)
     {
-        if (!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS))
+        if (!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS))
         { /* likely */ }
         else
@@ -3970,5 +3970,5 @@
      * We don't currently implement SMIs.
      */
-    AssertReturn(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INTERRUPT_SMI), VERR_NEM_IPE_0);
+    AssertReturn(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_SMI), VERR_NEM_IPE_0);
 
     /*
@@ -3977,5 +3977,5 @@
      * for injection via IEM.
      */
-    bool const fPendingNmi = VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INTERRUPT_NMI);
+    bool const fPendingNmi = VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_NMI);
     uint64_t   fNeedExtrn  = CPUMCTX_EXTRN_NEM_WIN_INHIBIT_INT | CPUMCTX_EXTRN_RIP | CPUMCTX_EXTRN_RFLAGS
                            | (fPendingNmi ? CPUMCTX_EXTRN_NEM_WIN_INHIBIT_NMI : 0);
@@ -3987,5 +3987,5 @@
             return rcStrict;
     }
-    bool const fInhibitInterrupts = VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
+    bool const fInhibitInterrupts = VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
                                  && EMGetInhibitInterruptsPC(pVCpu) == pVCpu->cpum.GstCtx.rip;
 
@@ -3996,5 +3996,5 @@
     {
         if (   !fInhibitInterrupts
-            && !VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_BLOCK_NMIS))
+            && !VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_BLOCK_NMIS))
         {
             VBOXSTRICTRC rcStrict = nemHCWinImportStateIfNeededStrict(pVCpu, pGVCpu,
Index: /trunk/src/VBox/VMM/VMMAll/SELMAll.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/SELMAll.cpp	(revision 74784)
+++ /trunk/src/VBox/VMM/VMMAll/SELMAll.cpp	(revision 74785)
@@ -78,5 +78,5 @@
     memcpy(pvBuf, pvPtr, cbBuf);
     VBOXSTRICTRC rcStrict = selmRCGuestGdtPostWriteCheck(pVM, pVCpu, offGuestGdt, cbBuf, pCtx);
-    if (!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_SELM_SYNC_GDT))
+    if (!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_SELM_SYNC_GDT))
         STAM_COUNTER_INC(&pVM->selm.s.StatRCWriteGuestGDTHandled);
     else
Index: /trunk/src/VBox/VMM/VMMAll/TMAll.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/TMAll.cpp	(revision 74784)
+++ /trunk/src/VBox/VMM/VMMAll/TMAll.cpp	(revision 74785)
@@ -801,5 +801,5 @@
         if (!VMCPU_FF_IS_SET(pVCpuDst, VMCPU_FF_TIMER))
         {
-            Log5(("TMAll(%u): FF: %d -> 1\n", __LINE__, VMCPU_FF_IS_PENDING(pVCpuDst, VMCPU_FF_TIMER)));
+            Log5(("TMAll(%u): FF: %d -> 1\n", __LINE__, VMCPU_FF_IS_SET(pVCpuDst, VMCPU_FF_TIMER)));
             VMCPU_FF_SET(pVCpuDst, VMCPU_FF_TIMER);
 #if defined(IN_RING3) && defined(VBOX_WITH_REM)
@@ -847,5 +847,5 @@
                     &&  !VMCPU_FF_IS_SET(pVCpuDst, VMCPU_FF_TIMER))
                 {
-                    Log5(("TMAll(%u): FF: %d -> 1\n", __LINE__, VMCPU_FF_IS_PENDING(pVCpuDst, VMCPU_FF_TIMER)));
+                    Log5(("TMAll(%u): FF: %d -> 1\n", __LINE__, VMCPU_FF_IS_SET(pVCpuDst, VMCPU_FF_TIMER)));
                     VMCPU_FF_SET(pVCpuDst, VMCPU_FF_TIMER);
 #if defined(IN_RING3) && defined(VBOX_WITH_REM)
@@ -946,5 +946,5 @@
             &&  !VMCPU_FF_IS_SET(pVCpuDst, VMCPU_FF_TIMER))
         {
-            Log5(("TMAll(%u): FF: %d -> 1\n", __LINE__, VMCPU_FF_IS_PENDING(pVCpuDst, VMCPU_FF_TIMER)));
+            Log5(("TMAll(%u): FF: %d -> 1\n", __LINE__, VMCPU_FF_IS_SET(pVCpuDst, VMCPU_FF_TIMER)));
             VMCPU_FF_SET(pVCpuDst, VMCPU_FF_TIMER);
 #if defined(IN_RING3) && defined(VBOX_WITH_REM)
Index: /trunk/src/VBox/VMM/VMMAll/TMAllVirtual.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/TMAllVirtual.cpp	(revision 74784)
+++ /trunk/src/VBox/VMM/VMMAll/TMAllVirtual.cpp	(revision 74785)
@@ -239,5 +239,5 @@
             {
                 STAM_COUNTER_INC(&pVM->tm.s.StatVirtualGetSetFF);
-                Log5(("TMAllVirtual(%u): FF: %d -> 1\n", __LINE__, VMCPU_FF_IS_PENDING(pVCpuDst, VMCPU_FF_TIMER)));
+                Log5(("TMAllVirtual(%u): FF: %d -> 1\n", __LINE__, VMCPU_FF_IS_SET(pVCpuDst, VMCPU_FF_TIMER)));
                 VMCPU_FF_SET(pVCpuDst, VMCPU_FF_TIMER);
 #ifdef IN_RING3
@@ -396,5 +396,5 @@
         PVMCPU pVCpuDst = &pVM->aCpus[pVM->tm.s.idTimerCpu];
         VMCPU_FF_SET(pVCpuDst, VMCPU_FF_TIMER);
-        Log5(("TMAllVirtual(%u): FF: %d -> 1\n", __LINE__, VMCPU_FF_IS_PENDING(pVCpuDst, VMCPU_FF_TIMER)));
+        Log5(("TMAllVirtual(%u): FF: %d -> 1\n", __LINE__, VMCPU_FF_IS_SET(pVCpuDst, VMCPU_FF_TIMER)));
         Log4(("TM: %'RU64/-%'8RU64: exp tmr=>ff [vsghcul]\n", u64, pVM->tm.s.offVirtualSync - pVM->tm.s.offVirtualSyncGivenUp));
         PDMCritSectLeave(&pVM->tm.s.VirtualSyncLock);
@@ -484,5 +484,5 @@
         PVMCPU pVCpuDst = &pVM->aCpus[pVM->tm.s.idTimerCpu];
         VMCPU_FF_SET(pVCpuDst, VMCPU_FF_TIMER);
-        Log5(("TMAllVirtual(%u): FF: %d -> 1\n", __LINE__, !!VMCPU_FF_IS_PENDING(pVCpuDst, VMCPU_FF_TIMER)));
+        Log5(("TMAllVirtual(%u): FF: %d -> 1\n", __LINE__, VMCPU_FF_IS_SET(pVCpuDst, VMCPU_FF_TIMER)));
         Log4(("TM: %'RU64/-%'8RU64: exp tmr=>ff [vsgl]\n", u64, pVM->tm.s.offVirtualSync - pVM->tm.s.offVirtualSyncGivenUp));
         PDMCritSectLeave(&pVM->tm.s.VirtualSyncLock);
@@ -711,5 +711,5 @@
         if (!VMCPU_FF_IS_SET(pVCpuDst, VMCPU_FF_TIMER))
         {
-            Log5(("TMAllVirtual(%u): FF: %d -> 1 (NoLock)\n", __LINE__, VMCPU_FF_IS_PENDING(pVCpuDst, VMCPU_FF_TIMER)));
+            Log5(("TMAllVirtual(%u): FF: %d -> 1 (NoLock)\n", __LINE__, VMCPU_FF_IS_SET(pVCpuDst, VMCPU_FF_TIMER)));
             VM_FF_SET(pVM, VM_FF_TM_VIRTUAL_SYNC); /* Hmm? */
             VMCPU_FF_SET(pVCpuDst, VMCPU_FF_TIMER);
Index: /trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp	(revision 74784)
+++ /trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp	(revision 74785)
@@ -1158,5 +1158,5 @@
     Assert(pVCpu->CTX_SUFF(pVM)->hm.s.svm.fSupported);
 
-    bool const fFlushPending = pVCpu->CTX_SUFF(pVM)->hm.s.svm.fAlwaysFlushTLB || VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_TLB_FLUSH);
+    bool const fFlushPending = pVCpu->CTX_SUFF(pVM)->hm.s.svm.fAlwaysFlushTLB || VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TLB_FLUSH);
 
     /* Skip it if a TLB flush is already pending. */
@@ -2806,5 +2806,5 @@
         {
             if (  !pVmcbCtrl->IntCtrl.n.u1VIrqPending
-                && VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INTERRUPT_NESTED_GUEST))
+                && VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_NESTED_GUEST))
                 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INTERRUPT_NESTED_GUEST);
         }
@@ -2815,5 +2815,5 @@
             if (pVmcbCtrl->IntShadow.n.u1IntShadow)
                 EMSetInhibitInterruptsPC(pVCpu, pVmcbGuest->u64RIP);
-            else if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS))
+            else if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS))
                 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS);
         }
@@ -3022,5 +3022,5 @@
      */
     if (   VMMRZCallRing3IsEnabled(pVCpu)
-        && VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HM_UPDATE_CR3))
+        && VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_HM_UPDATE_CR3))
     {
         Assert(pCtx->cr3 == pVmcbGuest->u64CR3);
@@ -3669,5 +3669,5 @@
      *        delivery/window over a physical interrupt (from the outer guest)
      *        might be pending? */
-    bool const fEnableIntWindow = !VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INTERRUPT_NESTED_GUEST);
+    bool const fEnableIntWindow = !VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_NESTED_GUEST);
     if (!fEnableIntWindow)
     {
@@ -3735,9 +3735,9 @@
     bool const fVirtualGif = CPUMGetSvmNstGstVGif(pCtx);
     bool const fIntShadow  = hmR0SvmIsIntrShadowActive(pVCpu);
-    bool const fBlockNmi   = VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_BLOCK_NMIS);
+    bool const fBlockNmi   = VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_BLOCK_NMIS);
 
     Log4Func(("fVirtualGif=%RTbool fBlockNmi=%RTbool fIntShadow=%RTbool fIntPending=%RTbool fNmiPending=%RTbool\n",
               fVirtualGif, fBlockNmi, fIntShadow, VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC),
-              VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INTERRUPT_NMI)));
+              VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_NMI)));
 
     /** @todo SMI. SMIs take priority over NMIs. */
@@ -3748,5 +3748,5 @@
      * NMIs take priority over maskable interrupts, see AMD spec. 8.5 "Priorities".
      */
-    if (    VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INTERRUPT_NMI)
+    if (    VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_NMI)
         && !fBlockNmi)
     {
@@ -3860,10 +3860,10 @@
     bool const fIntShadow = hmR0SvmIsIntrShadowActive(pVCpu);
     bool const fBlockInt  = !(pCtx->eflags.u32 & X86_EFL_IF);
-    bool const fBlockNmi  = VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_BLOCK_NMIS);
+    bool const fBlockNmi  = VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_BLOCK_NMIS);
 
     Log4Func(("fGif=%RTbool fBlockNmi=%RTbool fBlockInt=%RTbool fIntShadow=%RTbool fIntPending=%RTbool NMI pending=%RTbool\n",
               fGif, fBlockNmi, fBlockInt, fIntShadow,
               VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INTERRUPT_APIC | VMCPU_FF_INTERRUPT_PIC),
-              VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INTERRUPT_NMI)));
+              VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_NMI)));
 
     /** @todo SMI. SMIs take priority over NMIs. */
@@ -3874,5 +3874,5 @@
      * NMIs take priority over maskable interrupts, see AMD spec. 8.5 "Priorities".
      */
-    if (    VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INTERRUPT_NMI)
+    if (    VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_NMI)
         && !fBlockNmi)
     {
@@ -4002,5 +4002,5 @@
         if (    Event.n.u3Type   == SVM_EVENT_NMI
             &&  Event.n.u8Vector == X86_XCPT_NMI
-            && !VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_BLOCK_NMIS))
+            && !VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_BLOCK_NMIS))
         {
             VMCPU_FF_SET(pVCpu, VMCPU_FF_BLOCK_NMIS);
@@ -4027,5 +4027,5 @@
      * but we still need to intercept IRET in order to eventually clear NMI inhibition.
      */
-    if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_BLOCK_NMIS))
+    if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_BLOCK_NMIS))
         hmR0SvmSetCtrlIntercept(pVmcb, SVM_CTRL_INTERCEPT_IRET);
 
@@ -4209,8 +4209,8 @@
 {
     Assert(VMMRZCallRing3IsEnabled(pVCpu));
-    Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HM_UPDATE_PAE_PDPES));
+    Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_HM_UPDATE_PAE_PDPES));
 
     /* Could happen as a result of longjump. */
-    if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HM_UPDATE_CR3))
+    if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_HM_UPDATE_CR3))
         PGMUpdateCR3(pVCpu, CPUMGetGuestCR3(pVCpu));
 
@@ -4229,5 +4229,5 @@
         {
             int rc = PGMSyncCR3(pVCpu, pVCpu->cpum.GstCtx.cr0, pVCpu->cpum.GstCtx.cr3, pVCpu->cpum.GstCtx.cr4,
-                                VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
+                                VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
             if (rc != VINF_SUCCESS)
             {
@@ -4249,6 +4249,6 @@
 
         /* Pending VM request packets, such as hardware interrupts. */
-        if (   VM_FF_IS_PENDING(pVM, VM_FF_REQUEST)
-            || VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_REQUEST))
+        if (   VM_FF_IS_SET(pVM, VM_FF_REQUEST)
+            || VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_REQUEST))
         {
             Log4Func(("Pending VM request forcing us back to ring-3\n"));
@@ -6043,5 +6043,5 @@
 
     /* Update interrupt shadow. */
-    if (   VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
+    if (   VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
         && pCtx->rip != EMGetInhibitInterruptsPC(pVCpu))
         VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS);
@@ -7456,5 +7456,5 @@
 
     /* Clear NMI blocking. */
-    if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_BLOCK_NMIS))
+    if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_BLOCK_NMIS))
         VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_BLOCK_NMIS);
 
Index: /trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp	(revision 74784)
+++ /trunk/src/VBox/VMM/VMMR0/HMVMXR0.cpp	(revision 74785)
@@ -1848,5 +1848,5 @@
     LogFlowFunc(("pVCpu=%p GCVirt=%RGv\n", pVCpu, GCVirt));
 
-    bool fFlushPending = VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_TLB_FLUSH);
+    bool fFlushPending = VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TLB_FLUSH);
     if (!fFlushPending)
     {
@@ -3452,5 +3452,5 @@
      */
     uint32_t fIntrState = 0;
-    if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS))
+    if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS))
     {
         /* If inhibition is active, RIP & RFLAGS should've been accessed
@@ -3468,5 +3468,5 @@
                 fIntrState = VMX_VMCS_GUEST_INT_STATE_BLOCK_MOVSS;
         }
-        else if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS))
+        else if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS))
         {
             /*
@@ -3486,5 +3486,5 @@
      * See Intel spec. 26.6.1 "Interruptibility state". See @bugref{7445}.
      */
-    if (   VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_BLOCK_NMIS)
+    if (   VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_BLOCK_NMIS)
         && (pVCpu->hm.s.vmx.u32PinCtls & VMX_PIN_CTLS_VIRT_NMI))
     {
@@ -6210,5 +6210,5 @@
          * See Intel spec. 30.7.1.2 "Resuming Guest Software after Handling an Exception". See @bugref{7445}.
          */
-        if (   VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_BLOCK_NMIS)
+        if (   VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_BLOCK_NMIS)
             && uIdtVectorType == VMX_IDT_VECTORING_INFO_TYPE_NMI
             && (   enmRaise   == IEMXCPTRAISE_PREV_EVENT
@@ -6312,5 +6312,5 @@
          * See Intel spec. 30.7.1.2 "Resuming guest software after handling an exception".
          */
-        if (!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_BLOCK_NMIS))
+        if (!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_BLOCK_NMIS))
         {
             Log4Func(("Setting VMCPU_FF_BLOCK_NMIS. fValid=%RTbool uExitReason=%u\n",
@@ -6496,5 +6496,5 @@
         if (!u32Val)
         {
-            if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS))
+            if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS))
             {
                 rc =  hmR0VmxImportGuestRip(pVCpu);
@@ -6503,5 +6503,5 @@
             }
 
-            if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_BLOCK_NMIS))
+            if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_BLOCK_NMIS))
                 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_BLOCK_NMIS);
         }
@@ -6516,13 +6516,13 @@
                 EMSetInhibitInterruptsPC(pVCpu, pCtx->rip);
             }
-            else if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS))
+            else if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS))
                 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS);
 
             if (u32Val & VMX_VMCS_GUEST_INT_STATE_BLOCK_NMI)
             {
-                if (!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_BLOCK_NMIS))
+                if (!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_BLOCK_NMIS))
                     VMCPU_FF_SET(pVCpu, VMCPU_FF_BLOCK_NMIS);
             }
-            else if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_BLOCK_NMIS))
+            else if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_BLOCK_NMIS))
                 VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_BLOCK_NMIS);
         }
@@ -6841,5 +6841,5 @@
     if (VMMRZCallRing3IsEnabled(pVCpu))
     {
-        if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HM_UPDATE_CR3))
+        if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_HM_UPDATE_CR3))
         {
             Assert(!(ASMAtomicUoReadU64(&pCtx->fExtrn) & CPUMCTX_EXTRN_CR3));
@@ -6847,9 +6847,9 @@
         }
 
-        if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HM_UPDATE_PAE_PDPES))
+        if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_HM_UPDATE_PAE_PDPES))
             PGMGstUpdatePaePdpes(pVCpu, &pVCpu->hm.s.aPdpes[0]);
 
-        Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HM_UPDATE_CR3));
-        Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HM_UPDATE_PAE_PDPES));
+        Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_HM_UPDATE_CR3));
+        Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_HM_UPDATE_PAE_PDPES));
     }
 
@@ -6912,5 +6912,5 @@
         Assert(!(ASMAtomicUoReadU64(&pCtx->fExtrn) & (CPUMCTX_EXTRN_CR0 | CPUMCTX_EXTRN_CR3 | CPUMCTX_EXTRN_CR4)));
         VBOXSTRICTRC rcStrict2 = PGMSyncCR3(pVCpu, pCtx->cr0, pCtx->cr3, pCtx->cr4,
-                                            VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
+                                            VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3));
         if (rcStrict2 != VINF_SUCCESS)
         {
@@ -6933,5 +6933,5 @@
     /* Pending VM request packets, such as hardware interrupts. */
     if (   VM_FF_IS_PENDING(pVM, VM_FF_REQUEST)
-        || VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_REQUEST))
+        || VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_REQUEST))
     {
         Log4Func(("Pending VM request forcing us back to ring-3\n"));
@@ -7519,5 +7519,5 @@
      */
                                                                /** @todo SMI. SMIs take priority over NMIs. */
-    if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INTERRUPT_NMI))    /* NMI. NMIs take priority over regular interrupts. */
+    if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_NMI))        /* NMI. NMIs take priority over regular interrupts. */
     {
         /* On some CPUs block-by-STI also blocks NMIs. See Intel spec. 26.3.1.5 "Checks On Guest Non-Register State". */
@@ -8527,5 +8527,5 @@
      * the below force flags to be set.
      */
-    if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HM_UPDATE_CR3))
+    if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_HM_UPDATE_CR3))
     {
         Assert(!(ASMAtomicUoReadU64(&pVCpu->cpum.GstCtx.fExtrn) & CPUMCTX_EXTRN_CR3));
@@ -8533,10 +8533,10 @@
         AssertMsgReturn(rc2 == VINF_SUCCESS || rc2 == VINF_PGM_SYNC_CR3,
                         ("%Rrc\n", rc2), RT_FAILURE_NP(rc2) ? rc2 : VERR_IPE_UNEXPECTED_INFO_STATUS);
-        Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HM_UPDATE_CR3));
-    }
-    if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HM_UPDATE_PAE_PDPES))
+        Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_HM_UPDATE_CR3));
+    }
+    if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_HM_UPDATE_PAE_PDPES))
     {
         PGMGstUpdatePaePdpes(pVCpu, &pVCpu->hm.s.aPdpes[0]);
-        Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HM_UPDATE_PAE_PDPES));
+        Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_HM_UPDATE_PAE_PDPES));
     }
 
@@ -8849,6 +8849,6 @@
             VMMRZCallRing3Enable(pVCpu);
 
-            Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HM_UPDATE_CR3));
-            Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HM_UPDATE_PAE_PDPES));
+            Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_HM_UPDATE_CR3));
+            Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_HM_UPDATE_PAE_PDPES));
 
 #if defined(HMVMX_ALWAYS_SYNC_FULL_GUEST_STATE) || defined(HMVMX_ALWAYS_SAVE_FULL_GUEST_STATE)
@@ -10465,5 +10465,5 @@
 
     /* Update interrupt inhibition. */
-    if (   VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
+    if (   VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
         && pVCpu->cpum.GstCtx.rip != EMGetInhibitInterruptsPC(pVCpu))
         VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS);
@@ -11290,5 +11290,5 @@
     }
 
-    Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_BLOCK_NMIS));
+    Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_BLOCK_NMIS));
 
     /*
@@ -11302,5 +11302,5 @@
     bool const fBlockSti = RT_BOOL(fIntrState & VMX_VMCS_GUEST_INT_STATE_BLOCK_STI);
     if (   fBlockSti
-        && VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS))
+        && VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS))
     {
         VMCPU_FF_CLEAR(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS);
Index: /trunk/src/VBox/VMM/VMMR0/NEMR0Native-win.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR0/NEMR0Native-win.cpp	(revision 74784)
+++ /trunk/src/VBox/VMM/VMMR0/NEMR0Native-win.cpp	(revision 74785)
@@ -1219,8 +1219,8 @@
         pInput->Elements[iReg].Name                 = HvRegisterInterruptState;
         pInput->Elements[iReg].Value.Reg64          = 0;
-        if (   VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
+        if (   VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
             && EMGetInhibitInterruptsPC(pVCpu) == pCtx->rip)
             pInput->Elements[iReg].Value.InterruptState.InterruptShadow = 1;
-        if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_BLOCK_NMIS))
+        if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_BLOCK_NMIS))
             pInput->Elements[iReg].Value.InterruptState.NmiMasked = 1;
         iReg++;
@@ -1229,5 +1229,5 @@
     {
         if (   pVCpu->nem.s.fLastInterruptShadow
-            || (   VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
+            || (   VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
                 && EMGetInhibitInterruptsPC(pVCpu) == pCtx->rip))
         {
@@ -1235,5 +1235,5 @@
             pInput->Elements[iReg].Name                 = HvRegisterInterruptState;
             pInput->Elements[iReg].Value.Reg64          = 0;
-            if (   VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
+            if (   VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
                 && EMGetInhibitInterruptsPC(pVCpu) == pCtx->rip)
                 pInput->Elements[iReg].Value.InterruptState.InterruptShadow = 1;
Index: /trunk/src/VBox/VMM/VMMR0/VMMR0.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR0/VMMR0.cpp	(revision 74784)
+++ /trunk/src/VBox/VMM/VMMR0/VMMR0.cpp	(revision 74785)
@@ -904,23 +904,23 @@
         case VINF_EM_RAW_TO_R3:
             STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3Total);
-            if (VM_FF_IS_PENDING(pVM, VM_FF_TM_VIRTUAL_SYNC))
+            if (VM_FF_IS_SET(pVM, VM_FF_TM_VIRTUAL_SYNC))
                 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3TMVirt);
-            else if (VM_FF_IS_PENDING(pVM, VM_FF_PGM_NEED_HANDY_PAGES))
+            else if (VM_FF_IS_SET(pVM, VM_FF_PGM_NEED_HANDY_PAGES))
                 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3HandyPages);
-            else if (VM_FF_IS_PENDING(pVM, VM_FF_PDM_QUEUES))
+            else if (VM_FF_IS_SET(pVM, VM_FF_PDM_QUEUES))
                 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3PDMQueues);
-            else if (VM_FF_IS_PENDING(pVM, VM_FF_EMT_RENDEZVOUS))
+            else if (VM_FF_IS_SET(pVM, VM_FF_EMT_RENDEZVOUS))
                 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3Rendezvous);
-            else if (VM_FF_IS_PENDING(pVM, VM_FF_PDM_DMA))
+            else if (VM_FF_IS_SET(pVM, VM_FF_PDM_DMA))
                 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3DMA);
-            else if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_TIMER))
+            else if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TIMER))
                 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3Timer);
-            else if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
+            else if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PDM_CRITSECT))
                 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3CritSect);
-            else if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_TO_R3))
+            else if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TO_R3))
                 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3FF);
-            else if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_IEM))
+            else if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_IEM))
                 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3Iem);
-            else if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_IOM))
+            else if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_IOM))
                 STAM_COUNTER_INC(&pVM->vmm.s.StatRZRetToR3Iom);
             else
Index: /trunk/src/VBox/VMM/VMMR3/DBGF.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR3/DBGF.cpp	(revision 74784)
+++ /trunk/src/VBox/VMM/VMMR3/DBGF.cpp	(revision 74785)
@@ -299,5 +299,5 @@
                        unfortunately required by plugin unloading. */
                     if (   VM_FF_IS_PENDING(pVM, VM_FF_REQUEST)
-                        || VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_REQUEST))
+                        || VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_REQUEST))
                     {
                         LogFlow(("DBGFR3PowerOff: Processes priority requests...\n"));
@@ -392,5 +392,5 @@
         /* Process priority stuff. */
         if (   VM_FF_IS_PENDING(pVM, VM_FF_REQUEST)
-            || VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_REQUEST))
+            || VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_REQUEST))
         {
             int rc = VMR3ReqProcessU(pVM->pUVM, VMCPUID_ANY, true /*fPriorityOnly*/);
@@ -835,5 +835,5 @@
             int rc;
             if (    !VM_FF_IS_PENDING(pVM, VM_FF_EMT_RENDEZVOUS | VM_FF_REQUEST)
-                &&  !VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_REQUEST))
+                &&  !VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_REQUEST))
             {
                 rc = RTSemPingWait(&pVM->dbgf.s.PingPong, cPollHack);
@@ -853,5 +853,5 @@
             }
             else if (   VM_FF_IS_PENDING(pVM, VM_FF_REQUEST)
-                     || VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_REQUEST))
+                     || VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_REQUEST))
             {
                 LogFlow(("dbgfR3VMMWait: Processes requests...\n"));
Index: /trunk/src/VBox/VMM/VMMR3/EM.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR3/EM.cpp	(revision 74784)
+++ /trunk/src/VBox/VMM/VMMR3/EM.cpp	(revision 74785)
@@ -1650,9 +1650,9 @@
     VBOXVMM_EM_FF_HIGH(pVCpu, pVM->fGlobalForcedActions, pVCpu->fLocalForcedActions, VBOXSTRICTRC_VAL(rc));
 
-    if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
+    if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PDM_CRITSECT))
         PDMCritSectBothFF(pVCpu);
 
     /* Update CR3 (Nested Paging case for HM). */
-    if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HM_UPDATE_CR3))
+    if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_HM_UPDATE_CR3))
     {
         CPUM_IMPORT_EXTRN_RCSTRICT(pVCpu, CPUMCTX_EXTRN_CR0 | CPUMCTX_EXTRN_CR3 | CPUMCTX_EXTRN_CR4 | CPUMCTX_EXTRN_EFER, rc);
@@ -1660,9 +1660,9 @@
         if (RT_FAILURE(rc2))
             return rc2;
-        Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HM_UPDATE_CR3));
+        Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_HM_UPDATE_CR3));
     }
 
     /* Update PAE PDPEs. This must be done *after* PGMUpdateCR3() and used only by the Nested Paging case for HM. */
-    if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HM_UPDATE_PAE_PDPES))
+    if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_HM_UPDATE_PAE_PDPES))
     {
         CPUM_IMPORT_EXTRN_RCSTRICT(pVCpu, CPUMCTX_EXTRN_CR0 | CPUMCTX_EXTRN_CR3 | CPUMCTX_EXTRN_CR4 | CPUMCTX_EXTRN_EFER, rc);
@@ -1673,5 +1673,5 @@
 
             PGMGstUpdatePaePdpes(pVCpu, pPdpes);
-            Assert(!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_HM_UPDATE_PAE_PDPES));
+            Assert(!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_HM_UPDATE_PAE_PDPES));
         }
         else
@@ -1680,9 +1680,9 @@
 
     /* IEM has pending work (typically memory write after INS instruction). */
-    if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_IEM))
+    if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_IEM))
         rc = IEMR3ProcessForceFlag(pVM, pVCpu, rc);
 
     /* IOM has pending work (comitting an I/O or MMIO write). */
-    if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_IOM))
+    if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_IOM))
     {
         rc = IOMR3ProcessForceFlag(pVM, pVCpu, rc);
@@ -1696,5 +1696,5 @@
 
 #ifdef VBOX_WITH_RAW_MODE
-    if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_CSAM_PENDING_ACTION))
+    if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_CSAM_PENDING_ACTION))
         CSAMR3DoPendingAction(pVM, pVCpu);
 #endif
@@ -1779,5 +1779,5 @@
             }
 
-            if (   VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INTERRUPT_NESTED_GUEST)
+            if (   VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INTERRUPT_NESTED_GUEST)
                 && CPUMCanSvmNstGstTakeVirtIntr(pVCpu, &pVCpu->cpum.GstCtx))
             {
@@ -1916,6 +1916,6 @@
          * Debugger Facility polling.
          */
-        if (   VM_FF_IS_PENDING(pVM, VM_FF_DBGF)
-            || VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_DBGF) )
+        if (   VM_FF_IS_SET(pVM, VM_FF_DBGF)
+            || VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_DBGF) )
         {
             CPUM_IMPORT_EXTRN_RCSTRICT(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK, rc);
@@ -1938,6 +1938,6 @@
          * CSAM page scanning.
          */
-        if (    !VM_FF_IS_PENDING(pVM, VM_FF_PGM_NO_MEMORY)
-            &&  VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_CSAM_SCAN_PAGE))
+        if (    !VM_FF_IS_SET(pVM, VM_FF_PGM_NO_MEMORY)
+            &&  VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_CSAM_SCAN_PAGE))
         {
             /** @todo check for 16 or 32 bits code! (D bit in the code selector) */
@@ -2056,5 +2056,5 @@
      * (Executed in no particular order.)
      */
-    if (    !VM_FF_IS_PENDING(pVM, VM_FF_PGM_NO_MEMORY)
+    if (    !VM_FF_IS_SET(pVM, VM_FF_PGM_NO_MEMORY)
         &&  VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_NORMAL_PRIORITY_MASK))
     {
@@ -2062,5 +2062,5 @@
          * Requests from other threads.
          */
-        if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_REQUEST))
+        if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_REQUEST))
         {
             CPUM_IMPORT_EXTRN_RCSTRICT(pVCpu, ~CPUMCTX_EXTRN_KEEPER_MASK, rc);
@@ -2100,5 +2100,5 @@
          * Timers before interrupts.
          */
-        if (    VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_TIMER)
+        if (    VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TIMER)
             &&  !VM_FF_IS_PENDING(pVM, VM_FF_PGM_NO_MEMORY))
             TMR3TimerQueuesDo(pVM);
@@ -2122,5 +2122,5 @@
          *       you might think.
          */
-        if (    VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
+        if (    VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
             &&  !VM_FF_IS_PENDING(pVM, VM_FF_PGM_NO_MEMORY))
         {
@@ -2142,5 +2142,5 @@
             &&  (!rc || rc >= VINF_EM_RESCHEDULE_HM))
         {
-            if (   !VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
+            if (   !VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_INHIBIT_INTERRUPTS)
                 && !TRPMHasTrap(pVCpu)) /* an interrupt could already be scheduled for dispatching in the recompiler. */
             {
@@ -2210,5 +2210,5 @@
          */
         if (   (   VM_FF_IS_PENDING(pVM, VM_FF_DBGF)
-                || VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_DBGF) )
+                || VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_DBGF) )
             && !VM_FF_IS_PENDING(pVM, VM_FF_PGM_NO_MEMORY) )
         {
@@ -2722,5 +2722,5 @@
                 if (   enmOldState == EMSTATE_HALTED
                     && (   (pVCpu->em.s.MWait.fWait & EMMWAIT_FLAG_ACTIVE)
-                        || VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_UNHALT))
+                        || VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_UNHALT))
                     && (   enmNewState == EMSTATE_RAW
                         || enmNewState == EMSTATE_HM
@@ -2739,5 +2739,5 @@
                         pVCpu->em.s.MWait.fWait &= ~(EMMWAIT_FLAG_ACTIVE | EMMWAIT_FLAG_BREAKIRQIF0);
                     }
-                    if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_UNHALT))
+                    if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_UNHALT))
                     {
                         LogFlow(("EMR3ExecuteVM: Clearing UNHALT\n"));
Index: /trunk/src/VBox/VMM/VMMR3/EMRaw.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR3/EMRaw.cpp	(revision 74784)
+++ /trunk/src/VBox/VMM/VMMR3/EMRaw.cpp	(revision 74785)
@@ -1180,7 +1180,7 @@
      * PGMSyncCR3+pgmR3PoolClearAll is pending.
      */
-    if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_TRPM_SYNC_IDT))
-    {
-        if (   VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_PGM_SYNC_CR3)
+    if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TRPM_SYNC_IDT))
+    {
+        if (   VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PGM_SYNC_CR3)
             && EMIsRawRing0Enabled(pVM)
             && CSAMIsEnabled(pVM))
@@ -1199,5 +1199,5 @@
      * Sync TSS.
      */
-    if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_SELM_SYNC_TSS))
+    if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS))
     {
         int rc = SELMR3SyncTSS(pVM, pVCpu);
Index: /trunk/src/VBox/VMM/VMMR3/VMM.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMR3/VMM.cpp	(revision 74784)
+++ /trunk/src/VBox/VMM/VMMR3/VMM.cpp	(revision 74785)
@@ -2845,5 +2845,5 @@
      * when entering other critsects here.
      */
-    if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_PDM_CRITSECT))
+    if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_PDM_CRITSECT))
         PDMCritSectBothFF(pVCpu);
 
Index: /trunk/src/VBox/VMM/VMMRC/SELMRC.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMRC/SELMRC.cpp	(revision 74784)
+++ /trunk/src/VBox/VMM/VMMRC/SELMRC.cpp	(revision 74785)
@@ -331,5 +331,5 @@
     }
 
-    if (!VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_SELM_SYNC_GDT))
+    if (!VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_SELM_SYNC_GDT))
         STAM_COUNTER_INC(&pVM->selm.s.StatRCWriteGuestGDTHandled);
     else
@@ -474,5 +474,5 @@
 
         if (   rcStrict == VINF_SUCCESS
-            && !VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_SELM_SYNC_TSS)
+            && !VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_SELM_SYNC_TSS)
             && pVM->selm.s.offGuestIoBitmap != 0)
         {
Index: /trunk/src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp
===================================================================
--- /trunk/src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp	(revision 74784)
+++ /trunk/src/VBox/VMM/VMMRC/TRPMRCHandlers.cpp	(revision 74785)
@@ -184,5 +184,5 @@
             TMTimerPollVoid(pVM, pVCpu);
             Log2(("TMTimerPoll at %08RX32 - VM_FF_TM_VIRTUAL_SYNC=%d VM_FF_TM_VIRTUAL_SYNC=%d\n", pRegFrame->eip,
-                  VM_FF_IS_PENDING(pVM, VM_FF_TM_VIRTUAL_SYNC), VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_TIMER)));
+                  VM_FF_IS_PENDING(pVM, VM_FF_TM_VIRTUAL_SYNC), VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TIMER)));
         }
     }
@@ -241,5 +241,5 @@
             }
             /* Pending timer action. */
-            else if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_TIMER))
+            else if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TIMER))
                 rc = VINF_EM_RAW_TIMER_PENDING;
             /* The Virtual Sync clock has stopped. */
@@ -251,11 +251,11 @@
             /* Pending request packets might contain actions that need immediate
                attention, such as pending hardware interrupts. */
-            else if (   VM_FF_IS_PENDING(pVM, VM_FF_REQUEST)
-                     || VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_REQUEST))
+            else if (   VM_FF_IS_SET(pVM, VM_FF_REQUEST)
+                     || VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_REQUEST))
                 rc = VINF_EM_PENDING_REQUEST;
             /* Pending GDT/LDT/TSS sync. */
             else if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_SELM_SYNC_GDT | VMCPU_FF_SELM_SYNC_LDT | VMCPU_FF_SELM_SYNC_TSS))
                 rc = VINF_SELM_SYNC_GDT;
-            else if (VMCPU_FF_IS_PENDING(pVCpu, VMCPU_FF_TRPM_SYNC_IDT))
+            else if (VMCPU_FF_IS_SET(pVCpu, VMCPU_FF_TRPM_SYNC_IDT))
                 rc = VINF_EM_RAW_TO_R3;
             /* Possibly pending interrupt: dispatch it. */