Index: /trunk/src/VBox/VMM/VMMAll/IEMAllCImplVmxInstr.cpp.h
===================================================================
--- /trunk/src/VBox/VMM/VMMAll/IEMAllCImplVmxInstr.cpp.h	(revision 74677)
+++ /trunk/src/VBox/VMM/VMMAll/IEMAllCImplVmxInstr.cpp.h	(revision 74678)
@@ -69,7 +69,7 @@
     /* VMX_VMCS_ENC_WIDTH_16BIT | VMX_VMCS_ENC_TYPE_CONTROL: */
     {
-        /*     0 */ RT_OFFSETOF(VMXVVMCS, u16Vpid),
-        /*     1 */ RT_OFFSETOF(VMXVVMCS, u16PostIntNotifyVector),
-        /*     2 */ RT_OFFSETOF(VMXVVMCS, u16EptpIndex),
+        /*     0 */ RT_UOFFSETOF(VMXVVMCS, u16Vpid),
+        /*     1 */ RT_UOFFSETOF(VMXVVMCS, u16PostIntNotifyVector),
+        /*     2 */ RT_UOFFSETOF(VMXVVMCS, u16EptpIndex),
         /*  3-10 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
         /* 11-18 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
@@ -85,14 +85,14 @@
     /* VMX_VMCS_ENC_WIDTH_16BIT | VMX_VMCS_ENC_TYPE_GUEST_STATE: */
     {
-        /*     0 */ RT_OFFSETOF(VMXVVMCS, GuestEs),
-        /*     1 */ RT_OFFSETOF(VMXVVMCS, GuestCs),
-        /*     2 */ RT_OFFSETOF(VMXVVMCS, GuestSs),
-        /*     3 */ RT_OFFSETOF(VMXVVMCS, GuestDs),
-        /*     4 */ RT_OFFSETOF(VMXVVMCS, GuestFs),
-        /*     5 */ RT_OFFSETOF(VMXVVMCS, GuestGs),
-        /*     6 */ RT_OFFSETOF(VMXVVMCS, GuestLdtr),
-        /*     7 */ RT_OFFSETOF(VMXVVMCS, GuestTr),
-        /*     8 */ RT_OFFSETOF(VMXVVMCS, u16GuestIntStatus),
-        /*     9 */ RT_OFFSETOF(VMXVVMCS, u16PmlIndex),
+        /*     0 */ RT_UOFFSETOF(VMXVVMCS, GuestEs),
+        /*     1 */ RT_UOFFSETOF(VMXVVMCS, GuestCs),
+        /*     2 */ RT_UOFFSETOF(VMXVVMCS, GuestSs),
+        /*     3 */ RT_UOFFSETOF(VMXVVMCS, GuestDs),
+        /*     4 */ RT_UOFFSETOF(VMXVVMCS, GuestFs),
+        /*     5 */ RT_UOFFSETOF(VMXVVMCS, GuestGs),
+        /*     6 */ RT_UOFFSETOF(VMXVVMCS, GuestLdtr),
+        /*     7 */ RT_UOFFSETOF(VMXVVMCS, GuestTr),
+        /*     8 */ RT_UOFFSETOF(VMXVVMCS, u16GuestIntStatus),
+        /*     9 */ RT_UOFFSETOF(VMXVVMCS, u16PmlIndex),
         /* 10-17 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
         /* 18-25 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
@@ -100,11 +100,11 @@
     /* VMX_VMCS_ENC_WIDTH_16BIT | VMX_VMCS_ENC_TYPE_HOST_STATE: */
     {
-        /*     0 */ RT_OFFSETOF(VMXVVMCS, HostEs),
-        /*     1 */ RT_OFFSETOF(VMXVVMCS, HostCs),
-        /*     2 */ RT_OFFSETOF(VMXVVMCS, HostSs),
-        /*     3 */ RT_OFFSETOF(VMXVVMCS, HostDs),
-        /*     4 */ RT_OFFSETOF(VMXVVMCS, HostFs),
-        /*     5 */ RT_OFFSETOF(VMXVVMCS, HostGs),
-        /*     6 */ RT_OFFSETOF(VMXVVMCS, HostTr),
+        /*     0 */ RT_UOFFSETOF(VMXVVMCS, HostEs),
+        /*     1 */ RT_UOFFSETOF(VMXVVMCS, HostCs),
+        /*     2 */ RT_UOFFSETOF(VMXVVMCS, HostSs),
+        /*     3 */ RT_UOFFSETOF(VMXVVMCS, HostDs),
+        /*     4 */ RT_UOFFSETOF(VMXVVMCS, HostFs),
+        /*     5 */ RT_UOFFSETOF(VMXVVMCS, HostGs),
+        /*     6 */ RT_UOFFSETOF(VMXVVMCS, HostTr),
         /*  7-14 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
         /* 15-22 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
@@ -113,34 +113,34 @@
     /* VMX_VMCS_ENC_WIDTH_64BIT | VMX_VMCS_ENC_TYPE_CONTROL: */
     {
-        /*     0 */ RT_OFFSETOF(VMXVVMCS, u64AddrIoBitmapA),
-        /*     1 */ RT_OFFSETOF(VMXVVMCS, u64AddrIoBitmapB),
-        /*     2 */ RT_OFFSETOF(VMXVVMCS, u64AddrMsrBitmap),
-        /*     3 */ RT_OFFSETOF(VMXVVMCS, u64AddrExitMsrStore),
-        /*     4 */ RT_OFFSETOF(VMXVVMCS, u64AddrExitMsrLoad),
-        /*     5 */ RT_OFFSETOF(VMXVVMCS, u64AddrEntryMsrLoad),
-        /*     6 */ RT_OFFSETOF(VMXVVMCS, u64ExecVmcsPtr),
-        /*     7 */ RT_OFFSETOF(VMXVVMCS, u64AddrPml),
-        /*     8 */ RT_OFFSETOF(VMXVVMCS, u64TscOffset),
-        /*     9 */ RT_OFFSETOF(VMXVVMCS, u64AddrVirtApic),
-        /*    10 */ RT_OFFSETOF(VMXVVMCS, u64AddrApicAccess),
-        /*    11 */ RT_OFFSETOF(VMXVVMCS, u64AddrPostedIntDesc),
-        /*    12 */ RT_OFFSETOF(VMXVVMCS, u64VmFuncCtls),
-        /*    13 */ RT_OFFSETOF(VMXVVMCS, u64EptpPtr),
-        /*    14 */ RT_OFFSETOF(VMXVVMCS, u64EoiExitBitmap0),
-        /*    15 */ RT_OFFSETOF(VMXVVMCS, u64EoiExitBitmap1),
-        /*    16 */ RT_OFFSETOF(VMXVVMCS, u64EoiExitBitmap2),
-        /*    17 */ RT_OFFSETOF(VMXVVMCS, u64EoiExitBitmap3),
-        /*    18 */ RT_OFFSETOF(VMXVVMCS, u64AddrEptpList),
-        /*    19 */ RT_OFFSETOF(VMXVVMCS, u64AddrVmreadBitmap),
-        /*    20 */ RT_OFFSETOF(VMXVVMCS, u64AddrVmwriteBitmap),
-        /*    21 */ RT_OFFSETOF(VMXVVMCS, u64AddrXcptVeInfo),
-        /*    22 */ RT_OFFSETOF(VMXVVMCS, u64AddrXssBitmap),
-        /*    23 */ RT_OFFSETOF(VMXVVMCS, u64AddrEnclsBitmap),
+        /*     0 */ RT_UOFFSETOF(VMXVVMCS, u64AddrIoBitmapA),
+        /*     1 */ RT_UOFFSETOF(VMXVVMCS, u64AddrIoBitmapB),
+        /*     2 */ RT_UOFFSETOF(VMXVVMCS, u64AddrMsrBitmap),
+        /*     3 */ RT_UOFFSETOF(VMXVVMCS, u64AddrExitMsrStore),
+        /*     4 */ RT_UOFFSETOF(VMXVVMCS, u64AddrExitMsrLoad),
+        /*     5 */ RT_UOFFSETOF(VMXVVMCS, u64AddrEntryMsrLoad),
+        /*     6 */ RT_UOFFSETOF(VMXVVMCS, u64ExecVmcsPtr),
+        /*     7 */ RT_UOFFSETOF(VMXVVMCS, u64AddrPml),
+        /*     8 */ RT_UOFFSETOF(VMXVVMCS, u64TscOffset),
+        /*     9 */ RT_UOFFSETOF(VMXVVMCS, u64AddrVirtApic),
+        /*    10 */ RT_UOFFSETOF(VMXVVMCS, u64AddrApicAccess),
+        /*    11 */ RT_UOFFSETOF(VMXVVMCS, u64AddrPostedIntDesc),
+        /*    12 */ RT_UOFFSETOF(VMXVVMCS, u64VmFuncCtls),
+        /*    13 */ RT_UOFFSETOF(VMXVVMCS, u64EptpPtr),
+        /*    14 */ RT_UOFFSETOF(VMXVVMCS, u64EoiExitBitmap0),
+        /*    15 */ RT_UOFFSETOF(VMXVVMCS, u64EoiExitBitmap1),
+        /*    16 */ RT_UOFFSETOF(VMXVVMCS, u64EoiExitBitmap2),
+        /*    17 */ RT_UOFFSETOF(VMXVVMCS, u64EoiExitBitmap3),
+        /*    18 */ RT_UOFFSETOF(VMXVVMCS, u64AddrEptpList),
+        /*    19 */ RT_UOFFSETOF(VMXVVMCS, u64AddrVmreadBitmap),
+        /*    20 */ RT_UOFFSETOF(VMXVVMCS, u64AddrVmwriteBitmap),
+        /*    21 */ RT_UOFFSETOF(VMXVVMCS, u64AddrXcptVeInfo),
+        /*    22 */ RT_UOFFSETOF(VMXVVMCS, u64AddrXssBitmap),
+        /*    23 */ RT_UOFFSETOF(VMXVVMCS, u64AddrEnclsBitmap),
         /*    24 */ UINT16_MAX,
-        /*    25 */ RT_OFFSETOF(VMXVVMCS, u64TscMultiplier)
+        /*    25 */ RT_UOFFSETOF(VMXVVMCS, u64TscMultiplier)
     },
     /* VMX_VMCS_ENC_WIDTH_64BIT | VMX_VMCS_ENC_TYPE_VMEXIT_INFO: */
     {
-        /*     0 */ RT_OFFSETOF(VMXVVMCS, u64RoGuestPhysAddr),
+        /*     0 */ RT_UOFFSETOF(VMXVVMCS, u64RoGuestPhysAddr),
         /*   1-8 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
         /*  9-16 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
@@ -150,14 +150,14 @@
     /* VMX_VMCS_ENC_WIDTH_64BIT | VMX_VMCS_ENC_TYPE_GUEST_STATE: */
     {
-        /*     0 */ RT_OFFSETOF(VMXVVMCS, u64VmcsLinkPtr),
-        /*     1 */ RT_OFFSETOF(VMXVVMCS, u64GuestDebugCtlMsr),
-        /*     2 */ RT_OFFSETOF(VMXVVMCS, u64GuestPatMsr),
-        /*     3 */ RT_OFFSETOF(VMXVVMCS, u64GuestEferMsr),
-        /*     4 */ RT_OFFSETOF(VMXVVMCS, u64GuestPerfGlobalCtlMsr),
-        /*     5 */ RT_OFFSETOF(VMXVVMCS, u64GuestPdpte0),
-        /*     6 */ RT_OFFSETOF(VMXVVMCS, u64GuestPdpte1),
-        /*     7 */ RT_OFFSETOF(VMXVVMCS, u64GuestPdpte2),
-        /*     8 */ RT_OFFSETOF(VMXVVMCS, u64GuestPdpte3),
-        /*     9 */ RT_OFFSETOF(VMXVVMCS, u64GuestBndcfgsMsr),
+        /*     0 */ RT_UOFFSETOF(VMXVVMCS, u64VmcsLinkPtr),
+        /*     1 */ RT_UOFFSETOF(VMXVVMCS, u64GuestDebugCtlMsr),
+        /*     2 */ RT_UOFFSETOF(VMXVVMCS, u64GuestPatMsr),
+        /*     3 */ RT_UOFFSETOF(VMXVVMCS, u64GuestEferMsr),
+        /*     4 */ RT_UOFFSETOF(VMXVVMCS, u64GuestPerfGlobalCtlMsr),
+        /*     5 */ RT_UOFFSETOF(VMXVVMCS, u64GuestPdpte0),
+        /*     6 */ RT_UOFFSETOF(VMXVVMCS, u64GuestPdpte1),
+        /*     7 */ RT_UOFFSETOF(VMXVVMCS, u64GuestPdpte2),
+        /*     8 */ RT_UOFFSETOF(VMXVVMCS, u64GuestPdpte3),
+        /*     9 */ RT_UOFFSETOF(VMXVVMCS, u64GuestBndcfgsMsr),
         /* 10-17 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
         /* 18-25 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
@@ -165,7 +165,7 @@
     /* VMX_VMCS_ENC_WIDTH_64BIT | VMX_VMCS_ENC_TYPE_HOST_STATE: */
     {
-        /*     0 */ RT_OFFSETOF(VMXVVMCS, u64HostPatMsr),
-        /*     1 */ RT_OFFSETOF(VMXVVMCS, u64HostEferMsr),
-        /*     2 */ RT_OFFSETOF(VMXVVMCS, u64HostPerfGlobalCtlMsr),
+        /*     0 */ RT_UOFFSETOF(VMXVVMCS, u64HostPatMsr),
+        /*     1 */ RT_UOFFSETOF(VMXVVMCS, u64HostEferMsr),
+        /*     2 */ RT_UOFFSETOF(VMXVVMCS, u64HostPerfGlobalCtlMsr),
         /*  3-10 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
         /* 11-18 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
@@ -174,34 +174,34 @@
     /* VMX_VMCS_ENC_WIDTH_32BIT | VMX_VMCS_ENC_TYPE_CONTROL: */
     {
-        /*     0 */ RT_OFFSETOF(VMXVVMCS, u32PinCtls),
-        /*     1 */ RT_OFFSETOF(VMXVVMCS, u32ProcCtls),
-        /*     2 */ RT_OFFSETOF(VMXVVMCS, u32XcptBitmap),
-        /*     3 */ RT_OFFSETOF(VMXVVMCS, u32XcptPFMask),
-        /*     4 */ RT_OFFSETOF(VMXVVMCS, u32XcptPFMatch),
-        /*     5 */ RT_OFFSETOF(VMXVVMCS, u32Cr3TargetCount),
-        /*     6 */ RT_OFFSETOF(VMXVVMCS, u32ExitCtls),
-        /*     7 */ RT_OFFSETOF(VMXVVMCS, u32ExitMsrStoreCount),
-        /*     8 */ RT_OFFSETOF(VMXVVMCS, u32ExitMsrLoadCount),
-        /*     9 */ RT_OFFSETOF(VMXVVMCS, u32EntryCtls),
-        /*    10 */ RT_OFFSETOF(VMXVVMCS, u32EntryMsrLoadCount),
-        /*    11 */ RT_OFFSETOF(VMXVVMCS, u32EntryIntInfo),
-        /*    12 */ RT_OFFSETOF(VMXVVMCS, u32EntryXcptErrCode),
-        /*    13 */ RT_OFFSETOF(VMXVVMCS, u32EntryInstrLen),
-        /*    14 */ RT_OFFSETOF(VMXVVMCS, u32TprThreshold),
-        /*    15 */ RT_OFFSETOF(VMXVVMCS, u32ProcCtls2),
-        /*    16 */ RT_OFFSETOF(VMXVVMCS, u32PleGap),
-        /*    17 */ RT_OFFSETOF(VMXVVMCS, u32PleWindow),
+        /*     0 */ RT_UOFFSETOF(VMXVVMCS, u32PinCtls),
+        /*     1 */ RT_UOFFSETOF(VMXVVMCS, u32ProcCtls),
+        /*     2 */ RT_UOFFSETOF(VMXVVMCS, u32XcptBitmap),
+        /*     3 */ RT_UOFFSETOF(VMXVVMCS, u32XcptPFMask),
+        /*     4 */ RT_UOFFSETOF(VMXVVMCS, u32XcptPFMatch),
+        /*     5 */ RT_UOFFSETOF(VMXVVMCS, u32Cr3TargetCount),
+        /*     6 */ RT_UOFFSETOF(VMXVVMCS, u32ExitCtls),
+        /*     7 */ RT_UOFFSETOF(VMXVVMCS, u32ExitMsrStoreCount),
+        /*     8 */ RT_UOFFSETOF(VMXVVMCS, u32ExitMsrLoadCount),
+        /*     9 */ RT_UOFFSETOF(VMXVVMCS, u32EntryCtls),
+        /*    10 */ RT_UOFFSETOF(VMXVVMCS, u32EntryMsrLoadCount),
+        /*    11 */ RT_UOFFSETOF(VMXVVMCS, u32EntryIntInfo),
+        /*    12 */ RT_UOFFSETOF(VMXVVMCS, u32EntryXcptErrCode),
+        /*    13 */ RT_UOFFSETOF(VMXVVMCS, u32EntryInstrLen),
+        /*    14 */ RT_UOFFSETOF(VMXVVMCS, u32TprThreshold),
+        /*    15 */ RT_UOFFSETOF(VMXVVMCS, u32ProcCtls2),
+        /*    16 */ RT_UOFFSETOF(VMXVVMCS, u32PleGap),
+        /*    17 */ RT_UOFFSETOF(VMXVVMCS, u32PleWindow),
         /* 18-25 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
     },
     /* VMX_VMCS_ENC_WIDTH_32BIT | VMX_VMCS_ENC_TYPE_VMEXIT_INFO: */
     {
-        /*     0 */ RT_OFFSETOF(VMXVVMCS, u32RoVmInstrError),
-        /*     1 */ RT_OFFSETOF(VMXVVMCS, u32RoExitReason),
-        /*     2 */ RT_OFFSETOF(VMXVVMCS, u32RoExitIntInfo),
-        /*     3 */ RT_OFFSETOF(VMXVVMCS, u32RoExitErrCode),
-        /*     4 */ RT_OFFSETOF(VMXVVMCS, u32RoIdtVectoringInfo),
-        /*     5 */ RT_OFFSETOF(VMXVVMCS, u32RoIdtVectoringErrCode),
-        /*     6 */ RT_OFFSETOF(VMXVVMCS, u32RoExitInstrLen),
-        /*     7 */ RT_OFFSETOF(VMXVVMCS, u32RoExitInstrInfo),
+        /*     0 */ RT_UOFFSETOF(VMXVVMCS, u32RoVmInstrError),
+        /*     1 */ RT_UOFFSETOF(VMXVVMCS, u32RoExitReason),
+        /*     2 */ RT_UOFFSETOF(VMXVVMCS, u32RoExitIntInfo),
+        /*     3 */ RT_UOFFSETOF(VMXVVMCS, u32RoExitErrCode),
+        /*     4 */ RT_UOFFSETOF(VMXVVMCS, u32RoIdtVectoringInfo),
+        /*     5 */ RT_UOFFSETOF(VMXVVMCS, u32RoIdtVectoringErrCode),
+        /*     6 */ RT_UOFFSETOF(VMXVVMCS, u32RoExitInstrLen),
+        /*     7 */ RT_UOFFSETOF(VMXVVMCS, u32RoExitInstrInfo),
         /*  8-15 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
         /* 16-23 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
@@ -210,33 +210,33 @@
     /* VMX_VMCS_ENC_WIDTH_32BIT | VMX_VMCS_ENC_TYPE_GUEST_STATE: */
     {
-        /*     0 */ RT_OFFSETOF(VMXVVMCS, u32GuestEsLimit),
-        /*     1 */ RT_OFFSETOF(VMXVVMCS, u32GuestCsLimit),
-        /*     2 */ RT_OFFSETOF(VMXVVMCS, u32GuestSsLimit),
-        /*     3 */ RT_OFFSETOF(VMXVVMCS, u32GuestDsLimit),
-        /*     4 */ RT_OFFSETOF(VMXVVMCS, u32GuestEsLimit),
-        /*     5 */ RT_OFFSETOF(VMXVVMCS, u32GuestFsLimit),
-        /*     6 */ RT_OFFSETOF(VMXVVMCS, u32GuestGsLimit),
-        /*     7 */ RT_OFFSETOF(VMXVVMCS, u32GuestLdtrLimit),
-        /*     8 */ RT_OFFSETOF(VMXVVMCS, u32GuestTrLimit),
-        /*     9 */ RT_OFFSETOF(VMXVVMCS, u32GuestGdtrLimit),
-        /*    10 */ RT_OFFSETOF(VMXVVMCS, u32GuestIdtrLimit),
-        /*    11 */ RT_OFFSETOF(VMXVVMCS, u32GuestEsAttr),
-        /*    12 */ RT_OFFSETOF(VMXVVMCS, u32GuestCsAttr),
-        /*    13 */ RT_OFFSETOF(VMXVVMCS, u32GuestSsAttr),
-        /*    14 */ RT_OFFSETOF(VMXVVMCS, u32GuestDsAttr),
-        /*    15 */ RT_OFFSETOF(VMXVVMCS, u32GuestFsAttr),
-        /*    16 */ RT_OFFSETOF(VMXVVMCS, u32GuestGsAttr),
-        /*    17 */ RT_OFFSETOF(VMXVVMCS, u32GuestLdtrAttr),
-        /*    18 */ RT_OFFSETOF(VMXVVMCS, u32GuestTrAttr),
-        /*    19 */ RT_OFFSETOF(VMXVVMCS, u32GuestIntrState),
-        /*    20 */ RT_OFFSETOF(VMXVVMCS, u32GuestActivityState),
-        /*    21 */ RT_OFFSETOF(VMXVVMCS, u32GuestSmBase),
-        /*    22 */ RT_OFFSETOF(VMXVVMCS, u32GuestSysenterCS),
-        /*    23 */ RT_OFFSETOF(VMXVVMCS, u32PreemptTimer),
+        /*     0 */ RT_UOFFSETOF(VMXVVMCS, u32GuestEsLimit),
+        /*     1 */ RT_UOFFSETOF(VMXVVMCS, u32GuestCsLimit),
+        /*     2 */ RT_UOFFSETOF(VMXVVMCS, u32GuestSsLimit),
+        /*     3 */ RT_UOFFSETOF(VMXVVMCS, u32GuestDsLimit),
+        /*     4 */ RT_UOFFSETOF(VMXVVMCS, u32GuestEsLimit),
+        /*     5 */ RT_UOFFSETOF(VMXVVMCS, u32GuestFsLimit),
+        /*     6 */ RT_UOFFSETOF(VMXVVMCS, u32GuestGsLimit),
+        /*     7 */ RT_UOFFSETOF(VMXVVMCS, u32GuestLdtrLimit),
+        /*     8 */ RT_UOFFSETOF(VMXVVMCS, u32GuestTrLimit),
+        /*     9 */ RT_UOFFSETOF(VMXVVMCS, u32GuestGdtrLimit),
+        /*    10 */ RT_UOFFSETOF(VMXVVMCS, u32GuestIdtrLimit),
+        /*    11 */ RT_UOFFSETOF(VMXVVMCS, u32GuestEsAttr),
+        /*    12 */ RT_UOFFSETOF(VMXVVMCS, u32GuestCsAttr),
+        /*    13 */ RT_UOFFSETOF(VMXVVMCS, u32GuestSsAttr),
+        /*    14 */ RT_UOFFSETOF(VMXVVMCS, u32GuestDsAttr),
+        /*    15 */ RT_UOFFSETOF(VMXVVMCS, u32GuestFsAttr),
+        /*    16 */ RT_UOFFSETOF(VMXVVMCS, u32GuestGsAttr),
+        /*    17 */ RT_UOFFSETOF(VMXVVMCS, u32GuestLdtrAttr),
+        /*    18 */ RT_UOFFSETOF(VMXVVMCS, u32GuestTrAttr),
+        /*    19 */ RT_UOFFSETOF(VMXVVMCS, u32GuestIntrState),
+        /*    20 */ RT_UOFFSETOF(VMXVVMCS, u32GuestActivityState),
+        /*    21 */ RT_UOFFSETOF(VMXVVMCS, u32GuestSmBase),
+        /*    22 */ RT_UOFFSETOF(VMXVVMCS, u32GuestSysenterCS),
+        /*    23 */ RT_UOFFSETOF(VMXVVMCS, u32PreemptTimer),
         /* 24-25 */ UINT16_MAX, UINT16_MAX
     },
     /* VMX_VMCS_ENC_WIDTH_32BIT | VMX_VMCS_ENC_TYPE_HOST_STATE: */
     {
-        /*     0 */ RT_OFFSETOF(VMXVVMCS, u32HostSysenterCs),
+        /*     0 */ RT_UOFFSETOF(VMXVVMCS, u32HostSysenterCs),
         /*   1-8 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
         /*  9-16 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
@@ -246,12 +246,12 @@
     /* VMX_VMCS_ENC_WIDTH_NATURAL | VMX_VMCS_ENC_TYPE_CONTROL: */
     {
-        /*     0 */ RT_OFFSETOF(VMXVVMCS, u64Cr0Mask),
-        /*     1 */ RT_OFFSETOF(VMXVVMCS, u64Cr4Mask),
-        /*     2 */ RT_OFFSETOF(VMXVVMCS, u64Cr0ReadShadow),
-        /*     3 */ RT_OFFSETOF(VMXVVMCS, u64Cr4ReadShadow),
-        /*     4 */ RT_OFFSETOF(VMXVVMCS, u64Cr3Target0),
-        /*     5 */ RT_OFFSETOF(VMXVVMCS, u64Cr3Target1),
-        /*     6 */ RT_OFFSETOF(VMXVVMCS, u64Cr3Target2),
-        /*     7 */ RT_OFFSETOF(VMXVVMCS, u64Cr3Target3),
+        /*     0 */ RT_UOFFSETOF(VMXVVMCS, u64Cr0Mask),
+        /*     1 */ RT_UOFFSETOF(VMXVVMCS, u64Cr4Mask),
+        /*     2 */ RT_UOFFSETOF(VMXVVMCS, u64Cr0ReadShadow),
+        /*     3 */ RT_UOFFSETOF(VMXVVMCS, u64Cr4ReadShadow),
+        /*     4 */ RT_UOFFSETOF(VMXVVMCS, u64Cr3Target0),
+        /*     5 */ RT_UOFFSETOF(VMXVVMCS, u64Cr3Target1),
+        /*     6 */ RT_UOFFSETOF(VMXVVMCS, u64Cr3Target2),
+        /*     7 */ RT_UOFFSETOF(VMXVVMCS, u64Cr3Target3),
         /*  8-15 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
         /* 16-23 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
@@ -260,10 +260,10 @@
     /* VMX_VMCS_ENC_WIDTH_NATURAL | VMX_VMCS_ENC_TYPE_VMEXIT_INFO: */
     {
-        /*     0 */ RT_OFFSETOF(VMXVVMCS, u64RoExitQual),
-        /*     1 */ RT_OFFSETOF(VMXVVMCS, u64RoIoRcx),
-        /*     2 */ RT_OFFSETOF(VMXVVMCS, u64RoIoRsi),
-        /*     3 */ RT_OFFSETOF(VMXVVMCS, u64RoIoRdi),
-        /*     4 */ RT_OFFSETOF(VMXVVMCS, u64RoIoRip),
-        /*     5 */ RT_OFFSETOF(VMXVVMCS, u64RoGuestLinearAddr),
+        /*     0 */ RT_UOFFSETOF(VMXVVMCS, u64RoExitQual),
+        /*     1 */ RT_UOFFSETOF(VMXVVMCS, u64RoIoRcx),
+        /*     2 */ RT_UOFFSETOF(VMXVVMCS, u64RoIoRsi),
+        /*     3 */ RT_UOFFSETOF(VMXVVMCS, u64RoIoRdi),
+        /*     4 */ RT_UOFFSETOF(VMXVVMCS, u64RoIoRip),
+        /*     5 */ RT_UOFFSETOF(VMXVVMCS, u64RoGuestLinearAddr),
         /*  6-13 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
         /* 14-21 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
@@ -272,40 +272,40 @@
     /* VMX_VMCS_ENC_WIDTH_NATURAL | VMX_VMCS_ENC_TYPE_GUEST_STATE: */
     {
-        /*     0 */ RT_OFFSETOF(VMXVVMCS, u64GuestCr0),
-        /*     1 */ RT_OFFSETOF(VMXVVMCS, u64GuestCr3),
-        /*     2 */ RT_OFFSETOF(VMXVVMCS, u64GuestCr4),
-        /*     3 */ RT_OFFSETOF(VMXVVMCS, u64GuestEsBase),
-        /*     4 */ RT_OFFSETOF(VMXVVMCS, u64GuestCsBase),
-        /*     5 */ RT_OFFSETOF(VMXVVMCS, u64GuestSsBase),
-        /*     6 */ RT_OFFSETOF(VMXVVMCS, u64GuestDsBase),
-        /*     7 */ RT_OFFSETOF(VMXVVMCS, u64GuestFsBase),
-        /*     8 */ RT_OFFSETOF(VMXVVMCS, u64GuestGsBase),
-        /*     9 */ RT_OFFSETOF(VMXVVMCS, u64GuestLdtrBase),
-        /*    10 */ RT_OFFSETOF(VMXVVMCS, u64GuestTrBase),
-        /*    11 */ RT_OFFSETOF(VMXVVMCS, u64GuestGdtrBase),
-        /*    12 */ RT_OFFSETOF(VMXVVMCS, u64GuestIdtrBase),
-        /*    13 */ RT_OFFSETOF(VMXVVMCS, u64GuestDr7),
-        /*    14 */ RT_OFFSETOF(VMXVVMCS, u64GuestRsp),
-        /*    15 */ RT_OFFSETOF(VMXVVMCS, u64GuestRip),
-        /*    16 */ RT_OFFSETOF(VMXVVMCS, u64GuestRFlags),
-        /*    17 */ RT_OFFSETOF(VMXVVMCS, u64GuestPendingDbgXcpt),
-        /*    18 */ RT_OFFSETOF(VMXVVMCS, u64GuestSysenterEsp),
-        /*    19 */ RT_OFFSETOF(VMXVVMCS, u64GuestSysenterEip),
+        /*     0 */ RT_UOFFSETOF(VMXVVMCS, u64GuestCr0),
+        /*     1 */ RT_UOFFSETOF(VMXVVMCS, u64GuestCr3),
+        /*     2 */ RT_UOFFSETOF(VMXVVMCS, u64GuestCr4),
+        /*     3 */ RT_UOFFSETOF(VMXVVMCS, u64GuestEsBase),
+        /*     4 */ RT_UOFFSETOF(VMXVVMCS, u64GuestCsBase),
+        /*     5 */ RT_UOFFSETOF(VMXVVMCS, u64GuestSsBase),
+        /*     6 */ RT_UOFFSETOF(VMXVVMCS, u64GuestDsBase),
+        /*     7 */ RT_UOFFSETOF(VMXVVMCS, u64GuestFsBase),
+        /*     8 */ RT_UOFFSETOF(VMXVVMCS, u64GuestGsBase),
+        /*     9 */ RT_UOFFSETOF(VMXVVMCS, u64GuestLdtrBase),
+        /*    10 */ RT_UOFFSETOF(VMXVVMCS, u64GuestTrBase),
+        /*    11 */ RT_UOFFSETOF(VMXVVMCS, u64GuestGdtrBase),
+        /*    12 */ RT_UOFFSETOF(VMXVVMCS, u64GuestIdtrBase),
+        /*    13 */ RT_UOFFSETOF(VMXVVMCS, u64GuestDr7),
+        /*    14 */ RT_UOFFSETOF(VMXVVMCS, u64GuestRsp),
+        /*    15 */ RT_UOFFSETOF(VMXVVMCS, u64GuestRip),
+        /*    16 */ RT_UOFFSETOF(VMXVVMCS, u64GuestRFlags),
+        /*    17 */ RT_UOFFSETOF(VMXVVMCS, u64GuestPendingDbgXcpt),
+        /*    18 */ RT_UOFFSETOF(VMXVVMCS, u64GuestSysenterEsp),
+        /*    19 */ RT_UOFFSETOF(VMXVVMCS, u64GuestSysenterEip),
         /* 20-25 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
     },
     /* VMX_VMCS_ENC_WIDTH_NATURAL | VMX_VMCS_ENC_TYPE_HOST_STATE: */
     {
-        /*     0 */ RT_OFFSETOF(VMXVVMCS, u64HostCr0),
-        /*     1 */ RT_OFFSETOF(VMXVVMCS, u64HostCr3),
-        /*     2 */ RT_OFFSETOF(VMXVVMCS, u64HostCr4),
-        /*     3 */ RT_OFFSETOF(VMXVVMCS, u64HostFsBase),
-        /*     4 */ RT_OFFSETOF(VMXVVMCS, u64HostGsBase),
-        /*     5 */ RT_OFFSETOF(VMXVVMCS, u64HostTrBase),
-        /*     6 */ RT_OFFSETOF(VMXVVMCS, u64HostGdtrBase),
-        /*     7 */ RT_OFFSETOF(VMXVVMCS, u64HostIdtrBase),
-        /*     8 */ RT_OFFSETOF(VMXVVMCS, u64HostSysenterEsp),
-        /*     9 */ RT_OFFSETOF(VMXVVMCS, u64HostSysenterEip),
-        /*    10 */ RT_OFFSETOF(VMXVVMCS, u64HostRsp),
-        /*    11 */ RT_OFFSETOF(VMXVVMCS, u64HostRip),
+        /*     0 */ RT_UOFFSETOF(VMXVVMCS, u64HostCr0),
+        /*     1 */ RT_UOFFSETOF(VMXVVMCS, u64HostCr3),
+        /*     2 */ RT_UOFFSETOF(VMXVVMCS, u64HostCr4),
+        /*     3 */ RT_UOFFSETOF(VMXVVMCS, u64HostFsBase),
+        /*     4 */ RT_UOFFSETOF(VMXVVMCS, u64HostGsBase),
+        /*     5 */ RT_UOFFSETOF(VMXVVMCS, u64HostTrBase),
+        /*     6 */ RT_UOFFSETOF(VMXVVMCS, u64HostGdtrBase),
+        /*     7 */ RT_UOFFSETOF(VMXVVMCS, u64HostIdtrBase),
+        /*     8 */ RT_UOFFSETOF(VMXVVMCS, u64HostSysenterEsp),
+        /*     9 */ RT_UOFFSETOF(VMXVVMCS, u64HostSysenterEip),
+        /*    10 */ RT_UOFFSETOF(VMXVVMCS, u64HostRsp),
+        /*    11 */ RT_UOFFSETOF(VMXVVMCS, u64HostRip),
         /* 12-19 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX,
         /* 20-25 */ UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX, UINT16_MAX
@@ -2229,5 +2229,5 @@
     {
         RTGCPHYS const GCPhysVmcs  = IEM_VMX_GET_CURRENT_VMCS(pVCpu);
-        uint32_t const offVmxAbort = RT_OFFSETOF(VMXVVMCS, u32VmxAbortId);
+        uint32_t const offVmxAbort = RT_UOFFSETOF(VMXVVMCS, u32VmxAbortId);
         PGMPhysSimpleWriteGCPhys(pVCpu->CTX_SUFF(pVM), GCPhysVmcs + offVmxAbort, &enmAbort, sizeof(enmAbort));
     }
@@ -6109,5 +6109,5 @@
     else
     {
-        rcStrict = PGMPhysSimpleWriteGCPhys(pVCpu->CTX_SUFF(pVM), GCPtrVmcs + RT_OFFSETOF(VMXVVMCS, fVmcsState),
+        rcStrict = PGMPhysSimpleWriteGCPhys(pVCpu->CTX_SUFF(pVM), GCPtrVmcs + RT_UOFFSETOF(VMXVVMCS, fVmcsState),
                                             (const void *)&fVmcsStateClear, sizeof(fVmcsStateClear));
     }