Changeset 68150 in vbox
- Timestamp:
- Jul 28, 2017 8:32:26 AM (7 years ago)
- File:
-
- 1 edited
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trunk/src/VBox/VMM/VMMAll/IEMAllCImplSvmInstr.cpp.h
r67945 r68150 52 52 53 53 /** 54 * Helper for handling a SVM world-switch (VMRUN, \#VMEXIT).54 * Performs an SVM world-switch (VMRUN, \#VMEXIT) updating PGM and IEM internals. 55 55 * 56 56 * @returns Strict VBox status code. 57 57 * @param pVCpu The cross context virtual CPU structure. 58 * @param uOldEfer EFER MSR prior to the world-switch. 59 * @param uOldCr0 CR0 prior to the world-switch. 60 */ 61 DECLINLINE(VBOXSTRICTRC) iemSvmHandleWorldSwitch(PVMCPU pVCpu, uint64_t uOldEfer, uint64_t uOldCr0) 62 { 63 RT_NOREF(uOldEfer); RT_NOREF(uOldCr0); 64 65 PCPUMCTX pCtx = IEM_GET_CTX(pVCpu); 58 * @param pCtx The guest-CPU context. 59 */ 60 DECLINLINE(VBOXSTRICTRC) iemSvmWorldSwitch(PVMCPU pVCpu, PCPUMCTX pCtx) 61 { 62 /* Flush the TLB with new CR3. */ 63 PGMFlushTLB(pVCpu, pCtx->cr3, true); 66 64 67 65 /* 68 * Inform PGM .66 * Inform PGM about paging mode changes. 69 67 * We include X86_CR0_PE because PGM doesn't handle paged-real mode yet, 70 68 * see comment in iemMemPageTranslateAndCheckAccess(). 71 69 */ 72 PGMFlushTLB(pVCpu, pCtx->cr3, true);73 70 int rc = PGMChangeMode(pVCpu, pCtx->cr0 | X86_CR0_PE, pCtx->cr4, pCtx->msrEFER); 74 71 AssertRCReturn(rc, rc); 75 72 76 /* Inform CPUM (recompiler) . */73 /* Inform CPUM (recompiler), can later be removed. */ 77 74 CPUMSetChangedFlags(pVCpu, CPUM_CHANGED_ALL); 78 75 … … 227 224 /** @todo ASID. */ 228 225 229 uint64_t const uOldCr0 = pCtx->cr0;230 uint64_t const uOldEfer = pCtx->msrEFER;231 232 226 /* 233 227 * Reload the guest's "host state". … … 260 254 /* Restore guest's force-flags. */ 261 255 if (pCtx->hwvirt.fLocalForcedActions) 256 { 262 257 VMCPU_FF_SET(pVCpu, pCtx->hwvirt.fLocalForcedActions); 258 pCtx->hwvirt.fLocalForcedActions = 0; 259 } 263 260 264 261 /* 265 * Inform PGM and others of theworld-switch.262 * Update PGM, IEM and others of a world-switch. 266 263 */ 267 rcStrict = iemSvm HandleWorldSwitch(pVCpu, uOldEfer, uOldCr0);264 rcStrict = iemSvmWorldSwitch(pVCpu, pCtx); 268 265 if (rcStrict == VINF_SUCCESS) 269 266 return VINF_SVM_VMEXIT; … … 271 268 if (RT_SUCCESS(rcStrict)) 272 269 { 273 LogFlow(("iemSvmVmexit: Setting passup status from iemSvm HandleWorldSwitch %Rrc\n", rcStrict));270 LogFlow(("iemSvmVmexit: Setting passup status from iemSvmWorldSwitch %Rrc\n", rcStrict)); 274 271 iemSetPassUpStatus(pVCpu, rcStrict); 275 272 return VINF_SVM_VMEXIT; 276 273 } 277 274 278 LogFlow(("iemSvmVmexit: iemSvm HandleWorldSwitch unexpected failure. rc=%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));275 LogFlow(("iemSvmVmexit: iemSvmWorldSwitch unexpected failure. rc=%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); 279 276 } 280 277 else … … 327 324 328 325 /* 326 * Save the host state. 327 */ 328 PSVMHOSTSTATE pHostState = &pCtx->hwvirt.svm.HostState; 329 pHostState->es = pCtx->es; 330 pHostState->cs = pCtx->cs; 331 pHostState->ss = pCtx->ss; 332 pHostState->ds = pCtx->ds; 333 pHostState->gdtr = pCtx->gdtr; 334 pHostState->idtr = pCtx->idtr; 335 pHostState->uEferMsr = pCtx->msrEFER; 336 pHostState->uCr0 = pCtx->cr0; 337 pHostState->uCr3 = pCtx->cr3; 338 pHostState->uCr4 = pCtx->cr4; 339 pHostState->rflags = pCtx->rflags; 340 pHostState->uRip = pCtx->rip + cbInstr; 341 pHostState->uRsp = pCtx->rsp; 342 pHostState->uRax = pCtx->rax; 343 344 /* 329 345 * Read the guest VMCB state. 330 346 */ … … 336 352 337 353 /* 338 * Save the host state.339 */340 PSVMHOSTSTATE pHostState = &pCtx->hwvirt.svm.HostState;341 pHostState->es = pCtx->es;342 pHostState->cs = pCtx->cs;343 pHostState->ss = pCtx->ss;344 pHostState->ds = pCtx->ds;345 pHostState->gdtr = pCtx->gdtr;346 pHostState->idtr = pCtx->idtr;347 pHostState->uEferMsr = pCtx->msrEFER;348 pHostState->uCr0 = pCtx->cr0;349 pHostState->uCr3 = pCtx->cr3;350 pHostState->uCr4 = pCtx->cr4;351 pHostState->rflags = pCtx->rflags;352 pHostState->uRip = pCtx->rip + cbInstr;353 pHostState->uRsp = pCtx->rsp;354 pHostState->uRax = pCtx->rax;355 356 /*357 354 * Validate guest-state and controls. 358 355 */ 359 /* VMRUN must always be i HMSntercepted. */356 /* VMRUN must always be intercepted. */ 360 357 if (!CPUMIsGuestSvmCtrlInterceptSet(pCtx, SVM_CTRL_INTERCEPT_VMRUN)) 361 358 { … … 552 549 if (pVmcbCtrl->u64IntShadow & SVM_INTERRUPT_SHADOW_ACTIVE) 553 550 { 554 LogFlow(("iemSvmVmrun: setting in errupt shadow. inhibit PC=%#RX64\n", pVmcbNstGst->u64RIP));551 LogFlow(("iemSvmVmrun: setting interrupt shadow. inhibit PC=%#RX64\n", pVmcbNstGst->u64RIP)); 555 552 /** @todo will this cause trouble if the nested-guest is 64-bit but the guest is 32-bit? */ 556 553 EMSetInhibitInterruptsPC(pVCpu, pVmcbNstGst->u64RIP); … … 560 557 * TLB flush control. 561 558 * Currently disabled since it's redundant as we unconditionally flush the TLB 562 * in iemSvm HandleWorldSwitch() below.559 * in iemSvmWorldSwitch() below. 563 560 */ 564 561 #if 0 … … 571 568 572 569 /** @todo @bugref{7243}: SVM TSC offset, see tmCpuTickGetInternal. */ 573 574 uint64_t const uOldEfer = pCtx->msrEFER;575 uint64_t const uOldCr0 = pCtx->cr0;576 570 577 571 /* … … 609 603 610 604 /* 611 * Clear global interrupt flags to allow interrupts in the guest. 612 */ 613 pCtx->hwvirt.svm.fGif = 1; 614 615 /* 616 * Inform PGM and others of the world-switch. 617 */ 618 VBOXSTRICTRC rcStrict = iemSvmHandleWorldSwitch(pVCpu, uOldEfer, uOldCr0); 605 * Update PGM, IEM and others of a world-switch. 606 */ 607 VBOXSTRICTRC rcStrict = iemSvmWorldSwitch(pVCpu, pCtx); 619 608 if (rcStrict == VINF_SUCCESS) 620 609 { /* likely */ } … … 623 612 else 624 613 { 625 LogFlow(("iemSvmVmrun: iemSvm HandleWorldSwitch unexpected failure. rc=%Rrc\n", VBOXSTRICTRC_VAL(rcStrict)));614 LogFlow(("iemSvmVmrun: iemSvmWorldSwitch unexpected failure. rc=%Rrc\n", VBOXSTRICTRC_VAL(rcStrict))); 626 615 return rcStrict; 627 616 } 617 618 /* 619 * Clear global interrupt flags to allow interrupts in the guest. 620 */ 621 pCtx->hwvirt.svm.fGif = 1; 628 622 629 623 /* … … 1128 1122 { 1129 1123 Assert(!CPUMIsGuestInSvmNestedHwVirtMode(pCtx)); 1130 rcStrict = iemInitiateCpuShutdown(pVCpu);1124 rcStrict = VINF_EM_TRIPLE_FAULT; 1131 1125 } 1132 1126 return rcStrict;
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