Index: /trunk/src/VBox/VMM/VMMAll/HMAll.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMAll/HMAll.cpp (revision 66103) +++ /trunk/src/VBox/VMM/VMMAll/HMAll.cpp (revision 66104) @@ -560,7 +560,7 @@ /** * VMX nested-guest VM-exit handler. - * - * @param pVCpu The cross context virtual CPU structure. - * @param uBasicExitReason The basic exit reason. + * + * @param pVCpu The cross context virtual CPU structure. + * @param uBasicExitReason The basic exit reason. */ VMM_INT_DECL(void) HMNstGstVmxVmExit(PVMCPU pVCpu, uint16_t uBasicExitReason) Index: /trunk/src/VBox/VMM/VMMAll/IEMAll.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMAll/IEMAll.cpp (revision 66103) +++ /trunk/src/VBox/VMM/VMMAll/IEMAll.cpp (revision 66104) @@ -396,30 +396,30 @@ /** * Check if an SVM control/instruction intercept is set. - */ + */ #define IEM_IS_SVM_CTRL_INTERCEPT_SET(a_pVCpu, a_Intercept) (CPUMIsGuestSvmCtrlInterceptSet(IEM_GET_CTX(a_pVCpu), (a_Intercept))) -/** +/** * Check if an SVM read CRx intercept is set. - */ + */ #define IEM_IS_SVM_READ_CR_INTERCEPT_SET(a_pVCpu, a_uCr) (CPUMIsGuestSvmCtrlInterceptSet(IEM_GET_CTX(a_pVCpu), (a_uCr))) -/** +/** * Check if an SVM write CRx intercept is set. - */ + */ #define IEM_IS_SVM_WRITE_CR_INTERCEPT_SET(a_pVCpu, a_uCr) (CPUMIsGuestSvmCtrlInterceptSet(IEM_GET_CTX(a_pVCpu), (a_uCr))) -/** +/** * Check if an SVM read DRx intercept is set. - */ + */ #define IEM_IS_SVM_READ_DR_INTERCEPT_SET(a_pVCpu, a_uDr) (CPUMIsGuestSvmCtrlInterceptSet(IEM_GET_CTX(a_pVCpu), (a_uDr))) -/** +/** * Check if an SVM write DRx intercept is set. - */ + */ #define IEM_IS_SVM_WRITE_DR_INTERCEPT_SET(a_pVCpu, a_uDr) (CPUMIsGuestSvmWriteDRxInterceptSet(IEM_GET_CTX(a_pVCpu), (a_uDr))) -/** +/** * Check if an SVM exception intercept is set. - */ + */ #define IEM_IS_SVM_XCPT_INTERCEPT_SET(a_pVCpu, a_enmXcpt) (CPUMIsGuestSvmXcptInterceptSet(IEM_GET_CTX(a_pVCpu), (a_enmXcpt))) #endif /* VBOX_WITH_NESTED_HWVIRT */ @@ -14968,9 +14968,9 @@ /** * Interface for HM and EM to emulate the STGI instruction. - * - * @returns Strict VBox status code. + * + * @returns Strict VBox status code. * @param pVCpu The cross context virtual CPU structure of the calling EMT. - * @param cbInstr The instruction length in bytes. - * @thread EMT(pVCpu) + * @param cbInstr The instruction length in bytes. + * @thread EMT(pVCpu) */ VMM_INT_DECL(VBOXSTRICTRC) IEMExecDecodedClgi(PVMCPU pVCpu, uint8_t cbInstr) @@ -14986,9 +14986,9 @@ /** * Interface for HM and EM to emulate the STGI instruction. - * - * @returns Strict VBox status code. + * + * @returns Strict VBox status code. * @param pVCpu The cross context virtual CPU structure of the calling EMT. - * @param cbInstr The instruction length in bytes. - * @thread EMT(pVCpu) + * @param cbInstr The instruction length in bytes. + * @thread EMT(pVCpu) */ VMM_INT_DECL(VBOXSTRICTRC) IEMExecDecodedStgi(PVMCPU pVCpu, uint8_t cbInstr) Index: /trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp (revision 66103) +++ /trunk/src/VBox/VMM/VMMR0/HMSVMR0.cpp (revision 66104) @@ -1306,5 +1306,5 @@ HMSVM_SEG_REG_COPY_TO_VMCB(pCtx, pVmcb, ES, es); HMSVM_SEG_REG_COPY_TO_VMCB(pCtx, pVmcb, FS, fs); - HMSVM_SEG_REG_COPY_TO_VMCB(pCtx, pVmcb, GS, gs); + HMSVM_SEG_REG_COPY_TO_VMCB(pCtx, pVmcb, GS, gs); pVmcb->guest.u8CPL = pCtx->ss.Attr.n.u2Dpl; @@ -2768,5 +2768,5 @@ Log4(("ctrl.u16InterceptWrDRx %#x\n", pVmcb->ctrl.u16InterceptWrDRx)); Log4(("ctrl.u32InterceptXcpt %#x\n", pVmcb->ctrl.u32InterceptXcpt)); - Log4(("ctrl.u64InterceptCtrl %#RX64\n", pVmcb->ctrl.u64InterceptCtrl)); + Log4(("ctrl.u64InterceptCtrl %#RX64\n", pVmcb->ctrl.u64InterceptCtrl)); Log4(("ctrl.u64IOPMPhysAddr %#RX64\n", pVmcb->ctrl.u64IOPMPhysAddr)); Log4(("ctrl.u64MSRPMPhysAddr %#RX64\n", pVmcb->ctrl.u64MSRPMPhysAddr)); @@ -3176,5 +3176,5 @@ */ if ( (pVM->hm.s.cpuid.u32AMDFeatureEDX & X86_CPUID_EXT_FEATURE_EDX_RDTSCP) - && !(pVmcb->ctrl.u64InterceptCtrl & SVM_CTRL_INTERCEPT_RDTSCP)) + && !(pVmcb->ctrl.u64InterceptCtrl & SVM_CTRL_INTERCEPT_RDTSCP)) { hmR0SvmSetMsrPermission(pVCpu, MSR_K8_TSC_AUX, SVMMSREXIT_PASSTHRU_READ, SVMMSREXIT_PASSTHRU_WRITE); Index: /trunk/src/VBox/VMM/VMMR3/DBGFR3Flow.cpp =================================================================== --- /trunk/src/VBox/VMM/VMMR3/DBGFR3Flow.cpp (revision 66103) +++ /trunk/src/VBox/VMM/VMMR3/DBGFR3Flow.cpp (revision 66104) @@ -1255,5 +1255,5 @@ if (RT_SUCCESS(rc)) { - rc = dbgfR3FlowQueryDirectBranchTarget(pUVM, idCpu, &DisState.Param1, &pInstr->AddrInstr, pInstr->cbInstr, + rc = dbgfR3FlowQueryDirectBranchTarget(pUVM, idCpu, &DisState.Param1, &pInstr->AddrInstr, pInstr->cbInstr, RT_BOOL(DisState.pCurInstr->fOpType & DISOPTYPE_RELATIVE_CONTROLFLOW), &pFlowBb->AddrTarget); @@ -1617,5 +1617,5 @@ * for every other basic block type. * @note For indirect unconditional branches using a branch table this will return the start address - * of the branch table. + * of the branch table. */ VMMR3DECL(PDBGFADDRESS) DBGFR3FlowBbGetBranchAddress(DBGFFLOWBB hFlowBb, PDBGFADDRESS pAddrTarget) Index: /trunk/src/VBox/VMM/VMMR3/PATMA.asm =================================================================== --- /trunk/src/VBox/VMM/VMMR3/PATMA.asm (revision 66103) +++ /trunk/src/VBox/VMM/VMMR3/PATMA.asm (revision 66104) @@ -59,5 +59,5 @@ at PATCHASMRECORD.cbFunction, DD NAME(%1 %+ _EndProc) - NAME(%1) at PATCHASMRECORD.cRelocs, DD %2 -iend +iend %endmacro @@ -76,5 +76,5 @@ at PATCHASMRECORD.cbFunction, DD NAME(%1 %+ _EndProc) - NAME(%1) at PATCHASMRECORD.cRelocs, DD %3 -iend +iend %endmacro @@ -107,5 +107,5 @@ at PATCHASMRECORD.cbFunction, DD NAME(%1 %+ _EndProc) - NAME(%1) at PATCHASMRECORD.cRelocs, DD %5 -iend +iend %endmacro @@ -124,5 +124,5 @@ ;; -; Switches to the data section for the read-only patch descriptor data and +; Switches to the data section for the read-only patch descriptor data and ; aligns it appropriately. ; @@ -177,5 +177,5 @@ ;; ; Ends a patch. -; +; ; This terminates the function and fixup array. ; @@ -198,5 +198,5 @@ ; %ifdef RT_ARCH_AMD64 - BITS 32 + BITS 32 %endif @@ -357,5 +357,5 @@ GLOBALNAME g_patmClearInhibitIRQContIF0Record PATCHASMRECORD_INIT PATMClearInhibitIRQContIF0, 11 - DD PATM_ASMFIX_INTERRUPTFLAG, 0 + DD PATM_ASMFIX_INTERRUPTFLAG, 0 DD PATM_ASMFIX_INHIBITIRQADDR, 0 DD PATM_ASMFIX_VMFLAGS, 0 @@ -1604,7 +1604,7 @@ %endif DD PATM_ASMFIX_INTERRUPTFLAG, 0 -%ifdef PATM_LOG_PATCHIRET +%ifdef PATM_LOG_PATCHIRET DD PATM_ASMFIX_PENDINGACTION, 0 -%endif +%endif DD PATM_ASMFIX_VM_FORCEDACTIONS, 0 DD PATM_ASMFIX_TEMP_EAX, 0 @@ -1771,5 +1771,5 @@ ; Patch record for 'JEcx' BEGIN_PATCH_RODATA_SECTION -GLOBALNAME g_patmJEcxRecord +GLOBALNAME g_patmJEcxRecord PATCHASMRECORD_INIT_EX PATMJEcxReplacement, , PATMJEcxJump, PATMJEcxSizeOverride, 3 DD PATM_ASMFIX_INTERRUPTFLAG, 0 @@ -2011,7 +2011,7 @@ DD PATM_ASMFIX_STACKBASE_GUEST, 0 DD PATM_ASMFIX_CALL_PATCH_TARGET_ADDR, 0 -%ifdef PATM_LOG_PATCHINSTR +%ifdef PATM_LOG_PATCHINSTR DD PATM_ASMFIX_PENDINGACTION, 0 -%endif +%endif DD PATM_ASMFIX_CALL_RETURN_ADDR, 0 DD PATM_ASMFIX_CALL_PATCH_TARGET_ADDR, 0 @@ -2463,10 +2463,10 @@ DD PATM_ASMFIX_STACKBASE, 0 DD PATM_ASMFIX_PATCHBASE, 0 -%ifdef PATM_LOG_PATCHINSTR +%ifdef PATM_LOG_PATCHINSTR DD PATM_ASMFIX_PENDINGACTION, 0 -%endif +%endif DD PATM_ASMFIX_PENDINGACTION, 0 DD PATM_ASMFIX_PATCHBASE, 0 -%ifdef PATM_LOG_PATCHINSTR +%ifdef PATM_LOG_PATCHINSTR DD PATM_ASMFIX_PENDINGACTION, 0 %endif @@ -2524,7 +2524,7 @@ DD PATM_ASMFIX_INTERRUPTFLAG, 0 DD PATM_ASMFIX_STACKPTR, 0 -%ifdef PATM_LOG_PATCHINSTR +%ifdef PATM_LOG_PATCHINSTR DD PATM_ASMFIX_PENDINGACTION, 0 -%endif +%endif DD PATM_ASMFIX_INTERRUPTFLAG, 0 DD 0ffffffffh, 0ffffffffh Index: /trunk/src/VBox/VMM/VMMR3/PATMA.mac =================================================================== --- /trunk/src/VBox/VMM/VMMR3/PATMA.mac (revision 66103) +++ /trunk/src/VBox/VMM/VMMR3/PATMA.mac (revision 66104) @@ -76,5 +76,5 @@ -;; Everything except IOPL, NT, IF, VM, VIF, VIP and RF +;; Everything except IOPL, NT, IF, VM, VIF, VIP and RF %define PATM_FLAGS_MASK (X86_EFL_CF|X86_EFL_PF|X86_EFL_AF|X86_EFL_ZF|X86_EFL_SF|X86_EFL_TF|X86_EFL_DF|X86_EFL_OF|X86_EFL_AC|X86_EFL_ID) @@ -134,8 +134,8 @@ ;; Offset of the jump table? .offJump resd 1 - ;; Used only by loop/loopz/loopnz. - .offRelJump resd 1 + ;; Used only by loop/loopz/loopnz. + .offRelJump resd 1 ;; Size override byte position. - .offSizeOverride resd 1 + .offSizeOverride resd 1 ;; The size of the patch function. .cbFunction resd 1 Index: /trunk/src/VBox/VMM/VMMRC/CPUMRCPatchHlp.asm =================================================================== --- /trunk/src/VBox/VMM/VMMRC/CPUMRCPatchHlp.asm (revision 66103) +++ /trunk/src/VBox/VMM/VMMRC/CPUMRCPatchHlp.asm (revision 66104) @@ -36,6 +36,6 @@ ;; -; Helper for PATMCpuidReplacement. -; +; Helper for PATMCpuidReplacement. +; ; We have at most 32 bytes of stack to play with, . ; @@ -59,6 +59,6 @@ ; ; Perform a binary search looking for leaf with the EAX value. - ; - mov edx, [ss:edi + VM.cpum + CPUM.GuestInfo + CPUMINFO.cCpuIdLeaves] + ; + mov edx, [ss:edi + VM.cpum + CPUM.GuestInfo + CPUMINFO.cCpuIdLeaves] mov ecx, [ss:edi + VM.cpum + CPUM.GuestInfo + CPUMINFO.paCpuIdLeavesRC] test edx, edx @@ -98,5 +98,5 @@ ; We've to a matching leaf, does the sub-leaf match too? ; -cpuid_match_eax: +cpuid_match_eax: mov ecx, [esp + 4] and ecx, [ss:ebx + CPUMCPUIDLEAF.fSubLeafMask] @@ -112,5 +112,5 @@ cpuid_lookup_subleaf_backwards_loop: - cmp ebx, edx ; Is there a leaf before the current? + cmp ebx, edx ; Is there a leaf before the current? jbe cpuid_subleaf_not_found ; If not we're out of luck. cmp eax, [ss:ebx - CPUMCPUIDLEAF_size + CPUMCPUIDLEAF.uLeaf] @@ -123,9 +123,9 @@ ; - ; Search forward until we've got a matching sub-leaf (or not). + ; Search forward until we've got a matching sub-leaf (or not). ; cpuid_lookup_subleaf_forwards: ; Calculate the last leaf address. - mov edx, [ss:edi + VM.cpum + CPUM.GuestInfo + CPUMINFO.cCpuIdLeaves] + mov edx, [ss:edi + VM.cpum + CPUM.GuestInfo + CPUMINFO.cCpuIdLeaves] dec edx shl edx, CPUMCPUIDLEAF_SIZE_LOG2 @@ -138,12 +138,12 @@ jne cpuid_subleaf_not_found add ebx, CPUMCPUIDLEAF_size - cmp ecx, [ss:ebx + CPUMCPUIDLEAF.uSubLeaf] + cmp ecx, [ss:ebx + CPUMCPUIDLEAF.uSubLeaf] ja cpuid_subleaf_lookup je cpuid_fetch - + ; ; Out of range sub-leaves aren't quite as easy and pretty as we emulate them ; here, but we do an adequate job. - ; + ; cpuid_subleaf_not_found: xor ecx, ecx @@ -189,5 +189,5 @@ mov eax, [ss:ebx + CPUMCPUIDLEAF.uEax] mov ebx, [ss:ebx + CPUMCPUIDLEAF.uEbx] - + cpuid_done: pop edi Index: /trunk/src/VBox/VMM/tools/VBoxCpuReport.cpp =================================================================== --- /trunk/src/VBox/VMM/tools/VBoxCpuReport.cpp (revision 66103) +++ /trunk/src/VBox/VMM/tools/VBoxCpuReport.cpp (revision 66104) @@ -519,5 +519,5 @@ && g_enmMicroarch == kCpumMicroarch_Intel_Atom_Bonnell) || ( (uMsr == 0x280) - && g_enmMicroarch == kCpumMicroarch_Intel_P6_III)) + && g_enmMicroarch == kCpumMicroarch_Intel_P6_III)) vbCpuRepDebug("Skipping %#x\n", uMsr); else